From 1529e92a2b4942dd0fdd95e56adaf97c316d2e39 Mon Sep 17 00:00:00 2001
From: Duncan Coutts <duncan@haskell.org>
Date: Thu, 7 Feb 2008 17:00:20 +0000
Subject: [PATCH] Make more arch-specific #if's exclusive with #else #error
 cases So when the next person compiles the Sparc NCG it
 should fail more obviously at compile time rather than
 panicing at runtime. Plus one obvious fix for LocalReg
 gaining an extra param Missing bits of Sparc NCG:   *
 genSwitch for generating jump tables. This is the most
 tricky one.   * ALLOCATABLE_REGS_INTEGER and
 ALLOCATABLE_REGS_DOUBLE just requires     finding and
 verifying the values. The nearby comment describes how.   *
 isRegRegMove and mkRegRegMoveInstr. Sparc uses Or for int
 move, check     what this is supposed to do for single and
 double float types.   * regDotColor. Probably just copy the
 ppc impl.

---
 compiler/nativeGen/MachCodeGen.hs   |    6 +++---
 compiler/nativeGen/MachRegs.lhs     |    9 +++++----
 compiler/nativeGen/RegAllocInfo.hs  |    4 +++-
 compiler/nativeGen/RegAllocStats.hs |    9 +++++----
 4 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/compiler/nativeGen/MachCodeGen.hs b/compiler/nativeGen/MachCodeGen.hs
index e479d50..d8dfd67 100644
--- a/compiler/nativeGen/MachCodeGen.hs
+++ b/compiler/nativeGen/MachCodeGen.hs
@@ -305,7 +305,7 @@ assignMem_I64Code addrTree valueTree = do
          mov_lo = ST I32 rlo (AddrRegImm src (ImmInt 4))
      return (vcode `appOL` code `snocOL` mov_hi `snocOL` mov_lo)
 
-assignReg_I64Code (CmmLocal (LocalReg u_dst pk)) valueTree = do
+assignReg_I64Code (CmmLocal (LocalReg u_dst pk _)) valueTree = do
      ChildCode64 vcode r_src_lo <- iselExpr64 valueTree    
      let 
          r_dst_lo = mkVReg u_dst pk
@@ -335,7 +335,7 @@ iselExpr64 (CmmLoad addrTree I64) = do
                          rlo
           )
 
-iselExpr64 (CmmReg (CmmLocal (LocalReg uq I64))) = do
+iselExpr64 (CmmReg (CmmLocal (LocalReg uq I64 _))) = do
      r_dst_lo <-  getNewRegNat I32
      let r_dst_hi = getHiVRegFromLo r_dst_lo
          r_src_lo = mkVReg uq I32
@@ -3993,7 +3993,7 @@ genSwitch expr ids
                     ]
         return code
 #else
-genSwitch expr ids = panic "ToDo: genSwitch"
+#error "ToDo: genSwitch"
 #endif
 
 jumpTableEntry Nothing = CmmStaticLit (CmmInt 0 wordRep)
diff --git a/compiler/nativeGen/MachRegs.lhs b/compiler/nativeGen/MachRegs.lhs
index 0174fac..2c6238d 100644
--- a/compiler/nativeGen/MachRegs.lhs
+++ b/compiler/nativeGen/MachRegs.lhs
@@ -505,16 +505,17 @@ worst n classN classC
 #if i386_TARGET_ARCH
 #define ALLOCATABLE_REGS_INTEGER (_ILIT(3))
 #define ALLOCATABLE_REGS_DOUBLE  (_ILIT(6))
-#endif
 
-#if x86_64_TARGET_ARCH
+#elif x86_64_TARGET_ARCH
 #define ALLOCATABLE_REGS_INTEGER (_ILIT(5))
 #define ALLOCATABLE_REGS_DOUBLE  (_ILIT(2))
-#endif
 
-#if powerpc_TARGET_ARCH
+#elif powerpc_TARGET_ARCH
 #define ALLOCATABLE_REGS_INTEGER (_ILIT(16))
 #define ALLOCATABLE_REGS_DOUBLE  (_ILIT(26))
+
+#else
+#error ToDo: define ALLOCATABLE_REGS_INTEGER and ALLOCATABLE_REGS_DOUBLE
 #endif
 
 {-# INLINE regClass      #-}
diff --git a/compiler/nativeGen/RegAllocInfo.hs b/compiler/nativeGen/RegAllocInfo.hs
index d834a80..2361e77 100644
--- a/compiler/nativeGen/RegAllocInfo.hs
+++ b/compiler/nativeGen/RegAllocInfo.hs
@@ -774,7 +774,7 @@ isRegRegMove (MOV _ (OpReg r1) (OpReg r2)) = Just (r1,r2)
 #elif powerpc_TARGET_ARCH
 isRegRegMove (MR dst src) = Just (src,dst)
 #else
-#warning ToDo: isRegRegMove
+#error ToDo: isRegRegMove
 #endif
 isRegRegMove _ = Nothing
 
@@ -877,6 +877,8 @@ mkRegRegMoveInstr src dst
 #endif
 #elif powerpc_TARGET_ARCH
     = MR dst src
+#else
+#error ToDo: mkRegRegMoveInstr
 #endif
 
 mkBranchInstr
diff --git a/compiler/nativeGen/RegAllocStats.hs b/compiler/nativeGen/RegAllocStats.hs
index 9f8415f..32c0942 100644
--- a/compiler/nativeGen/RegAllocStats.hs
+++ b/compiler/nativeGen/RegAllocStats.hs
@@ -291,11 +291,10 @@ regColors
 	, (fake3, "#aa00aa")
 	, (fake4, "#ff0055")
 	, (fake5, "#5500ff") ]
-#endif
 
 
 -- reg colors for x86_64
-#if x86_64_TARGET_ARCH
+#elif x86_64_TARGET_ARCH
 regDotColor :: Reg -> SDoc
 regDotColor reg
  = let	Just	str	= lookupUFM regColors reg
@@ -317,17 +316,19 @@ regColors
 	, (r15, "#002080") ]
 
 	++ zip (map RealReg [16..31]) (repeat "red")
-#endif
 
 
 -- reg colors for ppc
-#if powerpc_TARGET_ARCH
+#elif powerpc_TARGET_ARCH
 regDotColor :: Reg -> SDoc
 regDotColor reg
  = case regClass reg of
  	RcInteger	-> text "blue"
 	RcFloat		-> text "red"
 	RcDouble	-> text "green"
+
+#else
+#error ToDo: regDotColor
 #endif
 
 
-- 
1.7.10.4