From 43d01ce6e6b2bcc4211ee350eb11dec926e38964 Mon Sep 17 00:00:00 2001 From: Simon Marlow Date: Thu, 12 Feb 2009 09:23:40 +0000 Subject: [PATCH] update Sparc store/load barrier (#3019), and fix comments --- includes/SMP.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/includes/SMP.h b/includes/SMP.h index 2cc3fb2..ac98feb 100644 --- a/includes/SMP.h +++ b/includes/SMP.h @@ -179,7 +179,7 @@ write_barrier(void) { #elif powerpc_HOST_ARCH __asm__ __volatile__ ("lwsync" : : : "memory"); #elif sparc_HOST_ARCH - /* Sparc in TSO mode does not require write/write barriers. */ + /* Sparc in TSO mode does not require store/store barriers. */ __asm__ __volatile__ ("" : : : "memory"); #elif !defined(WITHSMP) return; @@ -197,8 +197,7 @@ store_load_barrier(void) { #elif powerpc_HOST_ARCH __asm__ __volatile__ ("sync" : : : "memory"); #elif sparc_HOST_ARCH - /* Sparc in TSO mode does not require store/load barriers. */ - __asm__ __volatile__ ("membar" : : : "memory"); + __asm__ __volatile__ ("membar #StoreLoad" : : : "memory"); #elif !defined(WITHSMP) return; #else -- 1.7.10.4