From a12e845684c10955bc594cdb20d1f13fae14873d Mon Sep 17 00:00:00 2001 From: "Ben.Lippmeier@anu.edu.au" Date: Wed, 4 Feb 2009 03:41:07 +0000 Subject: [PATCH] NCG: Rename MachRegs, MachInstrs -> Regs, Instrs to reflect arch specific naming --- compiler/ghc.cabal.in | 14 +++++++------- compiler/nativeGen/Alpha/Instr.hs | 2 +- compiler/nativeGen/AsmCodeGen.lhs | 4 ++-- compiler/nativeGen/{MachInstrs.hs => Instrs.hs} | 8 ++++---- compiler/nativeGen/MachCodeGen.hs | 7 +++---- compiler/nativeGen/NCGMonad.hs | 2 +- compiler/nativeGen/PPC/Instr.hs | 2 +- compiler/nativeGen/PositionIndependentCode.hs | 4 ++-- compiler/nativeGen/PprMach.hs | 4 ++-- compiler/nativeGen/RegAlloc/Graph/Coalesce.hs | 2 +- compiler/nativeGen/RegAlloc/Graph/Main.hs | 4 ++-- compiler/nativeGen/RegAlloc/Graph/Spill.hs | 4 ++-- compiler/nativeGen/RegAlloc/Graph/SpillClean.hs | 4 ++-- compiler/nativeGen/RegAlloc/Graph/SpillCost.hs | 4 ++-- compiler/nativeGen/RegAlloc/Graph/Stats.hs | 4 ++-- compiler/nativeGen/RegAlloc/Linear/Base.hs | 2 +- compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs | 4 ++-- compiler/nativeGen/RegAlloc/Linear/Main.hs | 4 ++-- compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs | 2 +- compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs | 2 +- compiler/nativeGen/RegAlloc/Linear/State.hs | 4 ++-- compiler/nativeGen/RegAlloc/Linear/Stats.hs | 2 +- compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs | 2 +- compiler/nativeGen/RegAllocInfo.hs | 4 ++-- compiler/nativeGen/RegLiveness.hs | 4 ++-- compiler/nativeGen/{MachRegs.hs => Regs.hs} | 10 +++++----- compiler/nativeGen/SPARC/Instr.hs | 2 +- compiler/nativeGen/X86/Instr.hs | 2 +- 28 files changed, 56 insertions(+), 57 deletions(-) rename compiler/nativeGen/{MachInstrs.hs => Instrs.hs} (92%) rename compiler/nativeGen/{MachRegs.hs => Regs.hs} (96%) diff --git a/compiler/ghc.cabal.in b/compiler/ghc.cabal.in index f14961a..49569b3 100644 --- a/compiler/ghc.cabal.in +++ b/compiler/ghc.cabal.in @@ -455,17 +455,17 @@ Library Exposed-Modules: AsmCodeGen MachCodeGen - MachInstrs - Alpha.Instr - X86.Instr - PPC.Instr - SPARC.Instr - MachRegs + Regs RegsBase + Instrs + Alpha.Regs + Alpha.Instr X86.Regs + X86.Instr PPC.Regs + PPC.Instr SPARC.Regs - Alpha.Regs + SPARC.Instr NCGMonad PositionIndependentCode PprMach diff --git a/compiler/nativeGen/Alpha/Instr.hs b/compiler/nativeGen/Alpha/Instr.hs index 16ec53f..e2d66d3 100644 --- a/compiler/nativeGen/Alpha/Instr.hs +++ b/compiler/nativeGen/Alpha/Instr.hs @@ -18,7 +18,7 @@ module Alpha.Instr ( where import BlockId -import MachRegs +import Regs import Cmm import FastString import CLabel diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs index e9db2bc..b9ae956 100644 --- a/compiler/nativeGen/AsmCodeGen.lhs +++ b/compiler/nativeGen/AsmCodeGen.lhs @@ -19,8 +19,8 @@ module AsmCodeGen ( nativeCodeGen ) where #include "HsVersions.h" #include "nativeGen/NCG.h" -import MachInstrs -import MachRegs +import Instrs +import Regs import MachCodeGen import PprMach import RegAllocInfo diff --git a/compiler/nativeGen/MachInstrs.hs b/compiler/nativeGen/Instrs.hs similarity index 92% rename from compiler/nativeGen/MachInstrs.hs rename to compiler/nativeGen/Instrs.hs index a3e2d2b..3f38a36 100644 --- a/compiler/nativeGen/MachInstrs.hs +++ b/compiler/nativeGen/Instrs.hs @@ -16,7 +16,7 @@ #include "nativeGen/NCG.h" -module MachInstrs ( +module Instrs ( NatCmm, NatCmmTop, NatBasicBlock, @@ -33,7 +33,7 @@ module MachInstrs ( #elif sparc_TARGET_ARCH module SPARC.Instr #else -#error "MachInstrs: not defined for this architecture" +#error "Instrs: not defined for this architecture" #endif ) @@ -42,7 +42,7 @@ where #include "HsVersions.h" import BlockId -import MachRegs +import Regs import Cmm import CLabel ( CLabel, pprCLabel ) import Panic ( panic ) @@ -61,7 +61,7 @@ import X86.Instr #elif sparc_TARGET_ARCH import SPARC.Instr #else -#error "MachInstrs: not defined for this architecture" +#error "Instrs: not defined for this architecture" #endif diff --git a/compiler/nativeGen/MachCodeGen.hs b/compiler/nativeGen/MachCodeGen.hs index 5f973ef..d16962c 100644 --- a/compiler/nativeGen/MachCodeGen.hs +++ b/compiler/nativeGen/MachCodeGen.hs @@ -25,12 +25,11 @@ module MachCodeGen ( cmmTopCodeGen, InstrBlock ) where #include "MachDeps.h" -- NCG stuff: -import MachInstrs -import MachRegs +import Instrs +import Regs import NCGMonad import PositionIndependentCode import RegAllocInfo ( mkBranchInstr, mkRegRegMoveInstr ) -import MachRegs import PprMach -- Our intermediate code: @@ -5190,7 +5189,7 @@ coerceFP2Int fromRep toRep x = do -- We (allegedly) put the first six C-call arguments in registers; -- where do we start putting the rest of them? --- Moved from MachInstrs (SDM): +-- Moved from Instrs (SDM): #if alpha_TARGET_ARCH || sparc_TARGET_ARCH eXTRA_STK_ARGS_HERE :: Int diff --git a/compiler/nativeGen/NCGMonad.hs b/compiler/nativeGen/NCGMonad.hs index 98bffb6..d19cda4 100644 --- a/compiler/nativeGen/NCGMonad.hs +++ b/compiler/nativeGen/NCGMonad.hs @@ -20,7 +20,7 @@ module NCGMonad ( import BlockId import CLabel ( CLabel, mkAsmTempLabel ) -import MachRegs +import Regs import UniqSupply import Unique ( Unique ) import DynFlags diff --git a/compiler/nativeGen/PPC/Instr.hs b/compiler/nativeGen/PPC/Instr.hs index beb9e15..a6cc758 100644 --- a/compiler/nativeGen/PPC/Instr.hs +++ b/compiler/nativeGen/PPC/Instr.hs @@ -19,7 +19,7 @@ module PPC.Instr ( where import BlockId -import MachRegs +import Regs import Cmm import Outputable import FastString diff --git a/compiler/nativeGen/PositionIndependentCode.hs b/compiler/nativeGen/PositionIndependentCode.hs index edb8846..1635909 100644 --- a/compiler/nativeGen/PositionIndependentCode.hs +++ b/compiler/nativeGen/PositionIndependentCode.hs @@ -65,8 +65,8 @@ import CLabel ( CLabel, pprCLabel, import CLabel ( mkForeignLabel ) #endif -import MachRegs -import MachInstrs +import Regs +import Instrs import NCGMonad ( NatM, getNewRegNat, getNewLabelNat ) import StaticFlags ( opt_PIC, opt_Static ) diff --git a/compiler/nativeGen/PprMach.hs b/compiler/nativeGen/PprMach.hs index 9e85198..1e6f458 100644 --- a/compiler/nativeGen/PprMach.hs +++ b/compiler/nativeGen/PprMach.hs @@ -28,8 +28,8 @@ module PprMach ( import BlockId import Cmm -import MachRegs -- may differ per-platform -import MachInstrs +import Regs -- may differ per-platform +import Instrs import CLabel ( CLabel, pprCLabel, externallyVisibleCLabel, labelDynamic, mkAsmTempLabel, entryLblToInfoLbl ) diff --git a/compiler/nativeGen/RegAlloc/Graph/Coalesce.hs b/compiler/nativeGen/RegAlloc/Graph/Coalesce.hs index 34e014c..6cea26a 100644 --- a/compiler/nativeGen/RegAlloc/Graph/Coalesce.hs +++ b/compiler/nativeGen/RegAlloc/Graph/Coalesce.hs @@ -9,7 +9,7 @@ module RegAlloc.Graph.Coalesce ( where import Cmm -import MachRegs +import Regs import RegLiveness import RegAllocInfo diff --git a/compiler/nativeGen/RegAlloc/Graph/Main.hs b/compiler/nativeGen/RegAlloc/Graph/Main.hs index b794549..1f04d7f 100644 --- a/compiler/nativeGen/RegAlloc/Graph/Main.hs +++ b/compiler/nativeGen/RegAlloc/Graph/Main.hs @@ -17,8 +17,8 @@ import RegAlloc.Graph.Spill import RegAlloc.Graph.SpillClean import RegAlloc.Graph.SpillCost import RegAlloc.Graph.Stats -import MachRegs -import MachInstrs +import Regs +import Instrs import PprMach import UniqSupply diff --git a/compiler/nativeGen/RegAlloc/Graph/Spill.hs b/compiler/nativeGen/RegAlloc/Graph/Spill.hs index 3a377d2..886f9d4 100644 --- a/compiler/nativeGen/RegAlloc/Graph/Spill.hs +++ b/compiler/nativeGen/RegAlloc/Graph/Spill.hs @@ -11,8 +11,8 @@ where import RegLiveness import RegAllocInfo -import MachRegs -import MachInstrs +import Regs +import Instrs import Cmm import State diff --git a/compiler/nativeGen/RegAlloc/Graph/SpillClean.hs b/compiler/nativeGen/RegAlloc/Graph/SpillClean.hs index ddb2461..ac46b99 100644 --- a/compiler/nativeGen/RegAlloc/Graph/SpillClean.hs +++ b/compiler/nativeGen/RegAlloc/Graph/SpillClean.hs @@ -32,8 +32,8 @@ where import BlockId import RegLiveness import RegAllocInfo -import MachRegs -import MachInstrs +import Regs +import Instrs import Cmm import UniqSet diff --git a/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs b/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs index 8ae87a0..c897a4d 100644 --- a/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs +++ b/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs @@ -19,8 +19,8 @@ where import GraphBase import RegLiveness import RegAllocInfo -import MachInstrs -import MachRegs +import Instrs +import Regs import BlockId import Cmm diff --git a/compiler/nativeGen/RegAlloc/Graph/Stats.hs b/compiler/nativeGen/RegAlloc/Graph/Stats.hs index bf9622d..36d507a 100644 --- a/compiler/nativeGen/RegAlloc/Graph/Stats.hs +++ b/compiler/nativeGen/RegAlloc/Graph/Stats.hs @@ -25,8 +25,8 @@ import RegLiveness import RegAllocInfo import RegAlloc.Graph.Spill import RegAlloc.Graph.SpillCost -import MachRegs -import MachInstrs +import Regs +import Instrs import Cmm import Outputable diff --git a/compiler/nativeGen/RegAlloc/Linear/Base.hs b/compiler/nativeGen/RegAlloc/Linear/Base.hs index 3f9146c..ebd3107 100644 --- a/compiler/nativeGen/RegAlloc/Linear/Base.hs +++ b/compiler/nativeGen/RegAlloc/Linear/Base.hs @@ -22,7 +22,7 @@ import RegAlloc.Linear.FreeRegs import RegAlloc.Linear.StackMap import RegLiveness -import MachRegs +import Regs import Outputable import Unique diff --git a/compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs b/compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs index 1dd7da2..5c63346 100644 --- a/compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs +++ b/compiler/nativeGen/RegAlloc/Linear/JoinToTargets.hs @@ -20,8 +20,8 @@ import RegAlloc.Linear.Base import RegAlloc.Linear.FreeRegs import BlockId -import MachInstrs -import MachRegs +import Instrs +import Regs import RegAllocInfo import RegLiveness import Cmm hiding (RegSet) diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs index 3b1d5ca..1d2c78b 100644 --- a/compiler/nativeGen/RegAlloc/Linear/Main.hs +++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs @@ -98,8 +98,8 @@ import RegAlloc.Linear.Stats import RegAlloc.Linear.JoinToTargets import BlockId -import MachRegs -import MachInstrs +import Regs +import Instrs import RegAllocInfo import RegLiveness import Cmm hiding (RegSet) diff --git a/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs index 1e31625..6d8809d 100644 --- a/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs +++ b/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs @@ -3,7 +3,7 @@ module RegAlloc.Linear.PPC.FreeRegs where -import MachRegs +import Regs import Outputable diff --git a/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs index e46d87d..f840532 100644 --- a/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs +++ b/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs @@ -3,7 +3,7 @@ module RegAlloc.Linear.SPARC.FreeRegs where -import MachRegs +import Regs import Outputable diff --git a/compiler/nativeGen/RegAlloc/Linear/State.hs b/compiler/nativeGen/RegAlloc/Linear/State.hs index 428b0ca..a7f49d1 100644 --- a/compiler/nativeGen/RegAlloc/Linear/State.hs +++ b/compiler/nativeGen/RegAlloc/Linear/State.hs @@ -35,8 +35,8 @@ import RegAlloc.Linear.Base import RegAlloc.Linear.FreeRegs -import MachInstrs -import MachRegs +import Instrs +import Regs import RegAllocInfo import RegLiveness diff --git a/compiler/nativeGen/RegAlloc/Linear/Stats.hs b/compiler/nativeGen/RegAlloc/Linear/Stats.hs index f20ad60..c139db7 100644 --- a/compiler/nativeGen/RegAlloc/Linear/Stats.hs +++ b/compiler/nativeGen/RegAlloc/Linear/Stats.hs @@ -9,7 +9,7 @@ where import RegAlloc.Linear.Base import RegLiveness import RegAllocInfo -import MachInstrs +import Instrs import Cmm (GenBasicBlock(..)) import UniqFM diff --git a/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs index 5d7fc63..1306deb 100644 --- a/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs +++ b/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs @@ -3,7 +3,7 @@ module RegAlloc.Linear.X86.FreeRegs where -import MachRegs +import Regs import Data.Word import Data.Bits diff --git a/compiler/nativeGen/RegAllocInfo.hs b/compiler/nativeGen/RegAllocInfo.hs index 57c9ce6..4f85a08 100644 --- a/compiler/nativeGen/RegAllocInfo.hs +++ b/compiler/nativeGen/RegAllocInfo.hs @@ -39,8 +39,8 @@ module RegAllocInfo ( import BlockId import Cmm import CLabel -import MachInstrs -import MachRegs +import Instrs +import Regs import Outputable import Constants ( rESERVED_C_STACK_BYTES ) import FastBool diff --git a/compiler/nativeGen/RegLiveness.hs b/compiler/nativeGen/RegLiveness.hs index fc8749c..ea608bc 100644 --- a/compiler/nativeGen/RegLiveness.hs +++ b/compiler/nativeGen/RegLiveness.hs @@ -31,8 +31,8 @@ module RegLiveness ( ) where import BlockId -import MachRegs -import MachInstrs +import Regs +import Instrs import PprMach import RegAllocInfo import Cmm hiding (RegSet) diff --git a/compiler/nativeGen/MachRegs.hs b/compiler/nativeGen/Regs.hs similarity index 96% rename from compiler/nativeGen/MachRegs.hs rename to compiler/nativeGen/Regs.hs index 828a3bc..97ecee6 100644 --- a/compiler/nativeGen/MachRegs.hs +++ b/compiler/nativeGen/Regs.hs @@ -11,7 +11,7 @@ #include "nativeGen/NCG.h" -module MachRegs ( +module Regs ( -------------------------------- -- Generic things, shared by all architectures. module RegsBase, @@ -121,7 +121,7 @@ import X86.Regs #elif sparc_TARGET_ARCH import SPARC.Regs #else -#error "MachRegs: not defined for this architecture" +#error "Regs: not defined for this architecture" #endif @@ -181,7 +181,7 @@ allocatableRegsInClass cls = case cls of RcInteger -> allocatableRegsInteger RcDouble -> allocatableRegsDouble - RcFloat -> panic "MachRegs.allocatableRegsInClass: no match\n" + RcFloat -> panic "Regs.allocatableRegsInClass: no match\n" allocatableRegsInteger :: Int allocatableRegsInteger @@ -218,7 +218,7 @@ trivColorable classN conflicts exclusions = case regClass r of RcInteger -> (cd+1, cf) RcDouble -> (cd, cf+1) - _ -> panic "MachRegs.trivColorable: reg class not handled" + _ -> panic "Regs.trivColorable: reg class not handled" tmp = foldUniqSet acc (0, 0) conflicts (countInt, countFloat) = foldUniqSet acc tmp exclusions @@ -256,7 +256,7 @@ worst n classN classC -- There is an allocatableRegsInClass :: RegClass -> Int, but doing the unboxing -- is too slow for us here. -- --- Compare MachRegs.freeRegs and MachRegs.h to get these numbers. +-- Compare Regs.freeRegs and MachRegs.h to get these numbers. -- #if i386_TARGET_ARCH #define ALLOCATABLE_REGS_INTEGER (_ILIT(3)) diff --git a/compiler/nativeGen/SPARC/Instr.hs b/compiler/nativeGen/SPARC/Instr.hs index 7f782c9..5cbf2fe 100644 --- a/compiler/nativeGen/SPARC/Instr.hs +++ b/compiler/nativeGen/SPARC/Instr.hs @@ -22,7 +22,7 @@ module SPARC.Instr ( where import BlockId -import MachRegs +import Regs import Cmm import Outputable import Constants ( wORD_SIZE ) diff --git a/compiler/nativeGen/X86/Instr.hs b/compiler/nativeGen/X86/Instr.hs index cbf5179..544dc6b 100644 --- a/compiler/nativeGen/X86/Instr.hs +++ b/compiler/nativeGen/X86/Instr.hs @@ -13,7 +13,7 @@ module X86.Instr where import BlockId -import MachRegs +import Regs import Cmm import FastString -- 1.7.10.4