chips/marina/electric/centersJ.delib/ctrAND4in40Y.sch

   1 HcentersJ|8.10k
   2
   3 # External Libraries:
   4
   5 LredFive|redFive
   6
   7 # Cell ctrAND4in40Y;1{sch}
   8 CctrAND4in40Y;1{sch}||schematic|1188767434401|1224336015959||LEDRIVE_nand2@0()F41.56108|LEDRIVE_nand2@1()F41.56108|LEDRIVE_nor2n@0.nor2()F48.696438
   9 Ngeneric:Facet-Center|art@0||0|0||||AV
  10 NOff-Page|conn@0||-4|0||||
  11 NOff-Page|conn@1||-24|-3|||Y|
  12 NOff-Page|conn@2||-24|3|||Y|
  13 IredFive:nand2_sy;1{ic}|nand2_sy@0||-12.5|0|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S40|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  14 Ngeneric:Invisible-Pin|pin@0||-13.5|27.5|||||ART_message(D5G5;)SctrAND4in40Y
  15 Ngeneric:Invisible-Pin|pin@1||-13|23.5|||||ART_message(D5G3;)Sies 15 October 2008
  16 Ngeneric:Invisible-Pin|pin@2||-15|19.5|||||ART_message(D5G2;)Sthis is the common part of 4 processes
  17 NWire_Pin|pin@18||-17|3||||
  18 NWire_Pin|pin@27||-17|1||||
  19 NWire_Pin|pin@28||-17|-3||||
  20 NWire_Pin|pin@29||-17|-1||||
  21 Awire|net@56|||900|pin@18||-17|3|pin@27||-17|1
  22 Awire|net@57|||1800|pin@27||-17|1|nand2_sy@0|inb|-15|1
  23 Awire|net@59|||2700|pin@28||-17|-3|pin@29||-17|-1
  24 Awire|net@60|||1800|pin@29||-17|-1|nand2_sy@0|ina|-15|-1
  25 Awire|net@87|||1800|nand2_sy@0|out|-10|0|conn@0|a|-6|0
  26 Awire|net@102|||0|pin@28||-17|-3|conn@1|y|-22|-3
  27 Awire|net@103|||0|pin@18||-17|3|conn@2|y|-22|3
  28 EinA||D4G2;|conn@1|a|I
  29 EinB||D4G2;|conn@2|a|I
  30 Eout||D6G2;|conn@0|y|O
  31 X