migrate jelib->delib
[fleet.git] / chips / marina / electric / compareM.delib / countCompGasP.ic
1 HcompareM|8.10k
2
3 # Cell countCompGasP;1{ic}
4 CcountCompGasP;1{ic}||artwork|1242033982423|1243246631749|EI
5 Ngeneric:Facet-Center|art@0||0|0||||AV
6 NThick-Circle|art@1||4.5|-2|1|1||
7 Nschematic:Bus_Pin|pin@0||5|0|-1|-1||
8 Nschematic:Bus_Pin|pin@2||5|-2|-1|-1||
9 Nschematic:Bus_Pin|pin@4||5|2|-1|-1|X|
10 Ngeneric:Invisible-Pin|pin@5||4|2|1|1|X|
11 Nschematic:Bus_Pin|pin@6||-3|6|-1|-1||
12 Nschematic:Bus_Pin|pin@10||-5|4|-1|-1||
13 Nschematic:Bus_Pin|pin@12||5|-4|-1|-1||
14 NPin|pin@18||-4|-5|1|1||
15 NPin|pin@19||-4|5|1|1||
16 NPin|pin@20||4|5|1|1||
17 NPin|pin@21||4|-5|1|1||
18 NPin|pin@30||4|-4|1|1||
19 NPin|pin@31||5|-4|1|1||
20 NPin|pin@36||-3|5|1|1||
21 NPin|pin@37||-3|6|1|1||
22 Nschematic:Bus_Pin|pin@38||3|6|-1|-1||
23 Ngeneric:Invisible-Pin|pin@41||3|5|1|1||
24 Ngeneric:Invisible-Pin|pin@42||0|0|||||ART_message(D5G2;)S[Count,Comp,GasP]
25 Ngeneric:Invisible-Pin|pin@46||-4|4|1|1||
26 NPin|pin@49||4|0|1|1||
27 NPin|pin@50||5|0|1|1||
28 Nschematic:Bus_Pin|pin@53||0|-6|-1|-1||
29 Ngeneric:Invisible-Pin|pin@54||0|-5|1|1||
30 Aschematic:bus|net@2||-0.5|IJ1800|pin@5||4|2|pin@4||5|2
31 AThicker|net@10|||FS1800|pin@36||-3|5|pin@20||4|5
32 AThicker|net@21|||FS900|pin@30||4|-4|pin@21||4|-5
33 AThicker|net@22|||FS1800|pin@30||4|-4|pin@31||5|-4
34 AThicker|net@27|||FS1800|pin@19||-4|5|pin@36||-3|5
35 AThicker|net@28|||FS2700|pin@36||-3|5|pin@37||-3|6
36 Aschematic:bus|net@31||-0.5|IJ2700|pin@41||3|5|pin@38||3|6
37 AThicker|net@33|||FS2700|pin@18||-4|-5|pin@19||-4|5
38 Aschematic:bus|net@35||-0.5|IJ0|pin@46||-4|4|pin@10||-5|4
39 AThicker|net@36|||FS2700|pin@49||4|0|pin@20||4|5
40 AThicker|net@41|||FS2700|pin@30||4|-4|pin@49||4|0
41 AThicker|net@42|||FS1800|pin@49||4|0|pin@50||5|0
42 AThicker|net@44|||FS0|pin@21||4|-5|pin@18||-4|-5
43 Aschematic:bus|net@47||-0.5|IJ900|pin@54||0|-5|pin@53||0|-6
44 Es[4:6]|count[L,E,G]|D5G2;|pin@53||O
45 Ego||D5G2;|pin@0||O
46 EgoLO[1]|goLO|D5G2;|pin@2||I
47 Ein[L,E,G]||D5G2;|pin@4||I
48 Emc||D5G2;|pin@6||I
49 Epred[A,B]||D5G2;|pin@10||I
50 Eready||D5G2;|pin@12||I
51 Es[1:3]||D5G2;|pin@38||O
52 X