chips/marina/electric/compareM.delib/countSucc.sch

   1 HcompareM|8.10k
   2
   3 # External Libraries:
   4
   5 LcentersJ|centersJ
   6
   7 LdriversM|driversM
   8
   9 LorangeTSMC090nm|orangeTSMC090nm
  10
  11 LredFive|redFive
  12
  13 # Cell countSucc;1{sch}
  14 CcountSucc;1{sch}||schematic|1242002248944|1243246631749|I
  15 Ngeneric:Facet-Center|art@0||0|0||||AV
  16 NOff-Page|conn@4||0|18|||RRR|
  17 NOff-Page|conn@7||-15|-7|||RRR|
  18 NOff-Page|conn@8||-15|-22|||R|
  19 NOff-Page|conn@9||-16|25.5|||R|
  20 NOff-Page|conn@11||6|28|||RR|
  21 NOff-Page|conn@12||20|-17|||RR|
  22 IcentersJ:ctrAND3in30A;1{ic}|ctrAND3i@0||12|-6.5|XR||D5G4;
  23 IredFive:inv;1{ic}|inv@7||-3|0|Y||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  24 IredFive:inv;1{ic}|inv@8||18|7|Y||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  25 IredFive:inv;1{ic}|inv@9||30.5|-24|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  26 IredFive:invI;2{ic}|invI@8||-3|-12|Y||D5G4;|ATTR_Delay(D5G1;NPX1.75;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NPX1.25;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  27 IredFive:invI;2{ic}|invI@9||24|12|XYRRR||D5G4;|ATTR_Delay(D5G1;NPX1.75;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NPX1.25;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  28 IredFive:invI;2{ic}|invI@10||24.5|-29.5|XYR||D5G4;|ATTR_Delay(D5G1;NPX1.75;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NPX1.25;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  29 Ngeneric:Invisible-Pin|pin@0||-15.5|43.5|||||ART_message(D5G3;)Sies 18 May 2009
  30 Ngeneric:Invisible-Pin|pin@1||-14.5|49.5|||||ART_message(D5G6;)ScountSucc
  31 NWire_Pin|pin@104||0|11||||
  32 Ngeneric:Invisible-Pin|pin@106||-8.5|-25.5|||||ART_message(D3G2;)S["goLO[1] is one inversion",after go.,ready is a further delayed,version of goLO.,ready=HI indicates that the,calculation box has reset.]
  33 Ngeneric:Invisible-Pin|pin@107||44.5|-30|||||ART_message(D3G2;)S["in[L,E,G] is the result",of the calculation.,They are mutually exclusive.]
  34 NWire_Pin|pin@111||-15|-17||||
  35 NWire_Pin|pin@131||-15|9||||
  36 NWire_Pin|pin@164||3|0|||XY|
  37 NWire_Pin|pin@165||3|-6|||XY|
  38 NWire_Pin|pin@166||-9|-6|||XY|
  39 NWire_Pin|pin@167||-9|-12|||XY|
  40 NWire_Pin|pin@171||3|-12|||X|
  41 NWire_Pin|pin@172||3|-8|||X|
  42 NWire_Pin|pin@184||12|7||||
  43 NWire_Pin|pin@187||10|-17||||
  44 NWire_Pin|pin@189||14|-17||||
  45 NWire_Pin|pin@190||24|7||||
  46 NWire_Pin|pin@192||24.5|-24|||RR|
  47 NWire_Pin|pin@194||36|7||||
  48 NWire_Pin|pin@195||36|-24||||
  49 NWire_Pin|pin@197||12|28||||
  50 NWire_Pin|pin@199||12|-24||||
  51 NWire_Pin|pin@225||-15|0||||
  52 IdriversM:predDri20wMC;1{ic}|predDri2@0||-6.5|9|XY||D5G4;
  53 IorangeTSMC090nm:wire90;1{ic}|wire90@22||-3|-6|XY||D0G4;|ATTR_L(D5G1;PUD)S958|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
  54 IorangeTSMC090nm:wire90;1{ic}|wire90@23||3|7|||D0G4;|ATTR_L(D5G1;PUD)S958|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
  55 IorangeTSMC090nm:wire90;1{ic}|wire90@25||28.5|7|||D0G4;|ATTR_L(D5G1;PUD)S958|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
  56 IorangeTSMC090nm:wire90;1{ic}|wire90@26||20|-24|RR||D0G4;|ATTR_L(D5G1;PUD)S958|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
  57 Awire|fire|D5G2;||900|pin@197||12|28|pin@184||12|7
  58 Awire|net@258|||1800|predDri2@0|mc|-3.5|11|pin@104||0|11
  59 Awire|net@269|||2700|conn@8|y|-15|-20|pin@111||-15|-17
  60 Awire|net@394|||1800|inv@7|out|-0.5|0|pin@164||3|0
  61 Awire|net@395|||900|pin@164||3|0|pin@165||3|-6
  62 Awire|net@396|||0|pin@165||3|-6|wire90@22|a|-0.5|-6
  63 Awire|net@397|||0|wire90@22|b|-5.5|-6|pin@166||-9|-6
  64 Awire|net@398|||900|pin@166||-9|-6|pin@167||-9|-12
  65 Awire|net@399|||1800|pin@167||-9|-12|invI@8|in|-5.5|-12
  66 Awire|net@404|||1800|invI@8|out|-0.5|-12|pin@171||3|-12
  67 Awire|net@408|||1800|pin@131||-15|9|predDri2@0|pred|-9.5|9
  68 Awire|net@441|||2700|ctrAND3i@0|out|12|-0.5|pin@184||12|7
  69 Awire|net@448|||2700|pin@187||10|-17|ctrAND3i@0|inA|10|-12.5
  70 Awire|net@451|||2700|pin@189||14|-17|ctrAND3i@0|inB_1|14|-9.5
  71 Awire|net@452|||1800|wire90@23|b|5.5|7|pin@184||12|7
  72 Awire|net@454|||0|wire90@23|a|0.5|7|predDri2@0|in|-3.5|7
  73 Awire|net@455|||1800|pin@111||-15|-17|pin@187||10|-17
  74 Awire|net@457|||0|pin@190||24|7|inv@8|out|20.5|7
  75 Awire|net@458|||0|wire90@25|a|26|7|pin@190||24|7
  76 Awire|net@459|||900|invI@9|in|24|9.5|pin@190||24|7
  77 Awire|net@461|||1800|pin@192||24.5|-24|inv@9|out|28|-24
  78 Awire|net@462|||1800|wire90@26|a|22.5|-24|pin@192||24.5|-24
  79 Awire|net@463|||2700|invI@10|in|24.5|-27|pin@192||24.5|-24
  80 Awire|net@465|||1800|wire90@25|b|31|7|pin@194||36|7
  81 Awire|net@466|||900|pin@194||36|7|pin@195||36|-24
  82 Awire|net@472|||1800|inv@9|in|33|-24|pin@195||36|-24
  83 Awire|net@476|||2700|pin@199||12|-24|ctrAND3i@0|inB|12|-12.5
  84 Awire|net@479|||0|inv@8|in|15.5|7|pin@184||12|7
  85 Awire|net@480|||0|wire90@26|b|17.5|-24|pin@199||12|-24
  86 Awire|net@481|||0|ctrAND3i@0|out_1|12.5|-5|ctrAND3i@0|out_1|12.5|-5
  87 Awire|net@539|||900|pin@131||-15|9|pin@225||-15|0
  88 Awire|net@540|||900|pin@225||-15|0|conn@7|a|-15|-5
  89 Awire|net@541|||0|inv@7|in|-5.5|0|pin@225||-15|0
  90 Awire|net@544|||1800|conn@11|a|8|28|pin@197||12|28
  91 Awire|net@546|||900|conn@4|y|0|16|pin@104||0|11
  92 Awire|net@551|||0|conn@12|y|18|-17|pin@189||14|-17
  93 Awire|s[3]|D5G2;||2700|pin@171||3|-12|pin@172||3|-8
  94 EgoLO[2]|done|D4G2;|conn@12|a|I
  95 Ego_1|fire|D6G2;|conn@11|y|O
  96 Ego||D6G2;|conn@7|y|O
  97 EgoLO[1]||D4G2;|conn@8|a|I
  98 Emc||D4G2;|conn@4|a|I
  99 Es[1:3]|s[3]|D6G2;|conn@9|y|O
 100 X