chips/marina/electric/dukeF.delib/invQx2.lay

   1 HdukeF|8.10k
   2
   3 # Cell invQx2;1{lay}
   4 CinvQx2;1{lay}||cmos90|1184003385045|1240848417057|I|ATTR_NCC(D5G3;NTY210;)S["exportsConnectedByParent vdd /vdd_[0-9]+/","exportsConnectedByParent gnd /gnd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1243262533078
   5 Ngeneric:Facet-Center|art@0||0|0||||AV
   6 IinvQ;1{lay}|invQ@0||0|0|Y||D5G4;
   7 IinvQ;1{lay}|invQ@1||0|144|XY||D5G4;
   8 NMetal-1-Pin|pin@0||-8|72||||
   9 NMetal-1-Pin|pin@2||-6|72||||
  10 Ametal-1|net@0|||S900|invQ@1|in|-8|120|pin@0||-8|72
  11 Ametal-1|net@2|||S1800|pin@0||-8|72|pin@2||-6|72
  12 Ametal-1|net@3|||S2700|invQ@0|out|-6|-24|pin@2||-6|72
  13 Ametal-1|net@6|||S0|invQ@1|out|6|120|invQ@1|out|6|120
  14 Egnd||D5G2;|invQ@0|gnd|G
  15 Egnd_1||D5G2;|invQ@0|gnd_1|G
  16 Egnd_2||D5G2;|invQ@1|gnd|G
  17 Egnd_3||D5G2;|invQ@1|gnd_1|G
  18 Ein||D5G2;|invQ@0|in|I
  19 Eout||D5G2;|invQ@0|out|O
  20 Evdd||D5G2;|invQ@0|vdd|P
  21 Evdd_1||D5G2;|invQ@0|vdd_1|P
  22 Evdd_2||D5G2;|invQ@0|vdd_2|P
  23 Evdd_3||D5G2;|invQ@0|vdd_3|P
  24 Evdd_4||D5G2;|invQ@1|vdd|P
  25 Evdd_5||D5G2;|invQ@1|vdd_1|P
  26 Evdd_6||D5G2;|invQ@1|vdd_2|P
  27 Evdd_7||D5G2;|invQ@1|vdd_3|P
  28 X