chips/marina/electric/dukeF.delib/invQx4.sch

   1 HdukeF|8.10k
   2
   3 # External Libraries:
   4
   5 LredFive|redFive
   6
   7 # Cell invQx4;1{sch}
   8 CinvQx4;1{sch}||schematic|1183222948533|1185132560410|I
   9 Ngeneric:Facet-Center|art@0||0|0||||AV
  10 NOff-Page|conn@0||10.5|0||||
  11 NOff-Page|conn@1||-9|0||||
  12 IredFive:inv;1{ic}|inv@0||0|0|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  13 IredFive:inv;1{ic}|inv@1||0|7|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  14 IredFive:inv;1{ic}|inv@2||0|13|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  15 IredFive:inv;1{ic}|inv@3||0|19|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  16 IinvQx4;1{ic}|invQx2@0||16|18|||D5G4;
  17 Ngeneric:Invisible-Pin|pin@0||0|30|||||ART_message(D5G6;)SinvQx4
  18 Ngeneric:Invisible-Pin|pin@3||0|25.5|||||ART_message(D5G3;)Sies 9 July 2007
  19 NWire_Pin|pin@4||4|7||||
  20 NWire_Pin|pin@5||4|0||||
  21 NWire_Pin|pin@6||4|13||||
  22 NWire_Pin|pin@8||4|19||||
  23 Awire|net@0|||1800|conn@1|y|-7|0|inv@0|in|-2.5|0
  24 Awire|net@1|||1800|pin@5||4|0|conn@0|a|8.5|0
  25 Awire|net@2|||1800|inv@1|in|2.5|7|pin@4||4|7
  26 Awire|net@3|||1800|inv@0|out|2.5|0|pin@5||4|0
  27 Awire|net@4|||900|pin@4||4|7|pin@5||4|0
  28 Awire|net@5|||1800|inv@2|in|2.5|13|pin@6||4|13
  29 Awire|net@6|||900|pin@6||4|13|pin@4||4|7
  30 Awire|net@8|||1800|inv@3|in|2.5|19|pin@8||4|19
  31 Awire|net@9|||2700|pin@6||4|13|pin@8||4|19
  32 Ein||D4G2;|conn@1|a|I
  33 Eout||D6G2;|conn@0|y|O
  34 X