chips/marina/electric/fillM.delib/fill1to8VDDctr.lay

   1 HfillM|8.10k
   2
   3 # Cell fill1to8VDDctr;1{lay}
   4 Cfill1to8VDDctr;1{lay}||cmos90|1238155627862|1244843148038||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1244843464912
   5 Ngeneric:Facet-Center|art@0||0|0||||AV
   6 Ifill4to8;1{lay}|fill4to8@0||0|0|||D5G4;
   7 Ifill234VDDctr;2{lay}|fill234V@1||0|0|||D5G4;
   8 IfillCap;2{lay}|fillCap@1||0|0|||D5G4;
   9 Ametal-4|net@0|||S0|fill234V@1|vdd_4|-72|36|fill4to8@0|vdd_8|-72|36
  10 Ametal-4|net@1|||S0|fill234V@1|gnd_3|-72|-36|fill4to8@0|gnd_8|-72|-36
  11 Ametal-4|net@2|||S0|fill234V@1|gnd_1|72|-36|fill4to8@0|gnd_9|72|-36
  12 Ametal-4|net@3|||S0|fill234V@1|vdd_1|72|36|fill4to8@0|vdd_9|72|36
  13 Ametal-2|net@5|||S0|fillCap@1|gnd_1|72|0|fill234V@1|gnd|72|0
  14 Ametal-2|net@6|||S0|fillCap@1|gnd|-72|0|fill234V@1|gnd_2|-72|0
  15 Ametal-2|net@7|||S0|fillCap@1|vdd_2|72|-50|fill234V@1|vdd_2|72|-50
  16 Ametal-2|net@8|||S0|fillCap@1|vdd|-72|-50|fill234V@1|vdd_5|-72|-50
  17 Ametal-2|net@9|||S0|fillCap@1|vdd_3|72|50|fill234V@1|vdd_6|72|50
  18 Ametal-2|net@10|||S0|fill234V@1|vdd_3|-72|50|fillCap@1|vdd_1|-72|50
  19 Egnd||D5G2;|fill4to8@0|gnd|U
  20 Egnd_2||D5G2;|fill4to8@0|gnd_10|U
  21 Egnd_4||D5G2;|fill4to8@0|gnd_4|G
  22 Egnd_5||D5G2;|fill4to8@0|gnd_5|G
  23 Egnd_6||D5G2;|fill4to8@0|gnd_6|G
  24 Egnd_7||D5G2;|fill4to8@0|gnd_7|G
  25 Egnd_11||D5G2;|fill4to8@0|gnd_11|U
  26 Egnd_12||D5G2;|fill4to8@0|gnd_12|U
  27 Evdd||D5G2;|fill4to8@0|vdd|U
  28 Evdd_2||D5G2;|fill4to8@0|vdd_10|U
  29 Evdd_4||D5G2;|fill4to8@0|vdd_4|P
  30 Evdd_5||D5G2;|fill4to8@0|vdd_5|P
  31 Evdd_6||D5G2;|fill4to8@0|vdd_6|P
  32 Evdd_7||D5G2;|fill4to8@0|vdd_7|P
  33 Evdd_8||D5G2;|fill234V@1|vdd|P
  34 Evdd_9||D5G2;|fill234V@1|vdd_7|P
  35 Evdd_11||D5G2;|fill4to8@0|vdd_11|U
  36 Evdd_12||D5G2;|fill4to8@0|vdd_12|U
  37 X