chips/marina/electric/gates1inM.delib/inv05.lay

   1 Hgates1inM|8.10k
   2
   3 # External Libraries:
   4
   5 LwiresL|wiresL
   6
   7 # Cell inv05;1{lay}
   8 Cinv05;1{lay}||cmos90|1188767772815|1241981698008||ATTR_NCC(D5G3;NTX5.5;Y70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
   9 Ngeneric:Facet-Center|art@0||0|0||||AV
  10 NMetal-1-N-Active-Con|contact@38||4.5|0||5.2|X|
  11 NMetal-1-P-Active-Con|contact@39||4.5|-48||20.8|X|
  12 NMetal-1-N-Active-Con|contact@40||-4.5|0||10.4|X|
  13 NMetal-1-P-Active-Con|contact@41||-4.5|-48||20.8|X|
  14 NX-Metal-1-Metal-2-Con|contact@67||-4.5|0||6.2||
  15 NX-Metal-1-Metal-2-Con|contact@87||-4.5|-50||6.2||
  16 NMetal-1-Polysilicon-Con|contact@88||2|14.5|5.2||R|
  17 NN-Transistor|nmos@15||0.5|0||11|X|
  18 NMetal-1-Pin|pin@72||2|15||||
  19 NPolysilicon-Pin|pin@91||0.5|11.9||||
  20 NMetal-1-Pin|pin@92||4.5|-7||||
  21 IwiresL:pinsVddGnd;1{lay}|pinsVddG@2||-9|0|||D5G4;
  22 IwiresL:pinsVddGnd;1{lay}|pinsVddG@3||9|0|||D5G4;
  23 NP-Select-Node|plnode@21||0|50|20|52||A
  24 NP-Select-Node|plnode@22||0|-50|20|52||A
  25 NN-Well-Node|plnode@25||0|50|23|52||A
  26 NN-Well-Node|plnode@26||0|-50|23|52||A
  27 NN-Select-Node|plnode@27||0|0|20|48||A
  28 NP-Well-Node|plnode@29||0|0|23|48||A
  29 NP-Transistor|pmos@28||0.5|-48||26|X|
  30 AN-Active|net@554|||RS0|contact@38||4.5|0|nmos@15|diff-left|3.3|0
  31 AP-Active|net@556|||RS0|contact@39||4.5|-48|pmos@28|diff-left|3.3|-48
  32 Ametal-1|net@560|||S1800|contact@40||-4.5|0|contact@67||-4.5|0
  33 Ametal-1|net@562|||S900|contact@41||-4.5|-50|contact@87||-4.5|-50
  34 Ametal-1|net@576|||S2700|contact@39||4.5|-37.6|pin@92||4.5|-7
  35 Ametal-1|net@586|||S2700|pin@72||2|15|contact@88||2|17
  36 APolysilicon|net@587|||S900|nmos@15|poly-bottom|0.5|-10.5|pmos@28|poly-top|0.5|-30
  37 AN-Active|net@588|||RS1800|contact@40||-4.5|0|nmos@15|diff-right|-2.3|0
  38 AP-Active|net@589|||RS1800|contact@41||-4.5|-48|pmos@28|diff-right|-2.3|-48
  39 APolysilicon|net@590|||S2700|nmos@15|poly-top|0.5|10.5|pin@91||0.5|11.9
  40 APolysilicon|net@591|||S1800|pin@91||0.5|11.9|contact@88||2|11.9
  41 Ametal-1|net@592|||S2700|pin@92||4.5|-7|contact@38||4.5|-2.6
  42 Ametal-2|net@602||6.2|S0|pinsVddG@3|vdd|9|50|pinsVddG@2|vdd|-9|50
  43 Ametal-2|net@603||6.2|S1800|contact@67||-4.5|0|pinsVddG@3|gnd|9|0
  44 Ametal-2|net@604||6.2|S0|contact@67||-4.5|0|pinsVddG@2|gnd|-9|0
  45 Ametal-2|net@605||6.2|S1800|contact@87||-4.5|-50|pinsVddG@3|vdd_1|9|-50
  46 Ametal-2|net@606||6.2|S0|contact@87||-4.5|-50|pinsVddG@2|vdd_1|-9|-50
  47 Egnd||D5G2;|pinsVddG@2|gnd|G
  48 Egnd_1||D5G2;|pinsVddG@3|gnd|G
  49 Ein[1]||D5G2;|pin@72||I
  50 Eout[1]||D5G2;|pin@92||O
  51 Evdd||D5G2;|pinsVddG@2|vdd|P
  52 Evdd_1||D5G2;|pinsVddG@2|vdd_1|P
  53 Evdd_2||D5G2;|pinsVddG@3|vdd|P
  54 Evdd_3||D5G2;|pinsVddG@3|vdd_1|P
  55 X