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[fleet.git] / chips / marina / electric / gates2inM.delib / andOrInvert15.ic
1 Hgates2inM|8.10k
2
3 # Cell andOrInvert15;1{ic}
4 CandOrInvert15;1{ic}||artwork|1191629949737|1230848494384|E
5 Ngeneric:Facet-Center|art@0||0|0||||AV
6 NThick-Circle|art@2||-2|-2|4|4|RRR||ART_degrees()F[0.0,3.1415927]
7 NThick-Circle|art@5||5.5|0|1|1||
8 NThick-Circle|art@6||-2|2|4|4|RRR||ART_degrees()F[0.0,3.1415927]
9 NThick-Circle|art@7||-5.5|0|12|12|3150||ART_degrees()F[0.0,1.5707964]
10 NThick-Circle|art@8||1.5|3|1|1||
11 NThick-Circle|art@9||1.5|-3|1|1||
12 Nschematic:Bus_Pin|pin@0||-4.5|-3|-1|-1||
13 Nschematic:Bus_Pin|pin@1||-4.5|3|-1|-1||
14 Nschematic:Bus_Pin|pin@2||-4.5|-1|-1|-1||
15 Nschematic:Bus_Pin|pin@3||6|0|-1|-1||
16 NPin|pin@4||-2|0|1|1||
17 NPin|pin@5||-4.5|0|1|1||
18 NPin|pin@6||-4.5|-4|1|1||
19 NPin|pin@7||-2|-4|1|1||
20 NPin|pin@8||-4.5|-2.5|1|1||
21 NPin|pin@9||-3|-4|1|1||
22 Ngeneric:Invisible-Pin|pin@10||1.5|0|||||ART_message(D5G3;)S15
23 Nschematic:Bus_Pin|pin@11||-4.5|1|-1|-1||
24 NPin|pin@12||-1.5|4.5|1|1||
25 NPin|pin@13||5|0|1|1||
26 NPin|pin@14||-1.5|-4.5|1|1||
27 NPin|pin@15||-2|0|1|1|Y|
28 NPin|pin@16||-4.5|0|1|1|Y|
29 NPin|pin@17||-4.5|4|1|1|Y|
30 NPin|pin@18||-2|4|1|1|Y|
31 NPin|pin@19||-4.5|2.5|1|1|Y|
32 NPin|pin@20||-3|4|1|1|Y|
33 Nschematic:Bus_Pin|pin@21||2|-3|-1|-1||
34 Nschematic:Bus_Pin|pin@22||2|3|-1|-1||
35 AThicker|net@0|||FS0|pin@4||-2|0|pin@5||-4.5|0
36 AThicker|net@1|||FS900|pin@5||-4.5|0|pin@8||-4.5|-2.5
37 AThicker|net@2|||FS1800|pin@6||-4.5|-4|pin@7||-2|-4
38 AThicker|net@3|||FS900|pin@8||-4.5|-2.5|pin@6||-4.5|-4
39 AThicker|net@4|||FS1350|pin@8||-4.5|-2.5|pin@9||-3|-4
40 AThicker|net@5|||FS1453|pin@12||-1.5|4.5|pin@13||5|0
41 AThicker|net@6|||FS347|pin@13||5|0|pin@14||-1.5|-4.5
42 AThicker|net@7|||FS0|pin@15||-2|0|pin@16||-4.5|0
43 AThicker|net@8|||FS2700|pin@16||-4.5|0|pin@19||-4.5|2.5
44 AThicker|net@9|||FS1800|pin@17||-4.5|4|pin@18||-2|4
45 AThicker|net@10|||FS2700|pin@19||-4.5|2.5|pin@17||-4.5|4
46 AThicker|net@11|||FS2250|pin@19||-4.5|2.5|pin@20||-3|4
47 Eout_1|Abar|D5G2;|pin@21||O
48 EinA|AtoD|D5G2;|pin@0||I
49 EAbar_1|Bbar|D5G2;|pin@22||O
50 EinB|BtoD|D5G2;|pin@1||I
51 EinC|fire[A]|D5G2;|pin@2||I
52 EBtoD_1|fire[B]|D5G2;|pin@11||I
53 Eout||D5G2;|pin@3||O
54 X