chips/marina/electric/gates2inM.delib/nand20.sch

   1 Hgates2inM|8.10k
   2
   3 # External Libraries:
   4
   5 LredFive|redFive
   6
   7 # Cell nand20;1{sch}
   8 Cnand20;1{sch}||schematic|1200097511876|1205536772914|
   9 Ngeneric:Facet-Center|art@0||0|0||||AV
  10 NOff-Page|conn@0||8|0||||
  11 NOff-Page|conn@1||-12.5|1|||Y|
  12 NOff-Page|conn@2||-12.5|-1|||Y|
  13 IredFive:nand2;1{ic}|nand2@0||-0.5|0|XRR||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  14 Ngeneric:Invisible-Pin|pin@0||0|28.5|||||ART_message(D5G5;)Snand20
  15 Ngeneric:Invisible-Pin|pin@1||0.5|24.5|||||ART_message(D5G3;)Sies 11 January 2007
  16 Awire|net@0|||1800|conn@1|y|-10.5|1|nand2@0|ina|-3|1
  17 Awire|net@1|||0|nand2@0|inb|-3|-1|conn@2|y|-10.5|-1
  18 Awire|net@2|||1800|nand2@0|out|2|0|conn@0|a|6|0
  19 EinA||D4G2;|conn@1|a|I
  20 EinB||D4G2;|conn@2|a|I
  21 Eout||D6G2;|conn@0|y|O
  22 X