chips/marina/electric/gates2inM.delib/nor10symHT.sch

   1 Hgates2inM|8.10k
   2
   3 # External Libraries:
   4
   5 LredFive|redFive
   6
   7 # Cell nor10symHT;1{sch}
   8 Cnor10symHT;1{sch}||schematic|1204806414910|1226018019239|
   9 Ngeneric:Facet-Center|art@0||0|0||||AV
  10 NOff-Page|conn@0||-10.5|3.5|||Y|
  11 NOff-Page|conn@1||8.5|0.5||||
  12 NOff-Page|conn@2||-10.5|-2.5|||Y|
  13 IredFive:nor2HT_sya;2{ic}|nor2HT_s@1||-1.5|0.5|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-1.75;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.75;Y2.75;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  14 Ngeneric:Invisible-Pin|pin@0||-1.5|24|||||ART_message(D5G5;)Snor10symHT
  15 Ngeneric:Invisible-Pin|pin@1||-1|20|||||ART_message(D5G3;)Sies  6 November 2008
  16 NWire_Pin|pin@2||-6.5|3.5||||
  17 NWire_Pin|pin@3||-6.5|1.5||||
  18 NWire_Pin|pin@4||-6.5|-2.5||||
  19 NWire_Pin|pin@5||-6.5|-0.5||||
  20 Awire|net@0|||1800|conn@0|y|-8.5|3.5|pin@2||-6.5|3.5
  21 Awire|net@1|||900|pin@2||-6.5|3.5|pin@3||-6.5|1.5
  22 Awire|net@2|||1800|pin@3||-6.5|1.5|nor2HT_s@1|inb|-4|1.5
  23 Awire|net@3|||1800|conn@2|y|-8.5|-2.5|pin@4||-6.5|-2.5
  24 Awire|net@4|||2700|pin@4||-6.5|-2.5|pin@5||-6.5|-0.5
  25 Awire|net@5|||1800|pin@5||-6.5|-0.5|nor2HT_s@1|ina|-4|-0.5
  26 Awire|net@11|||1800|nor2HT_s@1|out|1|0.5|conn@1|a|6.5|0.5
  27 EinA||D4G2;|conn@2|a|I
  28 EinB||D4G2;|conn@0|a|I
  29 Eout||D6G2;|conn@1|y|O
  30 X