migrate jelib->delib
[fleet.git] / chips / marina / electric / jtagController.delib / PMOSwk.lay
1 HjtagController|8.10k
2
3 # Cell PMOSwk;1{lay}
4 CPMOSwk;1{lay}||cmos90|1100133273232|1240848417057|I|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1243254726645
5 Ngeneric:Facet-Center|art@0||0|0||||AV
6 NMetal-1-P-Active-Con|contact@0||8|10||||
7 NMetal-1-P-Active-Con|contact@1||22|10||||
8 NMetal-1-Polysilicon-Con|contact@2||15|17||||
9 NMetal-1-Pin|pin@1||8|10||||
10 NMetal-1-Pin|pin@2||22|10||||
11 NMetal-1-Pin|pin@3||15|17||||
12 NP-Select-Node|plnode@1||15|20|16|10||
13 NN-Well-Node|plnode@3||15|13.5|28|26||
14 NP-Select-Node|plnode@4||15|12.75|25|24.5||
15 NP-Transistor|pmos@0||15|10|2|||
16 AP-Active|net@0|||S0|pmos@0|diff-left|10.8|10|contact@0||8|10
17 AP-Active|net@1|||S1800|pmos@0|diff-right|19.2|10|contact@1||22|10
18 Ametal-1|net@3|||S900|pin@1||8|10|contact@0||8|10
19 Ametal-1|net@4|||S900|pin@2||22|10|contact@1||22|10
20 APolysilicon|net@5|||S900|contact@2||15|17|pmos@0|poly-top|15|15
21 Ametal-1|net@6|||S900|pin@3||15|17|contact@2||15|17
22 Ed||D5G2;|pin@2||B
23 Eg||D5G2;|pin@3||I
24 Es||D5G2;|pin@1||B
25 X