migrate jelib->delib
[fleet.git] / chips / marina / electric / jtagController.delib / slaveBit.lay
1 HjtagController|8.10k
2
3 # External Libraries:
4
5 LjtagControllerAutoGenLib|jtagControllerAutoGenLib
6
7 LjtagScan|jtagScan
8
9 # Cell slaveBit;1{lay}
10 CslaveBit;1{lay}||cmos90|1099966143350|1240848417057|I|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1243254726645
11 Ngeneric:Facet-Center|art@0||0|0||||AV
12 NX-Metal-1-Metal-2-Con|contact@2||31|0||||
13 IjtagControllerAutoGenLib:inv_X003.3;1{lay}|inv_X003@0||78|0|||D5G4;
14 NMetal-2-Pin|pin@2||0|0||||
15 NMetal-2-Pin|pin@6||0|-6||||
16 NMetal-2-Pin|pin@11||80.5|24||||
17 IjtagScan:scan_write;1{lay}|scan_wri@1||63|0|||D5G4;
18 Ametal-2|net@6|||IJS1800|pin@2||0|0|contact@2||31|0
19 Ametal-1|net@30||1|IJS1800|scan_wri@1|dout|75|0|inv_X003@0|in|85|0
20 Ametal-1|net@41|||S0|contact@2||31|0|scan_wri@1|din|31|0
21 Ametal-2|net@47||6.2|IJS0|scan_wri@1|vdd_1|87|24|pin@11||80.5|24
22 Ametal-2|net@50|||IS1800|pin@6||0|-6|scan_wri@1|wr|7|-6
23 Ametal-2|net@52||6.2|IJS1800|pin@11||80.5|24|inv_X003@0|vdd|92|24
24 Ametal-2|net@53||6.2|IJS1800|scan_wri@1|gnd_1|75|-24|inv_X003@0|gnd|92|-24
25 Edin||D5G2;|pin@2||I
26 Egnd||D5G2;|scan_wri@1|gnd|G
27 Ephi2||D5G2;|pin@6||I
28 Eslave||D5G2;|inv_X003@0|out|O
29 Evdd||D5G2;|scan_wri@1|vdd|P
30 X