migrate jelib->delib
[fleet.git] / chips / marina / electric / jtagScan.delib / scanRWL.sch
1 HjtagScan|8.10k
2
3 # External Libraries:
4
5 LredFive|redFive
6
7 # Cell scanRWL;1{sch}
8 CscanRWL;1{sch}||schematic|992379436000|1185367908213|I|FACET_schematic_page_size()Sh|USER_drawing_designer_name()Sivans|prototype_center()I[0,0]
9 Ngeneric:Facet-Center|art@0||0|0||||AV
10 NOff-Page|conn@1||-4|19.5|||R|
11 NOff-Page|conn@4||2|19.5|||R|
12 NOff-Page|conn@10||-49|-26||||
13 NOff-Page|conn@11||12|-26||||
14 NGround|gnd@1||14|-4||||
15 IredFive:inv;1{ic}|invLT@1||-4|10.5|R||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S7.2|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
16 Ngeneric:Invisible-Pin|pin@6||-17|31|||||ART_message(D5G6;)S[scanRWL]
17 Ngeneric:Invisible-Pin|pin@7||-15|24|||||ART_message(D5G2;)S["can read, write and resets its output to LO on master clear"]
18 Ngeneric:Invisible-Pin|pin@14||-15|27|||||ART_message(D5G1;)S[""]
19 Ngeneric:Invisible-Pin|pin@15||-16|27|||||ART_message(D5G2;)S[""]
20 NWire_Pin|pin@16||-4|6||||
21 NWire_Pin|pin@17||2|6||||
22 NWire_Pin|pin@18||1|-16||||
23 NBus_Pin|pin@19||1|-6||||
24 NWire_Pin|pin@20||25|6||||
25 NWire_Pin|pin@21||25|-20||||
26 NBus_Pin|pin@22||19|-6||||
27 NWire_Pin|pin@23||9|2||||
28 NBus_Pin|pin@24||9|-6||||
29 NBus_Pin|pin@25||-9|-6||||
30 NBus_Pin|pin@26||-22|-6||||
31 NBus_Pin|pin@29||-42|-6||||
32 NBus_Pin|pin@33||-39|-26|-1|-1||
33 NBus_Pin|pin@34||-39|-33|-1|-1||
34 NBus_Pin|pin@35||-26|-26|-1|-1||
35 NBus_Pin|pin@36||-21|-26|-1|-1||
36 NWire_Pin|pin@38||-34|-20||||
37 Ngeneric:Invisible-Pin|pin@39||9|10|||||SIM_spice_card(D5G2;)S.ic doutb 1
38 IscanRWL;1{ic}|scanRWL@0||37|17.5|||D0G4;
39 Iscan_shift;1{ic}|scan_shi@0||-9|-20|||D5G4;
40 Iscan_write_mc;1{ic}|scan_wri@0||14|6|XY||D5G4;
41 Awire|mc|D5G2;||900|pin@23||9|2|pin@24||9|-6
42 Awire|net@26|||2700|pin@16||-4|6|invLT@1|in|-4|8
43 Abus|net@27||-0.5|IJ0|pin@25||-9|-6|pin@26||-22|-6
44 Awire|net@28|||1800|pin@16||-4|6|pin@17||2|6
45 Awire|net@29|||1800|scan_shi@0|rd|-2|-16|pin@18||1|-16
46 Abus|net@30||-0.5|IJ0|pin@19||1|-6|pin@25||-9|-6
47 Awire|net@31|||0|scan_wri@0|dout|6|6|pin@17||2|6
48 Awire|net@32|||1800|scan_wri@0|wrdata|21|6|pin@20||25|6
49 Awire|net@34|||900|pin@20||25|6|pin@21||25|-20
50 Abus|net@35||-0.5|IJ0|pin@22||19|-6|pin@24||9|-6
51 Awire|net@36|||0|scan_wri@0|mc|12|2|pin@23||9|2
52 Abus|net@37||-0.5|IJ0|pin@24||9|-6|pin@19||1|-6
53 Awire|net@39|||2700|scan_shi@0|rddata|-4|-14|pin@16||-4|6
54 Awire|net@44|||900|conn@1|a|-4|17.5|invLT@1|out|-4|13
55 Awire|net@45|||900|conn@4|a|2|17.5|pin@17||2|6
56 Awire|net@46|||2700|gnd@1||14|-2|scan_wri@0|mcdata|14|0
57 Abus|net@54||-0.5|IJ1800|conn@10|y|-47|-26|pin@33||-39|-26
58 Abus|net@55||-0.5|IJ1800|pin@33||-39|-26|pin@35||-26|-26
59 Awire|phi1|D5G2;||900|pin@25||-9|-6|scan_shi@0|phi1|-9|-18
60 Awire|phi2|D5G2;||900|pin@26||-22|-6|scan_shi@0|phi2|-22|-18
61 Abus|phi2,phi1,wr,rd,mc|D8G2;Y0.25;|-0.5|IJ1800|pin@29||-42|-6|pin@26||-22|-6
62 Awire|rd|D5G2;||2700|pin@18||1|-16|pin@19||1|-6
63 Awire|sin|D8G2;||0|scan_shi@0|sdin|-24|-20|pin@38||-34|-20
64 Abus|sin,phi2,phi1,wr,rd,phi1_return,phi2_return,scan_data_return,mc|D5G2;|-0.5|IJ900|pin@33||-39|-26|pin@34||-39|-33
65 Awire|sout|D8G2;||0|pin@21||25|-20|scan_shi@0|sdout|5|-20
66 Abus|sout,jtagIn[2:8],mc|D8G2;Y0.25;|-0.5|IJ0|conn@11|a|10|-26|pin@36||-21|-26
67 Awire|wr|D5G2;||900|scan_wri@0|wr|19|4|pin@22||19|-6
68 Edout||D5G2;|conn@1|y|O
69 Edoutb||D5G2;|conn@4|y|O
70 EjtagIn[8:0]|jtagIn[1:9]|D5G2;|conn@10|a|B
71 EjtagOut[8:0]|jtagOut[1:9]|D5G2;|conn@11|y|B
72 X