chips/marina/electric/kesselsCounter.delib/gasp_resetting.sch

   1 HkesselsCounter|8.10k
   2
   3 # External Libraries:
   4
   5 LcentersJ|centersJ
   6
   7 LdriversM|driversM
   8
   9 LorangeTSMC090nm|orangeTSMC090nm
  10
  11 LredFive|redFive
  12
  13 # Cell gasp_resetting;1{sch}
  14 Cgasp_resetting;1{sch}||schematic|1242940285645|1244152648855|
  15 Ngeneric:Facet-Center|art@0||0|0||||AV
  16 NOff-Page|conn@3||-19.5|26|||RR|
  17 NOff-Page|conn@5||25|21.5|||XRR|
  18 NOff-Page|conn@6||-44|24||||
  19 NOff-Page|conn@7||-44|-12||||
  20 IcentersJ:ctrAND2in30;1{ic}|ctrAND2i@0||-11|3|R||D5G4;
  21 Igasp_resetting;1{ic}|gasp_res@0||27|43.5|||D5G4;
  22 IredFive:nand2;1{ic}|nand2@0||-26|-11|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  23 NWire_Pin|pin@67||-40|-10||||
  24 NWire_Pin|pin@71||-40|24||||
  25 Ngeneric:Invisible-Pin|pin@73||-11.5|36.5|||||ART_message(D5G3;)Sam 27 May 2009
  26 Ngeneric:Invisible-Pin|pin@74||-10.5|45.5|||||ART_message(D5G6;)Sgasp_resetting
  27 NWire_Pin|pin@79||-10|-11||||
  28 NWire_Pin|pin@80||20|-11||||
  29 NWire_Pin|pin@81||20|21.5||||
  30 NWire_Pin|pin@82||-12|-11||||
  31 NWire_Pin|pin@88||-26|21.5||||
  32 NWire_Pin|pin@91||-11|21.5||||
  33 NWire_Pin|pin@92||-11|15||||
  34 IdriversM:predDri20wMC;1{ic}|predDri2@0||-29|24|RR||D5G4;
  35 IdriversM:sucDri10;1{ic}|sucDri10@0||6.5|21.5|XRR||D5G4;
  36 IorangeTSMC090nm:wire90;1{ic}|wire90@3||-4|15|RR||D0G4;|ATTR_L(D5G1;PUD)D291.79999999999995|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
  37 Awire|fire|D5G2;||2700|pin@92||-11|15|pin@91||-11|21.5
  38 Awire|net@91|||1800|pin@67||-40|-10|nand2@0|inb|-28.5|-10
  39 Awire|net@97|||0|pin@71||-40|24|conn@6|y|-42|24
  40 Awire|net@98|||2700|pin@67||-40|-10|pin@71||-40|24
  41 Awire|net@99|||1800|conn@7|y|-42|-12|nand2@0|ina|-28.5|-12
  42 Awire|net@101|||0|predDri2@0|pred|-32|24|pin@71||-40|24
  43 Awire|net@105|||1800|pin@79||-10|-11|pin@80||20|-11
  44 Awire|net@107|||0|pin@81||20|21.5|sucDri10@0|succ|10.5|21.5
  45 Awire|net@108|||0|conn@5|a|23|21.5|pin@81||20|21.5
  46 Awire|net@109|||2700|pin@80||20|-11|pin@81||20|21.5
  47 Awire|net@110|||1800|nand2@0|out|-23.5|-11|pin@82||-12|-11
  48 Awire|net@111|||2700|pin@82||-12|-11|ctrAND2i@0|inB|-12|-3
  49 Awire|net@121|||2700|pin@88||-26|21.5|predDri2@0|in|-26|22
  50 Awire|net@123|||0|conn@3|y|-21.5|26|predDri2@0|mc|-26|26
  51 Awire|net@126|||1800|pin@91||-11|21.5|sucDri10@0|in|2.5|21.5
  52 Awire|net@127|||1800|pin@88||-26|21.5|pin@91||-11|21.5
  53 Awire|net@129|||2700|ctrAND2i@0|out|-11|9|pin@92||-11|15
  54 Awire|net@130|||0|wire90@3|b|-6.5|15|pin@92||-11|15
  55 Awire|net@131|||900|ctrAND2i@0|inA|-10|-3|pin@79||-10|-11
  56 Edec||D5G2;X7;|conn@5|a|B
  57 EdecSucceeded||D5G2;X-11;|conn@6|y|B
  58 Emc||D5G2;X-2;|conn@3|a|I
  59 Eresetting||D5G2;X-5;|conn@7|a|I
  60 X