chips/marina/electric/latchesK.delib/latch2in10Alomc.lay

   1 HlatchesK|8.10k
   2
   3 # External Libraries:
   4
   5 LlatchPartsK|latchPartsK
   6
   7 # Cell latch2in10Alomc;1{lay}
   8 Clatch2in10Alomc;1{lay}||cmos90|1194186085518|1241212843263||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241982414663
   9 Ngeneric:Facet-Center|art@0||0|0||||AV
  10 NX-Metal-1-Metal-2-Con|contact@0||15.5|-22||||
  11 NX-Metal-1-Metal-2-Con|contact@1||-4|-22||||
  12 IlatchPartsK:latchAmp10;1{lay}|latchAmp@0||19|0|||D5G4;
  13 NMetal-2-Pin|pin@12||27|50||||
  14 NMetal-1-Pin|pin@13||-4|-12.5||||
  15 Iraw2inLatchFmc;1{lay}|raw2inLa@0||-7|0|X||D5G4;
  16 IlatchPartsK:shoulderFill;1{lay}|shoulder@1||27|50|X||D5G4;
  17 Ametal-2|net@52|||S900|latchAmp@0|gnd|11|0|raw2inLa@0|gnd|11|0
  18 Ametal-2|net@53|||S900|latchAmp@0|vdd|11|-50|raw2inLa@0|vdd_1|11|-50
  19 Ametal-2|net@54||6.2|S0|pin@12||27|50|raw2inLa@0|vdd_2|11|50
  20 Ametal-1|net@56|||S2700|latchAmp@0|in|15.5|-25|contact@0||15.5|-22
  21 Ametal-2|net@60|||S0|contact@0||15.5|-22|contact@1||-4|-22
  22 Ametal-1|net@61||0.4|S2700|contact@1||-4|-22|pin@13||-4|-12.5
  23 Ametal-1|net@62|||S0|pin@13||-4|-12.5|raw2inLa@0|out[F]|-15|-12.5
  24 Egnd||D5G2;|raw2inLa@0|gnd_1|G
  25 Egnd_1||D5G2;|latchAmp@0|gnd_1|G
  26 Ehcl||D5G2;|raw2inLa@0|hcl|I
  27 Ehcl_1||D5G2;|raw2inLa@0|hcl_1|I
  28 EinA[1]||D5G2;|raw2inLa@0|inA[1]|I
  29 Emc||D5G2;|raw2inLa@0|mc|I
  30 Eout[1]||D5G2;|latchAmp@0|out[1]|O
  31 Evdd||D5G2;|raw2inLa@0|vdd|P
  32 Evdd_1||D5G2;|latchAmp@0|vdd_1|P
  33 Evdd_3||D5G2;|pin@12||P
  34 Evdd_4||D5G2;|raw2inLa@0|vdd_3|P
  35 X