chips/marina/electric/latchesK.delib/latch2in40C.lay

   1 HlatchesK|8.10k
   2
   3 # External Libraries:
   4
   5 LlatchPartsK|latchPartsK
   6
   7 # Cell latch2in40C;1{lay}
   8 Clatch2in40C;1{lay}||cmos90|1194627475361|1238257435226||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]
   9 Ngeneric:Facet-Center|art@0||0|0||||AV
  10 NX-Metal-1-Metal-2-Con|contact@1||-37|-28||||
  11 NX-Metal-1-Metal-2-Con|contact@2||10|-28||||
  12 Iraw2inLatchF;1{lay}|hi2inLat@1||-45|0|||D5G4;
  13 IlatchPartsK:latchAmp40C;1{lay}|latchAmp@2||40|0|||D5G4;
  14 Ametal-2|net@14||6.2|S0|latchAmp@2|vdd_1|-13.5|50|hi2inLat@1|vdd_3|-18|50
  15 Ametal-2|net@18|||S1800|contact@1||-37|-28|contact@2||10|-28
  16 Ametal-1|net@23|||S900|latchAmp@2|in|10|-24|contact@2||10|-28
  17 Ametal-1|net@33|||S2700|contact@1||-37|-28|hi2inLat@1|out[F]|-37|-12.5
  18 Ametal-2|net@40||6.2|S1800|hi2inLat@1|gnd_1|-18|0|latchAmp@2|gnd|-13.5|0
  19 Ametal-2|net@41||6.2|S0|latchAmp@2|vdd|-13.5|-50|hi2inLat@1|vdd_4|-18|-50
  20 Egnd||D5G2;|hi2inLat@1|gnd|G
  21 Egnd_1||D5G2;|latchAmp@2|gnd_1|G
  22 Ehcl[A]||D5G2;|hi2inLat@1|hcl[A]|I
  23 Ehcl[B]||D5G2;|hi2inLat@1|hcl[B]|I
  24 EinA[1]||D5FLeave alone;G2;|hi2inLat@1|inA[1]|I
  25 EinB[1]||D5FLeave alone;G2;|hi2inLat@1|inB[1]|I
  26 EoutS[1]||D5G2;|latchAmp@2|out[1]|I
  27 Evdd||D5G2;|hi2inLat@1|vdd|P
  28 Evdd_2||D5G2;|hi2inLat@1|vdd_2|P
  29 Evdd_3||D5G2;|latchAmp@2|vdd_2|P
  30 Evdd_4||D5G2;|latchAmp@2|vdd_3|P
  31 X