migrate jelib->delib
[fleet.git] / chips / marina / electric / loopCountM.delib / loadORcount.sch
1 HloopCountM|8.10k
2
3 # External Libraries:
4
5 LorangeTSMC090nm|orangeTSMC090nm
6
7 # Cell loadORcount;4{sch}
8 CloadORcount;4{sch}||schematic|1230935566337|1241983065599|I
9 Ngeneric:Facet-Center|art@0||0|0||||AV
10 NOff-Page|conn@3||6|-13|||YRRR|
11 NOff-Page|conn@5||9|15|||XR|
12 NOff-Page|conn@6||-22|2|||XYR|
13 NOff-Page|conn@7||-56.5|-14|||Y|
14 NOff-Page|conn@8||3|13|||R|
15 NOff-Page|conn@9||-15|7|||XR|
16 NOff-Page|conn@11||-33|0|||XR|
17 NOff-Page|conn@13||-50|-6|||XYRR|
18 NOff-Page|conn@14||-7.5|-10|||XY|
19 IilcLoad;1{ic}|ilcLoad@0||-36|-12|||D5G4;
20 IloadORcount;1{ic}|loadORco@0||24|18|||D5G4;
21 IolcControlD;1{ic}|olcContr@1||6|6|||D5G4;
22 IolcCount;1{ic}|olcCount@0||30|-12|||D5G4;
23 IolcLoad;1{ic}|olcLoad@0||-18|-12|||D5G4;
24 Ngeneric:Invisible-Pin|pin@0||-21.5|27.5|||||ART_message(D5G5;)SloadORcount
25 Ngeneric:Invisible-Pin|pin@1||-21.5|21.5|||||ART_message(D5G3;)Sies 25 April 2009
26 NWire_Pin|pin@368||3|0||||
27 NWire_Pin|pin@369||-14|0||||
28 NWire_Pin|pin@370||27|0||||
29 NWire_Pin|pin@371||9|0||||
30 NWire_Pin|pin@373||-39|-20.5||||
31 NWire_Pin|pin@374||-21|-20.5||||
32 NWire_Pin|pin@375||21|-10||||
33 NWire_Pin|pin@376||21|-6||||
34 NWire_Pin|pin@378||-27|-10||||
35 NWire_Pin|pin@379||-27|-6||||
36 NWire_Pin|pin@380||-18|1||||
37 NWire_Pin|pin@381||33|-2||||
38 NWire_Pin|pin@382||-45|-10||||
39 NWire_Pin|pin@383||-45|-6||||
40 NWire_Pin|pin@384||-45|-14||||
41 NWire_Pin|pin@385||-45|-17||||
42 NWire_Pin|pin@386||-27|-14||||
43 NWire_Pin|pin@387||-27|-17||||
44 NWire_Pin|pin@388||21|-14||||
45 NWire_Pin|pin@389||21|-17||||
46 NWire_Pin|pin@390||27|-20||||
47 Ngeneric:Invisible-Pin|pin@391||-33.5|-21.5|||||ART_message(D3G2;)S["sel[rD] selects what to load","1 = olc, 0 = ilc"]
48 NWire_Pin|pin@392||-39|-24||||
49 IorangeTSMC090nm:wire90;1{ic}|wire90@0||-6.5|0|||D0G4;|ATTR_L(D5G1;PUD)D716.7|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
50 IorangeTSMC090nm:wire90;1{ic}|wire90@1||15.5|0|||D0G4;|ATTR_L(D5G1;PUD)D643.0999999999998|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
51 Awire|net@880|||900|olcContr@1|fire[zz]|3|3|pin@368||3|0
52 Awire|net@882|||900|pin@369||-14|0|olcLoad@0|fire[zz]|-14|-8
53 Awire|net@883|||2700|olcCount@0|fire[Co]|27|-8|pin@370||27|0
54 Awire|net@885|||2700|pin@371||9|0|olcContr@1|fire[Co]|9|3
55 Abus|net@886||-0.5|IJ900|olcContr@1|olc[zero,zoo]|6|2|conn@3|y|6|-11
56 Awire|net@887|||900|conn@11|a|-33|-2|ilcLoad@0|ilc[load]|-33|-7
57 Awire|net@888|||1800|pin@373||-39|-20.5|pin@374||-21|-20.5
58 Awire|net@890|||900|ilcLoad@0|Dvoid|-39|-16|pin@373||-39|-20.5
59 Awire|net@892|||900|olcLoad@0|Dvoid|-21|-16|pin@374||-21|-20.5
60 Awire|net@893|||0|olcCount@0|do[ins]|25|-10|pin@375||21|-10
61 Awire|net@894|||2700|pin@375||21|-10|pin@376||21|-6
62 Awire|net@895|||0|pin@376||21|-6|pin@379||-27|-6
63 Awire|net@896|||0|olcLoad@0|do[ins]|-24|-10|pin@378||-27|-10
64 Awire|net@897|||0|pin@379||-27|-6|pin@383||-45|-6
65 Awire|net@898|||2700|pin@378||-27|-10|pin@379||-27|-6
66 Awire|net@899|||900|conn@6|y|-22|0|olcLoad@0|mc|-22|-8
67 Awire|net@902|||0|ilcLoad@0|do[ins]|-41|-10|pin@382||-45|-10
68 Awire|net@904|||2700|pin@382||-45|-10|pin@383||-45|-6
69 Awire|net@905|||0|ilcLoad@0|sel[Ld]|-41|-14|pin@384||-45|-14
70 Awire|net@907|||0|olcLoad@0|sel[Ld]|-24|-14|pin@386||-27|-14
71 Awire|net@909|||0|olcCount@0|sel[Co]|25|-14|pin@388||21|-14
72 Abus|net@912||-0.5|IJ900|conn@8|a|3|11|olcContr@1|flag[D][set,clr]|3|9
73 Abus|net@913||-0.5|IJ2700|olcContr@1|s[2,3]|9|10|conn@5|a|9|13
74 Awire|net@916|||1800|conn@13|y|-48|-6|pin@383||-45|-6
75 Awire|net@917|||0|conn@14|y|-9.5|-10|olcLoad@0|do[reD]|-12|-10
76 Awire|net@918|||0|wire90@1|a|13|0|pin@371||9|0
77 Awire|net@919|||0|pin@370||27|0|wire90@1|b|18|0
78 Awire|net@920|||0|pin@368||3|0|wire90@0|b|-4|0
79 Awire|net@921|||0|wire90@0|a|-9|0|pin@369||-14|0
80 Awire|olc[dec]|D5G2;||2700|olcCount@0|ilc[load]|33|-7|pin@381||33|-2
81 Awire|olc[load]|D5G2;||2700|olcLoad@0|olc[load]|-18|-7|pin@380||-18|1
82 Awire|olc[zero]|D5G2;||900|olcCount@0|olc[zero]|27|-16|pin@390||27|-20
83 Awire|sel[Co]|D5G2;||900|pin@388||21|-14|pin@389||21|-17
84 Awire|sel[Ld]|D5G2;||900|pin@384||-45|-14|pin@385||-45|-17
85 Awire|sel[Ld]|D5G2;||900|pin@386||-27|-14|pin@387||-27|-17
86 Awire|sel[rD]|D5G2;||900|pin@373||-39|-20.5|pin@392||-39|-24
87 Emc_1|do[ins]|D4G2;|conn@13|a|I
88 Edo[reD]|doneLO[M]|D4G2;|conn@14|a|I
89 Eflag[D][set,clr]||D6G2;|conn@8|y|O
90 Eilc[load]||D6G2;|conn@11|y|O
91 Emc||D4G2;|conn@6|a|I
92 Eolc[load,dec]||D6G2;|conn@9|y|O
93 Eolc[zero,zoo]||D4G2;|conn@3|a|I
94 Es[1:3]|s[1:2]|D6G2;|conn@5|y|O
95 Edo[Ld,Co,reD]|sel[Ld,Co,rD]|D4G2;|conn@7|a|I
96 X