chips/marina/electric/moveM.delib/moveOut.sch

   1 HmoveM|8.10k
   2
   3 # External Libraries:
   4
   5 LdriversM|driversM
   6
   7 LorangeTSMC090nm|orangeTSMC090nm
   8
   9 LredFive|redFive
  10
  11 # Cell moveOut;3{sch}
  12 CmoveOut;3{sch}||schematic|1236301496751|1241982924802|
  13 Ngeneric:Facet-Center|art@0||0|0||||AV
  14 NOff-Page|conn@1||6|36|||YR|
  15 NOff-Page|conn@3||-19|2|||Y|
  16 NOff-Page|conn@4||-35|23.5|||YRR|
  17 NOff-Page|conn@8||60.5|25.5|||RR|
  18 NOff-Page|conn@9||-19|-7||||
  19 NOff-Page|conn@15||-16|-2|||Y|
  20 NOff-Page|conn@17||-14|4|||Y|
  21 NOff-Page|conn@19||32|-54||||
  22 NOff-Page|conn@20||47|-34||||
  23 NOff-Page|conn@25||9|42|||YRR|
  24 NOff-Page|conn@29||41|3|||Y|
  25 NOff-Page|conn@31||13|-1|||X|
  26 NWire_Con|conn@32||34|3||||
  27 IredFive:inv;1{ic}|inv@9||18|-30|XYRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  28 IredFive:inv;1{ic}|inv@10||39|43|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  29 IredFive:inv;1{ic}|inv@13||-11|30|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  30 IredFive:inv;1{ic}|inv@14||-11|18|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  31 IredFive:inv;1{ic}|inv@15||-11|-18|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  32 IredFive:inv;1{ic}|inv@16||18|-16|XYRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  33 IredFive:invI;2{ic}|invI@9||-23|30|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  34 IredFive:invI;2{ic}|invI@10||-23|18|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  35 IredFive:invI;2{ic}|invI@11||-23|-18|YRR||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  36 ImoveRepeat;1{ic}|moveRepe@0||0|0|||D5G4;
  37 IredFive:nand2;1{ic}|nand2@2||39|19|RR||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  38 IredFive:nand2;1{ic}|nand2@3||39|33|YRR||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  39 IredFive:nand2;1{ic}|nand2@4||18|-54|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  40 IredFive:nor2n;1{ic}|nor2n@1||18|-42|X||D0G4;|ATTR_Delay(D5G1;NPX3;Y-3;)I100|ATTR_X(D5G1.5;NPX2.25;Y2.25;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  41 IredFive:nor2n;1{ic}|nor2n@5||18|20|X||D0G4;|ATTR_Delay(D5G1;NPX3;Y-3;)I100|ATTR_X(D5G1.5;NPX2.25;Y2.25;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  42 IredFive:nor2n;1{ic}|nor2n@6||18|32|XY||D0G4;|ATTR_Delay(D5G1;NPX3;Y-3;)I100|ATTR_X(D5G1.5;NPX2.25;Y2.25;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  43 IredFive:nor2n;1{ic}|nor2n@7||18|42|XY||D0G4;|ATTR_Delay(D5G1;NPX3;Y-3;)I100|ATTR_X(D5G1.5;NPX2.25;Y2.25;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  44 ImoveOut;1{ic}|outDockM@0||48|57.5|||D5G4;
  45 Ngeneric:Invisible-Pin|pin@0||3|69.5|||||ART_message(D5G6;)SmoveOut
  46 Ngeneric:Invisible-Pin|pin@1||2.5|63|||||ART_message(D5G4;)S[this is the whole move control,for Output DOCK]
  47 NWire_Pin|pin@4||-29|-18|||XYRR|
  48 NWire_Pin|pin@5||-29|-12|||XYRR|
  49 NWire_Pin|pin@10||6|-20|||Y|
  50 NWire_Pin|pin@13||12|-16|||Y|
  51 NWire_Pin|pin@17||12|-3||||
  52 NWire_Pin|pin@20||-6|-18||||
  53 NWire_Pin|pin@21||-6|2||||
  54 Ngeneric:Invisible-Pin|pin@43||65.5|18.5|||||ART_message(D3G2;)S["This circuit needs two signals, ilc[mo,do]:","ilc[mo]  means \"more\" and controls exit;","ilc[mo] is HI except for last cycle.","ilc[do] means do the action this cycle;","ilc[do] is HI except for a freshly loaded zero.","N.B. A freshly loaded zero makes both ilc[mo,do] LO",so that the next move cycle exits but avoids action.]
  55 Ngeneric:Invisible-Pin|pin@44||65.5|0.5|||||ART_message(D3G2;)S[The logic behind these two signals is:,mo = LO if (zoo OR ovf) & not inf,do = LO if zero & not ovf & not inf]
  56 Ngeneric:Invisible-Pin|pin@73||-40.5|13|||||ART_message(D3G2;)S["pred[T] is from switch fabric","pred[D] is from ship"]
  57 Ngeneric:Invisible-Pin|pin@89||61|42.5|||||ART_message(D3G2;)S["fire[M] goes to D latches and path","doneLO[M] restores flag[D]","ilc[decLO] decrements the ilc"]
  58 NWire_Pin|pin@100||43|-34||||
  59 Ngeneric:Invisible-Pin|pin@102||37.5|-20|||||ART_message(D3G2;)S["do[reD] restores the D flag",single transistor sets D flag]
  60 NWire_Pin|pin@103||24|41||||
  61 NWire_Pin|pin@104||48|43||||
  62 NWire_Pin|pin@105||-6|18||||
  63 NWire_Pin|pin@106||-29|18|||XYRR|
  64 NWire_Pin|pin@107||-29|24|||XYRR|
  65 NWire_Pin|pin@108||-6|30||||
  66 NWire_Pin|pin@109||-29|30|||XYRR|
  67 NWire_Pin|pin@110||-29|36|||XYRR|
  68 NWire_Pin|pin@111||-6|13||||
  69 NWire_Pin|pin@112||-6|25.5||||
  70 NWire_Pin|pin@113||48|32||||
  71 NWire_Pin|pin@115||6|16||||
  72 NWire_Pin|pin@116||6|28||||
  73 NWire_Pin|pin@117||48|20||||
  74 NWire_Pin|pin@118||45|38||||
  75 NWire_Pin|pin@119||45|14||||
  76 NWire_Pin|pin@120||45|34||||
  77 NWire_Pin|pin@121||45|18||||
  78 NWire_Pin|pin@122||24|21||||
  79 NWire_Pin|pin@123||24|31||||
  80 NWire_Pin|pin@128||24|-43|||X|
  81 NWire_Pin|pin@132||24|-41||||
  82 NWire_Pin|pin@133||24|-46||||
  83 NWire_Pin|pin@134||12|-53||||
  84 NWire_Pin|pin@135||24|3||||
  85 NWire_Pin|pin@136||48|14||||
  86 NBus_Pin|pin@149||-10|-4|-1|-1||
  87 NBus_Pin|pin@152||-10|-7|-1|-1||
  88 NWire_Pin|pin@154||-6|-40||||
  89 NWire_Pin|pin@155||-6|-28||||
  90 NWire_Pin|pin@156||12|-30||||
  91 NWire_Pin|pin@159||12|-42||||
  92 NWire_Pin|pin@162||12|-55||||
  93 NWire_Pin|pin@163||12|-59||||
  94 Ngeneric:Invisible-Pin|pin@164||-0.5|56|||||ART_message(D5G3;)Sies 9 May 2009
  95 NBus_Pin|pin@165||34|-5|-1|-1||
  96 NWire_Pin|pin@166||30|-16||||
  97 NWire_Pin|pin@167||30|-9.5||||
  98 IredFive:pms1;2{ic}|pms1@0||43|-30|||D5G4;|ATTR_Delay(D5G1;NPX-2;Y-1.75;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.25;Y2.75;)S20
  99 IdriversM:predDri20wMC;1{ic}|predDri2@0||0|-18|YRR||D5G4;
 100 IdriversM:predDri20wMC;1{ic}|predDri2@3||0|18|YRR||D5G4;
 101 IdriversM:predDri20wMC;1{ic}|predDri2@4||0|30|YRR||D5G4;
 102 IdriversM:predDri40;1{ic}|predDri4@0||0|-42|X||D5G4;
 103 IdriversM:predDri40;1{ic}|predDri4@1||0|-30|X||D5G4;
 104 IorangeTSMC090nm:wire90;1{ic}|wire90@9||30|19|||D0G4;|ATTR_L(D5G1;PUD)D362.9|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
 105 IorangeTSMC090nm:wire90;1{ic}|wire90@10||30.5|43|||D0G4;|ATTR_L(D5G1;PUD)D657.9999999999999|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
 106 IorangeTSMC090nm:wire90;1{ic}|wire90@11||10|32|||D0G4;|ATTR_L(D5G1;PUD)D269.90000000000003|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
 107 IorangeTSMC090nm:wire90;1{ic}|wire90@12||10|20|||D0G4;|ATTR_L(D5G1;PUD)D269.90000000000003|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
 108 IorangeTSMC090nm:wire90;1{ic}|wire90@13||30|33|||D0G4;|ATTR_L(D5G1;PUD)D362.9|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
 109 IorangeTSMC090nm:wire90;1{ic}|wire90@15||7|-42|||D0G4;|ATTR_L(D5G1;PUD)D483.09999999999997|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
 110 IorangeTSMC090nm:wire90;1{ic}|wire90@16||7|-30|||D0G4;|ATTR_L(D5G1;PUD)D1036.9|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
 111 IorangeTSMC090nm:wire90;1{ic}|wire90@17||35|-30|||D0G4;|ATTR_L(D5G1;PUD)D182.60000000000002|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
 112 Awire|do[ins]|D5G2;||2700|pin@154||-6|-40|pin@155||-6|-28
 113 Awire|fireLO[T]|D5G2;||2700|pin@166||30|-16|pin@167||30|-9.5
 114 Awire|fire[T]|D5G2;||900|pin@17||12|-3|pin@13||12|-16
 115 Awire|ilc[do]|D5G2;||900|pin@117||48|20|pin@136||48|14
 116 Awire|ilc[mo]|D5G2;||900|pin@128||24|-43|pin@133||24|-46
 117 Awire|net@15|||0|pin@10||6|-20|predDri2@0|mc|3|-20
 118 Awire|net@18|||0|pin@13||12|-16|predDri2@0|in|3|-16
 119 Awire|net@19|||1800|pin@4||-29|-18|invI@11|out|-25.5|-18
 120 Awire|net@24|||1800|moveRepe@0|fire[T]|3|-3|pin@17||12|-3
 121 Awire|net@29|||0|inv@15|out|-13.5|-18|invI@11|in|-20.5|-18
 122 Awire|net@30|||0|predDri2@0|pred|-3|-18|pin@20||-6|-18
 123 Awire|net@33|||0|pin@20||-6|-18|inv@15|in|-8.5|-18
 124 Awire|net@34|||0|moveRepe@0|torp|-3|2|pin@21||-6|2
 125 Awire|net@35|||2700|pin@20||-6|-18|pin@21||-6|2
 126 Awire|net@47|||0|pin@21||-6|2|conn@3|y|-17|2
 127 Abus|net@128||-0.5|IJ1800|pin@149||-10|-4|moveRepe@0|bit[Di,Ti]|-3|-4
 128 Abus|net@141||-0.5|IJ0|moveRepe@0|in[D,T]|-3|-2|conn@15|y|-14|-2
 129 Awire|net@179|||900|pms1@0|d|43|-32|pin@100||43|-34
 130 Awire|net@180|||0|conn@20|a|45|-34|pin@100||43|-34
 131 Awire|net@191|||0|predDri2@3|pred|-3|18|pin@105||-6|18
 132 Awire|net@192|||0|pin@105||-6|18|inv@14|in|-8.5|18
 133 Awire|net@193|||1800|pin@109||-29|30|invI@9|out|-25.5|30
 134 Awire|net@194|||0|inv@13|out|-13.5|30|invI@9|in|-20.5|30
 135 Awire|net@195|||0|predDri2@4|pred|-3|30|pin@108||-6|30
 136 Awire|net@196|||0|pin@108||-6|30|inv@13|in|-8.5|30
 137 Awire|net@197|||1800|predDri2@3|mc|3|16|pin@115||6|16
 138 Awire|net@198|||1800|predDri2@4|mc|3|28|pin@116||6|28
 139 Awire|net@199|||2700|pin@115||6|16|pin@116||6|28
 140 Awire|net@200|||0|wire90@11|a|7.5|32|predDri2@4|in|3|32
 141 Awire|net@201|||1800|predDri2@3|in|3|20|wire90@12|a|7.5|20
 142 Awire|net@203|||0|nor2n@5|out|15.5|20|wire90@12|b|12.5|20
 143 Awire|net@204|||0|nor2n@6|out|15.5|32|wire90@11|b|12.5|32
 144 Awire|net@205|||0|wire90@13|a|27.5|33|nor2n@6|ina|20.5|33
 145 Awire|net@206|||0|wire90@9|a|27.5|19|nor2n@5|ina|20.5|19
 146 Awire|net@207|||1800|wire90@13|b|32.5|33|nand2@3|out|36.5|33
 147 Awire|net@208|||1800|wire90@9|b|32.5|19|nand2@2|out|36.5|19
 148 Awire|net@209|||1800|nand2@3|ina|41.5|32|pin@113||48|32
 149 Awire|net@210|||0|pin@117||48|20|nand2@2|ina|41.5|20
 150 Awire|net@211|||0|pin@120||45|34|nand2@3|inb|41.5|34
 151 Awire|net@212|||0|pin@121||45|18|nand2@2|inb|41.5|18
 152 Awire|net@213|||1800|nor2n@5|inb|20.5|21|pin@122||24|21
 153 Awire|net@214|||0|pin@123||24|31|nor2n@6|inb|20.5|31
 154 Awire|net@216|||2700|pin@122||24|21|pin@123||24|31
 155 Awire|net@217|||2700|pin@117||48|20|pin@113||48|32
 156 Awire|net@218|||2700|pin@123||24|31|pin@103||24|41
 157 Awire|net@219|||0|pin@103||24|41|nor2n@7|inb|20.5|41
 158 Awire|net@220|||0|wire90@10|a|28|43|nor2n@7|ina|20.5|43
 159 Awire|net@221|||0|inv@10|out|36.5|43|wire90@10|b|33|43
 160 Awire|net@222|||900|pin@104||48|43|pin@113||48|32
 161 Awire|net@223|||1800|inv@10|in|41.5|43|pin@104||48|43
 162 Awire|net@225|||0|nor2n@7|out|15.5|42|conn@25|a|11|42
 163 Awire|net@226|||1800|pin@106||-29|18|invI@10|out|-25.5|18
 164 Awire|net@227|||0|inv@14|out|-13.5|18|invI@10|in|-20.5|18
 165 Awire|net@228|||2700|pin@10||6|-20|pin@115||6|16
 166 Awire|net@240|||1800|nor2n@1|ina|20.5|-43|pin@128||24|-43
 167 Awire|net@250|||1800|pin@159||12|-42|nor2n@1|out|15.5|-42
 168 Awire|net@251|||1800|nor2n@1|inb|20.5|-41|pin@132||24|-41
 169 Awire|net@258|||900|conn@1|y|6|34|pin@116||6|28
 170 Awire|net@260|||900|pin@135||24|3|pin@132||24|-41
 171 Awire|net@262|||1800|moveRepe@0|winLO[M]|3|3|pin@135||24|3
 172 Awire|net@298|||0|conn@31|y|11|-1|moveRepe@0|succ|3|-1
 173 Awire|net@306|||1800|conn@17|y|-12|4|moveRepe@0|do[Mv,Tp]|-4|4
 174 Abus|net@308||-0.5|IJ2700|pin@152||-10|-7|pin@149||-10|-4
 175 Awire|net@320|||0|predDri4@0|pred|-2|-40|pin@154||-6|-40
 176 Awire|net@322|||1800|pin@155||-6|-28|predDri4@1|pred|-2|-28
 177 Awire|net@325|||0|inv@9|in|15.5|-30|pin@156||12|-30
 178 Awire|net@326|||1800|inv@9|out|20.5|-30|wire90@17|a|32.5|-30
 179 Awire|net@327|||1800|wire90@17|b|37.5|-30|pms1@0|g|40|-30
 180 Awire|net@340|||1800|predDri4@1|in|2|-30|wire90@16|a|4.5|-30
 181 Awire|net@341|||0|pin@156||12|-30|wire90@16|b|9.5|-30
 182 Awire|net@342|||900|pin@13||12|-16|pin@156||12|-30
 183 Awire|net@345|||1800|predDri4@0|in|2|-42|wire90@15|a|4.5|-42
 184 Awire|net@346|||1800|wire90@15|b|9.5|-42|pin@159||12|-42
 185 Awire|net@348|||2700|pin@134||12|-53|pin@159||12|-42
 186 Awire|net@352|||0|conn@19|a|30|-54|nand2@4|out|20.5|-54
 187 Abus|net@355||-0.5|IJ0|pin@152||-10|-7|conn@9|y|-17|-7
 188 Awire|net@356|||0|nand2@4|ina|15.5|-55|pin@162||12|-55
 189 Awire|net@357|||1800|pin@134||12|-53|nand2@4|inb|15.5|-53
 190 Abus|net@358||-0.5|IJ0|conn@29|a|39|3|conn@32||34|3
 191 Awire|net@360|||0|inv@16|in|15.5|-16|pin@13||12|-16
 192 Awire|net@361|||1800|inv@16|out|20.5|-16|pin@166||30|-16
 193 Awire|pred[D]|D5G2;||900|pin@105||-6|18|pin@111||-6|13
 194 Awire|pred[T]|D5G2;||900|pin@108||-6|30|pin@112||-6|25.5
 195 Awire|s[1]|D5G2;||2700|pin@109||-29|30|pin@110||-29|36
 196 Awire|s[2]|D5G2;||2700|pin@106||-29|18|pin@107||-29|24
 197 Awire|s[3]|D5G2;||2700|pin@4||-29|-18|pin@5||-29|-12
 198 Awire|sel[Di]|D5G2;||900|pin@121||45|18|pin@119||45|14
 199 Awire|sel[Ti]|D5G2;||2700|pin@120||45|34|pin@118||45|38
 200 Awire|sel[Tp]|D5G2;||900|pin@162||12|-55|pin@163||12|-59
 201 Awire|winLO[M]|D5G2;||900|pin@122||24|21|pin@135||24|3
 202 Abus|winLO[M],fireLO[T]|D5G2;|-0.5|IJ900|conn@32||34|3|pin@165||34|-5
 203 Edo[Mv,Tp]|do[ins]|D4G2;|conn@17|a|I
 204 Edo[reD]|doneLO[M]|D6G2;|conn@19|y|O
 205 Eepi[torp]||D4G2;|conn@3|a|I
 206 Efire[M]||D6G2;|conn@25|y|O
 207 Eflag[D][set]||D6G2;|conn@20|y|O
 208 EwinLO[M]|ilc[decLO,torpLO]|D6G2;|conn@29|y|O
 209 Eilc[mo,do]||D4G2;|conn@8|a|I
 210 Emc||D4G2;|conn@1|a|I
 211 Epred[D,T]||D4G2;|conn@15|a|I
 212 Es[1:5]|s[1:3]|D6G2;|conn@4|y|O
 213 Ebit[Di,Ti]|sel[Mv,Tp,Di,Ti]|D4G2;|conn@9|a|I
 214 Esucc[sf]||D4G2;|conn@31|a|I
 215 X