chips/marina/electric/orangeTSMC090nm.delib/NMOS4fwk_native.sch

   1 HorangeTSMC090nm|8.10k
   2
   3 # Cell NMOS4fwk_native;1{sch}
   4 CNMOS4fwk_native;1{sch}||schematic|1021415734000|1159313406251||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNPX-9;Y-13.5;)S4|ATTR_W(D5FLeave alone;G1;HNPX-8.5;Y-12.5;)S10|ATTR_CDL_template(D5G1;NTX-0.5;Y-31;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX-1;Y-28.5;)StransistorType  NT-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTY-33;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTY-21.5;)SM$(node_name) $(d) $(g) $(s) $(b) nch_na W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX-1;Y-26.5;)Srtranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
   5 INMOS4fwk_native;1{ic}|NMOS4fwk@0||20|0|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NPX3.5;)S4|ATTR_W(D6FLeave alone;G1;NPX2;Y1;)S10|ATTR_GEO(T)I0|ATTR_M(T)I1
   6 Ngeneric:Facet-Center|art@0||0|0||||AV
   7 NOff-Page|conn@0||-10|-8||||
   8 NOff-Page|conn@1||4.5|0||||
   9 NOff-Page|conn@2||6|-16.5||||
  10 NOff-Page|conn@3||6|-9|||YRR|
  11 N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OJX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OJX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X2;Y-4;)Snch_na
  12 Ngeneric:Invisible-Pin|pin@0||1|17.5|||||ART_message(D5G6;)SNMOS4fwk_native
  13 NWire_Pin|pin@1||0|0||||
  14 NWire_Pin|pin@2||0|-16.5||||
  15 Ngeneric:Invisible-Pin|pin@3||-0.5|11.5|||||ART_message(D5G2;)S4-terminal native weak NMOS device
  16 Ngeneric:Invisible-Pin|pin@4||-0.5|6|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=4"]
  17 Awire|net@0|||900|pin@1||0|0|nmos4p@0|d|0|-6
  18 Awire|net@1|||1800|conn@0|y|-8|-8|nmos4p@0|g|-3|-8
  19 Awire|net@2|||1800|pin@1||0|0|conn@1|a|2.5|0
  20 Awire|net@3|||1800|pin@2||0|-16.5|conn@2|a|4|-16.5
  21 Awire|net@4|||900|nmos4p@0|s|0|-10|pin@2||0|-16.5
  22 Awire|net@5|||1800|nmos4p@0|b|0|-9|conn@3|y|4|-9
  23 Eb||D5G2;|conn@3|y|B
  24 Ed||D5G2;|conn@1|y|B
  25 Eg||D5G2;|conn@0|a|I
  26 Es||D5G2;|conn@2|y|B
  27 X