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[fleet.git] / chips / marina / electric / orangeTSMC090nm.delib / PMOSfwk_low.sch
1 HorangeTSMC090nm|8.10k
2
3 # Cell PMOSfwk_low;1{sch}
4 CPMOSfwk_low;1{sch}||schematic|1021415734000|1159313559676||ATTR_Delay(D5G1;HNPX-8.5;Y-4.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-8.5;Y-1.75;)S2|ATTR_W(D5FLeave alone;G1;HNOLPX-8.75;)S3|ATTR_CDL_template(D5G1;NTY-19;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX1;Y-16.5;)StransistorType  VTL-P-Transistor|ATTR_SPICE_template(D5G1;NTX3;Y-12.5;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*(1+ABP/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0P/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX0.5;Y-21;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2;Y-10;)SM$(node_name) $(d) $(g) $(s) vdd pch_lvt W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX1;Y-14.5;)Srtranif0 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
5 IPMOSfwk_low;1{ic}|PMOSfwk@0||28.25|11.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S2|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S3|ATTR_GEO(T)I0|ATTR_M(T)I1
6 Ngeneric:Facet-Center|art@0||0|0||||AV
7 NOff-Page|conn@0||5|8.5||||
8 NOff-Page|conn@1||-8|4||||
9 NOff-Page|conn@2||5|-2||||
10 NWire_Pin|pin@0||0|8.5||||
11 NWire_Pin|pin@1||0|-2||||
12 Ngeneric:Invisible-Pin|pin@2||-1|22|||||ART_message(D5G6;)SPMOSfwk_low
13 Ngeneric:Invisible-Pin|pin@3||-1.5|16.5|||||ART_message(D5G2;T)S3 terminal low-threshold weak PMOS device
14 N4-Port-Transistor|pmos4p@0||-2|4|||YR|2|ATTR_length(D5FLeave alone;G1;OLX1.5;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX-0.5;Y-2;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-3;)Spch_lvt|SIM_weak_node(D5G1;)SWeak
15 NPower|pwr@0||6|5||||
16 Awire|net@0|||1800|pin@0||0|8.5|conn@0|a|3|8.5
17 Awire|net@1|||2700|pmos4p@0|s|0|6|pin@0||0|8.5
18 Awire|net@2|||0|conn@2|a|3|-2|pin@1||0|-2
19 Awire|net@3|||2700|pin@1||0|-2|pmos4p@0|d|0|2
20 Awire|net@4|||1800|conn@1|y|-6|4|pmos4p@0|g|-3|4
21 Awire|net@5|||1800|pmos4p@0|b|0|5|pwr@0||6|5
22 Ed||D5G2;|conn@2|y|B
23 Eg||D5G2;|conn@1|a|I
24 Es||D5G2;|conn@0|y|B
25 X