chips/marina/electric/purpleFive.delib/wireC350.sch

   1 HpurpleFive|8.10k
   2
   3 # Cell wireC350;1{sch}
   4 CwireC350;1{sch}||schematic|1014598612000|1025280871000||ATTR_L(D5G1;HNPX-16;Y-4;)I100|ATTR_layer(D5G1;HNPX-16;Y-5;)I1|ATTR_width(D5G1;HNPX-16;Y-6;)I3|prototype_center()I[0,0]
   5 Ngeneric:Facet-Center|art@0||0|0||||AV
   6 NCapacitor|cap@0||0|0|||||SCHEM_capacitance(D5G1;OJUC)S(@layer<4?0.04:0.056) * @L * 1e-15
   7 NOff-Page|conn@0||0|7|||RRR|
   8 NGround|gnd@0||0|-6||||
   9 Ngeneric:Invisible-Pin|pin@0||0|-9|||||ART_message(D5G1;)S["(P(\"M\")<4?0.04:0.056)*P(\"L\")"]
  10 Ngeneric:Invisible-Pin|pin@1||-20|9|||||ART_message(D6G2;)S[the capacitance in fF of,a layer 'layer' wire,L lambda long and,'width' lambda wide]
  11 Ngeneric:Invisible-Pin|pin@2||-2|18|||||ART_message(D5G6;)S[wireC350]
  12 IwireC350;1{ic}|wireC350@0||9|9|||D0G4;|ATTR_L(D6G1.5;NOJPX1.5;Y0.5;)S100|ATTR_layer(D5G1;NPX3;Y-1.5;)I1|ATTR_width(D5G1;NPX3;Y-0.5;)I3
  13 Awire|net@0|||2700|cap@0|a|0|2|conn@0|y|0|5
  14 Awire|net@1|||2700|gnd@0||0|-4|cap@0|b|0|-2
  15 Ea||D5G2;|conn@0|a|I
  16 X