chips/marina/electric/redFive.delib/NMOS.sch

   1 HredFive|8.10k
   2
   3 # External Libraries:
   4
   5 LorangeTSMC090nm|orangeTSMC090nm
   6
   7 # Cell NMOS;1{sch}
   8 CNMOS;1{sch}||schematic|1021415734000|1161733390263||ATTR_Delay(D5G1;HNPX-8.5;Y-12.75;)I100|ATTR_X(D5G1;HNPX-8.5;Y-11.25;)I1|prototype_center()I[0,0]
   9 INMOS;1{ic}|NMOS@0||17|-1|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1
  10 IorangeTSMC090nm:NMOSf;1{ic}|NMOSf@0||0|-8|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_L(D5G1;NOJPX3.5;)S@X == 0 ? 0 : (@X<1) ? (1.0 * (2-0.4) / @X + 0.4) : 2|ATTR_W(D6G1;NOJPX2;Y1;)S@X > 1 ? 3.0*@X : 3
  11 Ngeneric:Facet-Center|art@0||0|0||||AV
  12 NOff-Page|conn@0||6|-16.5||||
  13 NOff-Page|conn@1||5.5|0||||
  14 NOff-Page|conn@2||-18.5|-8||||
  15 Ngeneric:Invisible-Pin|pin@0||-13|-2|||||ART_message(D5G1;)S[Note: Gate Resistor removed for,NCC in miniheater chip]
  16 NWire_Pin|pin@1||0|-16.5||||
  17 NWire_Pin|pin@2||0|0||||
  18 Ngeneric:Invisible-Pin|pin@3||0|11.5|||||ART_message(D5G6;)S[NMOS]
  19 Ngeneric:Invisible-Pin|pin@4||-8.5|-4.5|||||ART_message(D5G1;)S[model,gate,resistance]
  20 Ngeneric:Invisible-Pin|pin@5||-0.5|6|||||ART_message(D5G2;)Sstandard-threshold strength-based NMOS device
  21 Awire|net@3|||1800|pin@1||0|-16.5|conn@0|a|4|-16.5
  22 Awire|net@4|||1800|pin@2||0|0|conn@1|a|3.5|0
  23 Awire|net@5|||900|pin@2||0|0|NMOSf@0|d|0|-6
  24 Awire|net@6|||1800|conn@2|y|-16.5|-8|NMOSf@0|g|-3|-8
  25 Awire|net@7|||2700|pin@1||0|-16.5|NMOSf@0|s|0|-10
  26 Ed||D5G2;|conn@1|y|B
  27 Eg||D5G2;|conn@2|a|I
  28 Es||D5G2;|conn@0|y|B
  29 X