chips/marina/electric/redFive.delib/nand2.sch

   1 HredFive|8.10k
   2
   3 # External Libraries:
   4
   5 LorangeTSMC090nm|orangeTSMC090nm
   6
   7 # Cell nand2;1{sch}
   8 Cnand2;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-16;Y-5.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-16;Y-6.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16;Y-7.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX21;Y-18.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
   9 IorangeTSMC090nm:PMOSx;1{ic}|PMOS@0||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
  10 IorangeTSMC090nm:PMOSx;1{ic}|PMOS@1||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X
  11 Ngeneric:Facet-Center|art@0||0|0||||AV
  12 NOff-Page|conn@0||15.5|0||||
  13 NOff-Page|conn@1||19.5|-5|||RR|
  14 NOff-Page|conn@2||-21.5|-1||||
  15 Inand2;1{ic}|nand2@0||15.5|12.5|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  16 Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X
  17 NWire_Pin|pin@2||0|0||||
  18 NWire_Pin|pin@3||-9|-9||||
  19 NWire_Pin|pin@15||4.5|7.5||||
  20 NWire_Pin|pin@16||-5|7.5||||
  21 Ngeneric:Invisible-Pin|pin@17||-0.5|25|||||ART_message(D5G6;)S[nand2]
  22 NWire_Pin|pin@18||9|4||||
  23 NWire_Pin|pin@19||4.5|0||||
  24 Ngeneric:Invisible-Pin|pin@20||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND]
  25 NWire_Pin|pin@21||-5|0||||
  26 NWire_Pin|pin@22||9|-5||||
  27 NWire_Pin|pin@23||-9|4||||
  28 Ngeneric:Invisible-Pin|pin@24||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 2 to 2]
  29 Ngeneric:Invisible-Pin|pin@25||22.5|-13.5|||||ART_message(D5G2;)S[X is drive strength,One pull-up has the same strength,as the pull-down]
  30 NWire_Pin|pin@26||-9|-1||||
  31 NPower|pwr@0||-5|10.5||||
  32 Awire|net@14|||900|pin@2||0|0|nms2@0|d|0|-3
  33 Awire|net@15|||0|pin@19||4.5|0|pin@2||0|0
  34 Awire|net@16|||0|pin@2||0|0|pin@21||-5|0
  35 Awire|net@17|||1800|nms2@0|g2|3|-5|pin@22||9|-5
  36 Awire|net@18|||1800|pin@3||-9|-9|nms2@0|g|-3|-9
  37 Awire|net@20|||900|pin@16||-5|7.5|PMOS@0|s|-5|6
  38 Awire|net@21|||1800|pin@23||-9|4|PMOS@0|g|-8|4
  39 Awire|net@22|||2700|pin@21||-5|0|PMOS@0|d|-5|2
  40 Awire|net@23|||2700|PMOS@1|s|4.5|6|pin@15||4.5|7.5
  41 Awire|net@24|||1800|PMOS@1|g|7.5|4|pin@18||9|4
  42 Awire|net@25|||2700|pin@19||4.5|0|PMOS@1|d|4.5|2
  43 Awire|net@36|||2700|pin@22||9|-5|pin@18||9|4
  44 Awire|net@38|||2700|pin@16||-5|7.5|pwr@0||-5|10.5
  45 Awire|net@39|||0|pin@15||4.5|7.5|pin@16||-5|7.5
  46 Awire|net@42|||1800|pin@22||9|-5|conn@1|y|17.5|-5
  47 Awire|net@43|||2700|pin@3||-9|-9|pin@26||-9|-1
  48 Awire|net@44|||2700|pin@26||-9|-1|pin@23||-9|4
  49 Awire|net@45|||1800|conn@2|y|-19.5|-1|pin@26||-9|-1
  50 Awire|net@46|||0|conn@0|a|13.5|0|pin@19||4.5|0
  51 Eina||D5G2;|conn@2|a|I
  52 Einb||D5G2;|conn@1|a|I
  53 Eout||D5G2;|conn@0|y|O
  54 X