chips/marina/electric/redFive.delib/nand2HT.sch

   1 HredFive|8.10k
   2
   3 # External Libraries:
   4
   5 LorangeTSMC090nm|orangeTSMC090nm
   6
   7 # Cell nand2HT;1{sch}
   8 Cnand2HT;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-16.5;Y-7;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-16.5;Y-6;)S1|ATTR_drive0(D5G1;HNPTX-16.5;Y-8;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16.5;Y-9;)Sstrong1|ATTR_verilog_template(D5G1;NTX6;Y-17.5;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
   9 IorangeTSMC090nm:PMOSx;1{ic}|PMOS@0||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S2.*@X
  10 IorangeTSMC090nm:PMOSx;1{ic}|PMOS@1||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S2.*@X
  11 Ngeneric:Facet-Center|art@0||0|0||||AV
  12 NOff-Page|conn@0||-14|-1||||
  13 NOff-Page|conn@1||16.5|-5|||RR|
  14 NOff-Page|conn@2||21|0|||Y|
  15 Inand2HT;1{ic}|nand2HT@0||30|13|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE(T)I1|ATTR_LEPARALLGRP()I-1|ATTR_su(T)I-1
  16 Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2.25;Y1.5;)S@X|ATTR_LEGATE(OJT)S@LEGATE|ATTR_LEPARALLGRP(T)I-1
  17 NWire_Pin|pin@0||0|8||||
  18 NWire_Pin|pin@1||-5|8||||
  19 NWire_Pin|pin@2||4.5|8||||
  20 Ngeneric:Invisible-Pin|pin@3||31.5|-12.5|||||ART_message(D5G2;)S[X is drive strength,Pull-up has twice the strength,of the pull-down]
  21 Ngeneric:Invisible-Pin|pin@4||-0.5|17.5|||||ART_message(D5G2;)S[P to N width ratio is 4 to 2]
  22 NWire_Pin|pin@5||-9|4||||
  23 NWire_Pin|pin@6||0|0||||
  24 NWire_Pin|pin@7||-5|0||||
  25 Ngeneric:Invisible-Pin|pin@8||-0.5|20|||||ART_message(D5G2;)S[one-parameter high-threshold NAND]
  26 NWire_Pin|pin@9||-9|-1||||
  27 NWire_Pin|pin@10||4.5|0||||
  28 NWire_Pin|pin@11||9|4||||
  29 NWire_Pin|pin@12||9|-5||||
  30 Ngeneric:Invisible-Pin|pin@13||0.5|25|||||ART_message(D5G6;)S[nand2HT]
  31 NWire_Pin|pin@14||-9|-9||||
  32 NPower|pwr@0||0|11.5||||
  33 Awire|net@0|||0|nms2@0|g|-3|-9|pin@14||-9|-9
  34 Awire|net@1|||1800|nms2@0|g2|3|-5|pin@12||9|-5
  35 Awire|net@2|||2700|pin@0||0|8|pwr@0||0|11.5
  36 Awire|net@3|||1800|pin@1||-5|8|pin@0||0|8
  37 Awire|net@4|||1800|pin@0||0|8|pin@2||4.5|8
  38 Awire|net@5|||1800|pin@10||4.5|0|conn@2|a|19|0
  39 Awire|net@6|||2700|PMOS@0|s|-5|6|pin@1||-5|8
  40 Awire|net@7|||900|pin@2||4.5|8|PMOS@1|s|4.5|6
  41 Awire|net@8|||1800|pin@5||-9|4|PMOS@0|g|-8|4
  42 Awire|net@9|||2700|pin@7||-5|0|PMOS@0|d|-5|2
  43 Awire|net@10|||2700|pin@10||4.5|0|PMOS@1|d|4.5|2
  44 Awire|net@11|||0|pin@11||9|4|PMOS@1|g|7.5|4
  45 Awire|net@12|||2700|pin@9||-9|-1|pin@5||-9|4
  46 Awire|net@13|||900|pin@6||0|0|nms2@0|d|0|-3
  47 Awire|net@14|||0|pin@10||4.5|0|pin@6||0|0
  48 Awire|net@15|||0|pin@6||0|0|pin@7||-5|0
  49 Awire|net@16|||0|pin@9||-9|-1|conn@0|y|-12|-1
  50 Awire|net@17|||2700|pin@12||9|-5|pin@11||9|4
  51 Awire|net@18|||1800|pin@12||9|-5|conn@1|y|14.5|-5
  52 Awire|net@19|||2700|pin@14||-9|-9|pin@9||-9|-1
  53 Eina||D5G2;|conn@0|a|I
  54 Einb||D5G2;|conn@1|a|I
  55 Eout||D5G2;|conn@2|y|O
  56 X