chips/marina/electric/redFive.delib/nand2LTen.sch

   1 HredFive|8.10k
   2
   3 # External Libraries:
   4
   5 LorangeTSMC090nm|orangeTSMC090nm
   6
   7 # Cell nand2LTen;1{sch}
   8 Cnand2LTen;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-13.5;Y-16;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-13.5;Y-15;)S1|ATTR_drive0(D5G1;HNPTX-13.5;Y-17;)Sstrong0|ATTR_drive1(D5G1;HNPTX-13.5;Y-18;)Sstrong1|ATTR_verilog_template(D5G1;NTX26.5;Y-17;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
   9 IorangeTSMC090nm:PMOSx;1{ic}|PMOS@0||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)Smax(@X/20., 0.5)
  10 IorangeTSMC090nm:PMOSx;1{ic}|PMOS@1||6|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOLPX3.5;Y0.5;)S@X/2.
  11 Ngeneric:Facet-Center|art@0||0|0||||AV
  12 NOff-Page|conn@0||17|0||||
  13 NOff-Page|conn@1||17|-5|||RR|
  14 NOff-Page|conn@2||-14.5|-9||||
  15 Inand2LTen;1{ic}|nand2LTe@0||42|18|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.5;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
  16 Inms2b;1{ic}|nms2@0||0|-9|||D0G4;|ATTR_Delay(D5G1;NOJPX5.5;Y-0.5;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-3.75;Y2.5;)S@X
  17 NWire_Pin|pin@0||0|0||||
  18 Ngeneric:Invisible-Pin|pin@1||3|16|||||ART_message(D5G2;)S[Sized assuming both inputs go low together]
  19 Ngeneric:Invisible-Pin|pin@2||2.5|18|||||ART_message(D5G2;)S[P to N width ratio is 1 to 2]
  20 Ngeneric:Invisible-Pin|pin@3||2|20|||||ART_message(D5G2;)S[LO-threshold NAND where ina is enable (DC) input]
  21 NWire_Pin|pin@4||6|7.5||||
  22 NWire_Pin|pin@5||-5|7.5||||
  23 Ngeneric:Invisible-Pin|pin@6||3.5|25|||||ART_message(D5G6;)S[nand2LTen]
  24 NWire_Pin|pin@7||11|-5||||
  25 NWire_Pin|pin@8||11|4||||
  26 NWire_Pin|pin@9||6|0||||
  27 NWire_Pin|pin@10||-9.5|-9||||
  28 NWire_Pin|pin@11||-5|0||||
  29 NWire_Pin|pin@12||-9.5|4||||
  30 Ngeneric:Invisible-Pin|pin@13||36.5|-10|||||ART_message(D5G2;)S[X is drive strength,The pull-down is twice as strong as,one pull-up; or both pull-ups together,are as strong as the pull-down]
  31 NPower|pwr@0||-5|10.5||||
  32 Awire|net@0|||0|pin@9||6|0|pin@0||0|0
  33 Awire|net@1|||0|pin@0||0|0|pin@11||-5|0
  34 Awire|net@2|||900|pin@5||-5|7.5|PMOS@0|s|-5|6
  35 Awire|net@3|||1800|pin@12||-9.5|4|PMOS@0|g|-8|4
  36 Awire|net@4|||2700|pin@11||-5|0|PMOS@0|d|-5|2
  37 Awire|net@5|||2700|PMOS@1|s|6|6|pin@4||6|7.5
  38 Awire|net@6|||1800|PMOS@1|g|9|4|pin@8||11|4
  39 Awire|net@7|||2700|pin@9||6|0|PMOS@1|d|6|2
  40 Awire|net@8|||1800|pin@9||6|0|conn@0|a|15|0
  41 Awire|net@9|||2700|pin@5||-5|7.5|pwr@0||-5|10.5
  42 Awire|net@10|||0|pin@4||6|7.5|pin@5||-5|7.5
  43 Awire|net@11|||1800|pin@7||11|-5|conn@1|y|15|-5
  44 Awire|net@12|||2700|pin@7||11|-5|pin@8||11|4
  45 Awire|net@13|||0|pin@10||-9.5|-9|conn@2|y|-12.5|-9
  46 Awire|net@14|||2700|pin@10||-9.5|-9|pin@12||-9.5|4
  47 Awire|net@15|||0|nms2@0|g|-3|-9|pin@10||-9.5|-9
  48 Awire|net@16|||900|pin@0||0|0|nms2@0|d|0|-3
  49 Awire|net@17|||0|pin@7||11|-5|nms2@0|g2|3|-5
  50 Eina||D5G2;|conn@2|a|I
  51 Einb||D5G2;|conn@1|a|I
  52 Eout||D5G2;|conn@0|y|O
  53 X