chips/marina/electric/redFive.delib/nms1.sch

   1 HredFive|8.10k
   2
   3 # External Libraries:
   4
   5 LorangeTSMC090nm|orangeTSMC090nm
   6
   7 # Cell nms1;1{sch}
   8 Cnms1;1{sch}||schematic|1021415734000|1228433822694||ATTR_Delay(D5G1;HNPX-9;Y-15.5;)I100|ATTR_X(D5G1;HNPX-9;Y-14.5;)I1|prototype_center()I[0,0]
   9 IorangeTSMC090nm:NMOSx;1{ic}|NMOS@1||0|-11|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOJPX3.5;Y0.5;)S@X*1.0
  10 Ngeneric:Facet-Center|art@0||0|0||||AV
  11 NOff-Page|conn@0||-10|-11||||
  12 NOff-Page|conn@1||8|0|||Y|
  13 NGround|gnd@0||0|-19||||
  14 Inms1;2{ic}|nms1@0||29|0|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;NPX-2.25;Y1.5;)I1
  15 NWire_Pin|pin@0||0|0||||
  16 Ngeneric:Invisible-Pin|pin@1||-0.5|4|||||ART_message(D5G2;)Sone fixed-size N-type transistor to GND
  17 Ngeneric:Invisible-Pin|pin@2||0|8.5|||||ART_message(D5G6;)Snms1
  18 Awire|net@3|||2700|gnd@0||0|-17|NMOS@1|s|0|-13
  19 Awire|net@4|||1800|conn@0|y|-8|-11|NMOS@1|g|-3|-11
  20 Awire|net@5|||1800|pin@0||0|0|conn@1|a|6|0
  21 Awire|net@6|||900|pin@0||0|0|NMOS@1|d|0|-9
  22 Ed||D5G2;|conn@1|y|O
  23 Eg||D5G2;|conn@0|a|I
  24 X