migrate jelib->delib
[fleet.git] / chips / omegaCounter / 40nm / electric / omegaCounter-old.delib / nor3.sch
1 HomegaCounter-old|8.10k
2
3 # External Libraries:
4
5 LredFive|redFive
6
7 # Cell nor3;1{sch}
8 Cnor3;1{sch}||schematic|1248841634466|1253732224695||ATTR_LEGATE(D5G1;HNPX3;Y21.5;)I1|ATTR_LEPARALLGRP(D5G1;HNPX3;Y19.5;)I-1|ATTR_X(D5G1;HNOJPX3;Y22.75;)SLE.getdrive()|ATTR_su(D5G1;HNPX3;Y20.5;)I-1
9 IredFive:PMOS;1{ic}|PMOS@0||-16|8|X||D5G4;|ATTR_X(D5G1.5;NOLPX-3;Y1.5;)S@X
10 IredFive:PMOS;1{ic}|PMOS@1||-16|4|X||D5G4;|ATTR_X(D5G1.5;NOLPX-3;Y-2.5;)S@X
11 IredFive:PMOS;1{ic}|PMOS@2||-19|8|||D5G4;|ATTR_X(D5G1.5;NOLPX-8;Y0.5;)S@X
12 IredFive:PMOS;1{ic}|PMOS@3||-19|4|||D5G4;|ATTR_X(D5G1.5;NOLPX-8;Y0.5;)S@X
13 Ngeneric:Facet-Center|art@0||0|0||||AV
14 NOff-Page|conn@0||15.5|16|||RR|
15 NOff-Page|conn@1||15.5|4|||RR|
16 NOff-Page|conn@2||15.5|8|||RR|
17 NOff-Page|conn@3||-34.75|-0.25|||RR|
18 IredFive:nms1;2{ic}|nms1@1||-8|-13.75|X||D5G4;|ATTR_X(D5FLeave alone;G1.5;NOJPX0.25;Y-4;)S6
19 IredFive:nms1;2{ic}|nms1@2||0|-13.75|X||D5G4;|ATTR_X(D5FLeave alone;G1.5;NOJPX0.75;Y-3.75;)S6
20 Inor3;1{ic}|nor3@0||18.5|-12.25|||D5G4;
21 NWire_Pin|pin@3||-8|-0.25|||Y|
22 NWire_Pin|pin@4||-16|-0.25|||Y|
23 NWire_Pin|pin@5||0|-0.25|||Y|
24 NWire_Pin|pin@7||-16|-0.25|||Y|
25 NWire_Pin|pin@10||-3|-13.75|||Y|
26 NWire_Pin|pin@24||10|16||||
27 NWire_Pin|pin@25||-3|16||||
28 NWire_Pin|pin@26||6|-13.75||||
29 NWire_Pin|pin@27||6|4||||
30 NWire_Pin|pin@28||-20|1||||
31 NWire_Pin|pin@29||-22|1||||
32 NWire_Pin|pin@30||-21|12||||
33 NWire_Pin|pin@31||-22|12||||
34 NWire_Pin|pin@32||-19|12||||
35 NWire_Pin|pin@33||-16|12||||
36 NWire_Pin|pin@34||-19|-0.25||||
37 Ngeneric:Invisible-Pin|pin@35||-32|21|||||ART_message(D5G1;)S[Note that inb will ALWAYS,be part of the effort to turn off,"the fire signal, but ina is only SOMETIMES",part of that effort.  So we put all the burden,on inb all the time and don't even bother with,a pull-down for ina.]
38 IredFive:pms1;2{ic}|pms1@0||-16|16|X||D5G4;|ATTR_X(D5FLeave alone;G1.5;NOLPX4.25;)S6*@X
39 Awire|net@4|||1800|nms1@1|g|-5|-13.75|pin@10||-3|-13.75
40 Awire|net@10|||2700|nms1@1|d|-8|-11.75|pin@3||-8|-0.25
41 Awire|net@12|||2700|nms1@2|d|0|-11.75|pin@5||0|-0.25
42 Awire|net@13|||1800|pin@3||-8|-0.25|pin@5||0|-0.25
43 Awire|net@16|||2700|pin@7||-16|-0.25|pin@4||-16|-0.25
44 Awire|net@17|||0|pin@3||-8|-0.25|pin@4||-16|-0.25
45 Awire|net@49|||0|conn@0|y|13.5|16|pin@24||10|16
46 Awire|net@51|||1800|pin@25||-3|16|pin@24||10|16
47 Awire|net@52|||2700|pin@10||-3|-13.75|pin@25||-3|16
48 Awire|net@53|||1800|nms1@2|g|3|-13.75|pin@26||6|-13.75
49 Awire|net@54|||0|conn@1|y|13.5|4|pin@27||6|4
50 Awire|net@56|||2700|pin@26||6|-13.75|pin@27||6|4
51 Awire|net@74|||900|PMOS@0|d|-16|6|PMOS@1|s|-16|6
52 Awire|net@75|||0|pin@27||6|4|PMOS@1|g|-13|4
53 Awire|net@77|||1800|pms1@0|g|-13|16|pin@25||-3|16
54 Awire|net@78|||900|PMOS@1|d|-16|2|pin@4||-16|-0.25
55 Awire|net@79|||450|PMOS@0|g|-13|8|pin@28||-20|1
56 Awire|net@80|||0|pin@28||-20|1|pin@29||-22|1
57 Awire|net@81|||900|PMOS@3|g|-22|4|pin@29||-22|1
58 Awire|net@82|||3150|PMOS@1|g|-13|4|pin@30||-21|12
59 Awire|net@83|||0|pin@30||-21|12|pin@31||-22|12
60 Awire|net@84|||2700|PMOS@2|g|-22|8|pin@31||-22|12
61 Awire|net@85|||0|PMOS@2|d|-19|6|PMOS@3|s|-19|6
62 Awire|net@86|||2700|PMOS@2|s|-19|10|pin@32||-19|12
63 Awire|net@87|||1800|pin@32||-19|12|pin@33||-16|12
64 Awire|net@88|||900|pin@33||-16|12|PMOS@0|s|-16|10
65 Awire|net@89|||2700|pin@33||-16|12|pms1@0|d|-16|14
66 Awire|net@90|||1800|conn@3|a|-32.75|-0.25|pin@34||-19|-0.25
67 Awire|net@91|||1800|pin@34||-19|-0.25|pin@4||-16|-0.25
68 Awire|net@92|||900|PMOS@3|d|-19|2|pin@34||-19|-0.25
69 Awire|net@95|||0|conn@2|y|13.5|8|PMOS@0|g|-13|8
70 Einb_1|ina|D5G2;X-1.75;|conn@2|a|I|ATTR_le(D5G1;NX2;Y-1.5;)S1.666
71 Einb||D5G2;X-1.5;|conn@1|a|I|ATTR_le(D5G1;NX2.5;Y-1.5;)S1.666
72 Einc||D5G2;X-1.75;|conn@0|a|I
73 Eout||D5G2;X1.75;|conn@3|y|O|ATTR_le(D5G1;NX-1.5;Y-1.5;)S2.333
74 X