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[fleet.git] / chips / omegaCounter / 40nm / electric / purpleFive.delib / inv2o.sch
1 HpurpleFive|8.10k
2
3 # Cell inv2o;1{sch}
4 Cinv2o;1{sch}||schematic|1021415734000|1197016374252||ATTR_DelayH(D5G1;HNPX-18;Y-5.5;)I100|ATTR_DelayL(D5G1;HNPX-18;Y-6.5;)I100|ATTR_X(D5G1;HNOJPX-18;Y-3.5;)S"LE.subdrive(\"invHT1\", \"X\")"|ATTR_su(D5G1;HNPTX-18;Y-4.5;)I-1|prototype_center()I[0,0]
5 Ngeneric:Facet-Center|art@0||0|0||||AV
6 NOff-Page|conn@0||16|-2||||
7 NOff-Page|conn@1||-16|0||||
8 NOff-Page|conn@2||16|2||||
9 Iinv2o;1{ic}|inv2o@0||26.5|19|||D0G4;|ATTR_DelayH(D5G1;NPX2;Y-4.5;)I100|ATTR_DelayL(D5G1;NPX2;Y-3.5;)I100|ATTR_X(D5G1.5;NOJPX2;Y3;)S"LE.subdrive(\"invHT1\", \"X\")"|ATTR_su(P)I-1
10 IinvHT;1{ic}|invHT@0||-2.5|2|||D0G4;|ATTR_Delay(D5G1;NOJPX2;Y-2;)S@DelayH|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NOJPX1.5;Y2;)SLE.getdrive()|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_su(OJP)S@su|ATTR_S(D5G1;ILNRRX1.75;Y-8.5;)SLE.getdrive()
11 IinvLT;1{ic}|invLT@0||5|-2|||D0G4;|ATTR_Delay(D5G1;NOJPX2;Y-2;)S@DelayL|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NOJPX1.5;Y2;)SLE.getdrive()|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_su(OJP)S@su
12 Ngeneric:Invisible-Pin|pin@0||6.5|-7.5|||||ART_message(D5G2;)S[simply reports size of HT gate]
13 NWire_Pin|pin@1||-9|-2||||
14 NWire_Pin|pin@2||-9|2||||
15 Ngeneric:Invisible-Pin|pin@3||-3|15|||||ART_message(D5G2;)S[these are width ratios]
16 Ngeneric:Invisible-Pin|pin@4||2.5|12.5|||||ART_message(D5G2;)S[P:N=2:2]
17 Ngeneric:Invisible-Pin|pin@5||-9|12.5|||||ART_message(D5G2;)S[P:N=4:1]
18 NWire_Pin|pin@6||-9|0||||
19 Ngeneric:Invisible-Pin|pin@7||-1|19|||||ART_message(D5G2;)S[with two outputs]
20 Ngeneric:Invisible-Pin|pin@8||-1|21|||||ART_message(D5G2;)S[HI-LO-threshold inverters]
21 Ngeneric:Invisible-Pin|pin@9||0|25.5|||||ART_message(D5G6;)S[inv2o]
22 Awire|net@0|||900|pin@6||-9|0|pin@1||-9|-2
23 Awire|net@1|||1800|pin@1||-9|-2|invLT@0|in|2.5|-2
24 Awire|net@2|||0|conn@0|a|14|-2|invLT@0|out|7.5|-2
25 Awire|net@3|||1800|pin@2||-9|2|invHT@0|in|-5|2
26 Awire|net@4|||900|pin@2||-9|2|pin@6||-9|0
27 Awire|net@5|||0|conn@2|a|14|2|invHT@0|out|0|2
28 Awire|net@6|||0|pin@6||-9|0|conn@1|y|-14|0
29 Ein||D5G2;|conn@1|a|I
30 Eout[n]||D5G2;|conn@0|y|O
31 Eout[p]||D5G2;|conn@2|y|O
32 X