chips/omegaCounter/40nm/electric/redFive.delib/passTF.sch

   1 HredFive|8.10k
   2
   3 # Cell passTF;1{sch}
   4 CpassTF;1{sch}||schematic|1094080836000|1248729106644||ATTR_LEPASSGATE(D5G1;HNPTX-30.5;Y-8;)I1|ATTR_XN(D5FLeave alone;G1;HNOLPX-31;Y-4;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-31;Y-6;)S1|prototype_center()I[0,0]
   5 INMOS;1{ic}|NMOS@1||0|2|RRR||D5G4;|ATTR_Delay(D5G1;NPX-1.5;Y-3.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-1.5;Y3;)S@XN
   6 IPMOS;1{ic}|PMOS@1||0|-2|R||D5G4;|ATTR_Delay(D5G1;NPX-1.5;Y3.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX-1.5;Y-3;)S@XP/2.0
   7 Ngeneric:Facet-Center|art@0||0|0||||AV
   8 NOff-Page|conn@0||-9|0||||
   9 NOff-Page|conn@1||10.5|0||||
  10 NOff-Page|conn@2||0|12|||RRR|
  11 NOff-Page|conn@3||0|-11.5|||R|
  12 IpassTF;1{ic}|passTF@0||20.5|15|||D5G4;|ATTR_XN(D5FLeave alone;G1;NOLPX-3.25;Y-0.5;)S1|ATTR_XP(D5FLeave alone;G1;NOLPX3.25;Y-0.5;)S1
  13 NWire_Pin|pin@0||5|2||||
  14 NWire_Pin|pin@1||5|-2||||
  15 NWire_Pin|pin@2||-5|-2||||
  16 NWire_Pin|pin@3||-5|2||||
  17 NWire_Pin|pin@4||-5|0||||
  18 NWire_Pin|pin@5||5|0||||
  19 Ngeneric:Invisible-Pin|pin@6||-1|28.5|||||ART_message(D5G5;)SpassTF
  20 Ngeneric:Invisible-Pin|pin@7||-1|23.5|||||ART_message(D5G2;)Spass gate with seperate T/F control inputs
  21 Awire|net@0|||1800|NMOS@1|d|2|2|pin@0||5|2
  22 Awire|net@1|||900|pin@0||5|2|pin@5||5|0
  23 Awire|net@2|||0|pin@1||5|-2|PMOS@1|d|2|-2
  24 Awire|net@3|||0|PMOS@1|s|-2|-2|pin@2||-5|-2
  25 Awire|net@4|||2700|pin@2||-5|-2|pin@4||-5|0
  26 Awire|net@5|||1800|pin@3||-5|2|NMOS@1|s|-2|2
  27 Awire|net@6|||2700|pin@4||-5|0|pin@3||-5|2
  28 Awire|net@7|||1800|conn@0|y|-7|0|pin@4||-5|0
  29 Awire|net@8|||900|pin@5||5|0|pin@1||5|-2
  30 Awire|net@9|||1800|pin@5||5|0|conn@1|a|8.5|0
  31 Awire|net@10|||900|conn@2|y|0|10|NMOS@1|g|0|5
  32 Awire|net@11|||2700|conn@3|y|0|-9.5|PMOS@1|g|0|-5
  33 Edrn||D5G2;|conn@1|y|O
  34 EpassF||D5G2;|conn@3|a|I
  35 EpassT||D5G2;|conn@2|a|I
  36 Esrc||D5G2;|conn@0|a|I
  37 X