changes for kesselsCounter, flip initial state of D-flag in verilog
[fleet.git] / electric / marina_padframe.delib / core_dummy_excl.lay
1 Hinfinity_padframe|8.06c
2
3 # Cell core_dummy_excl;1{lay}
4 Ccore_dummy_excl;1{lay}||cmos90|1186979662236|1187236253683|I
5 Ngeneric:Facet-Center|art@0||0|0||||AV
6 NDEXCL-Metal-1-Node|plnode@0||0|0|50170|50122||
7 NDEXCL-Metal-2-Node|plnode@1||0|0|50170|50122||
8 NDEXCL-Metal-3-Node|plnode@2||0|0|50170|50122||
9 NDEXCL-Metal-4-Node|plnode@3||0|0|50170|50122||
10 NDEXCL-Metal-5-Node|plnode@4||0|0|50170|50122||
11 NDEXCL-Metal-6-Node|plnode@9||0|0|50170|50122||
12 NDEXCL-Metal-7-Node|plnode@10||0|0|50170|50122||
13 NDEXCL-Metal-8-Node|plnode@11||0|0|50170|50122||
14 NDEXCL-Metal-9-Node|plnode@15||0|0|50170|50122||
15 NDEXCL-N-Active-Node|plnode@17||0|0|50170|50122||
16 NDEXCL-P-Active-Node|plnode@19||0|0|50170|50122||
17 NDEXCL-Polysilicon-Node|plnode@21||0|0|50170|50122||
18 NDEXCL-RDL-Node|plnode@23||0|0|50170|50122||
19 X