3 == Ports ===========================================================
13 == Constants ========================================================
15 == TeX ==============================================================
16 This ship is a two-input arithmetic unit. The first input is split
17 into multiple virtual destinations that control the operation to be
20 == Fleeterpreter ====================================================
21 public void service() {
22 if (!box_out.readyForDataFromShip() ||
23 !box_in1.dataReadyForShip() ||
24 !box_in2.dataReadyForShip()) return;
26 Packet selector = box_in1.removePacketForShip();
27 String port = selector.destination.getDestinationName();
28 long a = selector.value;
29 long b = box_in2.removeDataForShip();
31 if (port.equals("add")) {
32 box_out.addDataFromShip(a+b); // ADD
33 } else if (port.equals("sub")) {
34 box_out.addDataFromShip(a-b); // SUB
35 } else if (port.equals("max")) {
36 box_out.addDataFromShip(Math.max(a,b)); // MAX
37 } else if (port.equals("min")) {
38 box_out.addDataFromShip(Math.min(a,b)); // MIN
40 box_out.addDataFromShip(0);
44 == FleetSim ==============================================================
46 == FPGA ==============================================================
49 reg [(`PACKET_WIDTH-1):0] reg_a;
51 reg [(`DATAWIDTH-1):0] reg_b;
55 always @(posedge clk) begin
57 `onread(in1_r, in1_a) have_a = 1; reg_a = in1_d; end
60 `onread(in2_r, in2_a) have_b = 1; reg_b = in2_d; end
63 if (have_a && have_b) begin
64 a_val = reg_a[`DATAWIDTH-1:0];
65 case (reg_a[`PACKET_WIDTH-1:`DATAWIDTH])
66 0: out_d = a_val + reg_b;
67 1: out_d = a_val - reg_b;
68 2: out_d = a_val > reg_b ? a_val : reg_b;
69 3: out_d = a_val > reg_b ? reg_b : a_val;
72 `onwrite(out_r, out_a)
82 == Contributors =========================================================
83 Adam Megacz <megacz@cs.berkeley.edu>
84 Amir Kamil <kamil@cs.berkeley.edu>