3 == Ports ===========================================================
10 percolate up: gpio_led_0 1
11 percolate up: gpio_led_1 1
12 percolate up: gpio_led_2 1
13 percolate up: gpio_led_3 1
15 percolate up: sram_adv_ld_b 1
16 percolate up: sram_bw0 1
17 percolate up: sram_bw1 1
18 percolate up: sram_bw2 1
19 percolate up: sram_bw3 1
20 percolate up: sram_clk 1
21 percolate up: sram_cs_b 1
22 percolate up: sram_flash_a0 1
23 percolate up: sram_flash_a1 1
24 percolate up: sram_flash_a2 1
25 percolate up: sram_flash_a3 1
26 percolate up: sram_flash_a4 1
27 percolate up: sram_flash_a5 1
28 percolate up: sram_flash_a6 1
29 percolate up: sram_flash_a7 1
30 percolate up: sram_flash_a8 1
31 percolate up: sram_flash_a9 1
32 percolate up: sram_flash_a10 1
33 percolate up: sram_flash_a11 1
34 percolate up: sram_flash_a12 1
35 percolate up: sram_flash_a13 1
36 percolate up: sram_flash_a14 1
37 percolate up: sram_flash_a15 1
38 percolate up: sram_flash_a16 1
39 percolate up: sram_flash_a17 1
40 percolate up: sram_flash_a18 1
41 percolate up: sram_flash_a19 1
42 percolate up: sram_flash_a20 1
43 percolate up: sram_flash_a21 1
44 percolate up: sram_flash_we_b 1
45 percolate up: sram_mode 1
46 percolate up: sram_oe_b 1
48 percolate inout: sram_d16 1
49 percolate inout: sram_d17 1
50 percolate inout: sram_d18 1
51 percolate inout: sram_d19 1
52 percolate inout: sram_d20 1
53 percolate inout: sram_d21 1
54 percolate inout: sram_d22 1
55 percolate inout: sram_d23 1
56 percolate inout: sram_d24 1
57 percolate inout: sram_d25 1
58 percolate inout: sram_d26 1
59 percolate inout: sram_d27 1
60 percolate inout: sram_d28 1
61 percolate inout: sram_d29 1
62 percolate inout: sram_d30 1
63 percolate inout: sram_d31 1
65 percolate inout: sram_dqp0 1
66 percolate inout: sram_dqp1 1
67 percolate inout: sram_dqp2 1
68 percolate inout: sram_dqp3 1
70 percolate inout: sram_flash_d0 1
71 percolate inout: sram_flash_d1 1
72 percolate inout: sram_flash_d2 1
73 percolate inout: sram_flash_d3 1
74 percolate inout: sram_flash_d4 1
75 percolate inout: sram_flash_d5 1
76 percolate inout: sram_flash_d6 1
77 percolate inout: sram_flash_d7 1
78 percolate inout: sram_flash_d8 1
79 percolate inout: sram_flash_d9 1
80 percolate inout: sram_flash_d10 1
81 percolate inout: sram_flash_d11 1
82 percolate inout: sram_flash_d12 1
83 percolate inout: sram_flash_d13 1
84 percolate inout: sram_flash_d14 1
85 percolate inout: sram_flash_d15 1
87 == TeX ==============================================================
89 == Fleeterpreter ====================================================
90 public void service() { }
91 == FleetSim ==============================================================
93 == FPGA ==============================================================
95 wire [17:0] wb_adr_i; // : in std_logic_vector(17 downto 0);
96 wire wb_we_i; // : in std_logic;
97 wire [35:0] wb_dat_i; // : in std_logic_vector(35 downto 0);
98 wire [3:0] wb_sel_i; // : in std_logic_vector(3 downto 0);
99 wire [35:0] wb_dat_o; // : out std_logic_vector(35 downto 0);
101 wire wb_err_o; // : out std_logic;
103 wire wb_cyc_i; // : in std_logic;
104 wire wb_stb_i; // : in std_logic;
105 wire [2:0] wb_cti_i; // : in std_logic_vector(2 downto 0);
106 wire [1:0] wb_bte_i; // : in std_logic_vector(1 downto 0);
108 wire wb_ack_o; // : out std_logic;
110 wire wb_tga_i; // : in std_logic := '0' --'0' to mean last (or single) 4 words burst
116 .sram_mode(sram_mode),
117 .sram_cs_b(sram_cs_b),
118 .sram_oe_b(sram_oe_b),
119 .sram_flash_we_b(sram_flash_we_b),
120 .sram_adv_ld_b(sram_adv_ld_b),
126 // SRAM_FLASH_A0 : out STD_LOGIC; --not connected to SRAM!
127 .SRAM_FLASH_A1(sram_flash_a1),
128 .SRAM_FLASH_A2(sram_flash_a2),
129 .SRAM_FLASH_A3(sram_flash_a3),
130 .SRAM_FLASH_A4(sram_flash_a4),
131 .SRAM_FLASH_A5(sram_flash_a5),
132 .SRAM_FLASH_A6(sram_flash_a6),
133 .SRAM_FLASH_A7(sram_flash_a7),
134 .SRAM_FLASH_A8(sram_flash_a8),
135 .SRAM_FLASH_A9(sram_flash_a9),
136 .SRAM_FLASH_A10(sram_flash_a10),
137 .SRAM_FLASH_A11(sram_flash_a11),
138 .SRAM_FLASH_A12(sram_flash_a12),
139 .SRAM_FLASH_A13(sram_flash_a13),
140 .SRAM_FLASH_A14(sram_flash_a14),
141 .SRAM_FLASH_A15(sram_flash_a15),
142 .SRAM_FLASH_A16(sram_flash_a16),
143 .SRAM_FLASH_A17(sram_flash_a17),
144 .SRAM_FLASH_A18(sram_flash_a18),
146 .SRAM_FLASH_D0(sram_flash_d0),
147 .SRAM_FLASH_D1(sram_flash_d1),
148 .SRAM_FLASH_D2(sram_flash_d2),
149 .SRAM_FLASH_D3(sram_flash_d3),
150 .SRAM_FLASH_D4(sram_flash_d4),
151 .SRAM_FLASH_D5(sram_flash_d5),
152 .SRAM_FLASH_D6(sram_flash_d6),
153 .SRAM_FLASH_D7(sram_flash_d7),
154 .SRAM_FLASH_D8(sram_flash_d8),
155 .SRAM_FLASH_D9(sram_flash_d9),
156 .SRAM_FLASH_D10(sram_flash_d10),
157 .SRAM_FLASH_D11(sram_flash_d11),
158 .SRAM_FLASH_D12(sram_flash_d12),
159 .SRAM_FLASH_D13(sram_flash_d13),
160 .SRAM_FLASH_D14(sram_flash_d14),
161 .SRAM_FLASH_D15(sram_flash_d15),
179 .SRAM_DQP0(sram_dqp0),
180 .SRAM_DQP1(sram_dqp1),
181 .SRAM_DQP2(sram_dqp2),
182 .SRAM_DQP3(sram_dqp3),
198 assign wb_sel_i = 4'b0000;
200 assign gpio_led_0 = wb_err_o_r;
201 always @(posedge clk) begin
205 wb_err_o_r <= wb_err_o_r | wb_err_o;
209 // custom code //////////////////////////////////////////////////////////////////////////////
212 assign out_d_ = out_d;
214 // grossly inefficient -- always uses only the first word of a burst!
215 always @(posedge clk) begin
223 if (burst_count == 0 || burst_count == 1) begin
226 end else if ((burst_count > 1) && (app_af_cmd == 3'b000)) begin
227 app_af_wren <= ~burst_count[0];
230 if (burst_count > 0) begin
231 burst_count <= burst_count - 1;
232 end else if ((~read_waiting) && rd_data_valid) begin
234 end else if (read_waiting) begin
235 if (rd_data_valid) begin
237 out_d <= { 1'b0, rd_data_fifo_out[36:0] };
240 end else if (app_wdf_afull || app_af_afull) begin
242 end else if (`inAddrWrite_full && `inDataWrite_full) begin
245 app_wdf_data <= inDataWrite_d;
246 app_af_addr <= { inAddrWrite_d, 2'b00 };
247 app_af_cmd <= 3'b000;
251 out_d <= { phy_init_done //1'b1
255 end else if (`inAddrRead_full) begin
257 app_af_addr <= { inAddrRead_d, 2'b00 };
258 app_af_cmd <= 3'b001;
268 == UCF ==============================================================
270 NET sram_adv_ld_b LOC="H8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
271 NET sram_bw0 LOC="D10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
272 NET sram_bw1 LOC="D11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
273 NET sram_bw2 LOC="J11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
274 NET sram_bw3 LOC="K11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
275 NET sram_clk LOC="AG21"; # Bank 4, Vcco=3.3V, No DCI
276 NET sram_clk LOC="G8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
277 NET sram_cs_b LOC="J10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
278 NET sram_d16 LOC="N10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
279 NET sram_d17 LOC="E13"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
280 NET sram_d18 LOC="E12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
281 NET sram_d19 LOC="L9"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
282 NET sram_d20 LOC="M10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
283 NET sram_d21 LOC="E11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
284 NET sram_d22 LOC="F11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
285 NET sram_d23 LOC="L8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
286 NET sram_d24 LOC="M8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
287 NET sram_d25 LOC="G12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
288 NET sram_d26 LOC="G11"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
289 NET sram_d27 LOC="C13"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
290 NET sram_d28 LOC="B13"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
291 NET sram_d29 LOC="K9"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
292 NET sram_d30 LOC="K8"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
293 NET sram_d31 LOC="J9"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
294 NET sram_dqp0 LOC="D12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
295 NET sram_dqp1 LOC="C12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
296 NET sram_dqp2 LOC="H10"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
297 NET sram_dqp3 LOC="H9"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
298 NET sram_flash_a0 LOC="K12"; # Bank 1, Vcco=3.3V
299 NET sram_flash_a1 LOC="K13"; # Bank 1, Vcco=3.3V
300 NET sram_flash_a2 LOC="H23"; # Bank 1, Vcco=3.3V
301 NET sram_flash_a3 LOC="G23"; # Bank 1, Vcco=3.3V
302 NET sram_flash_a4 LOC="H12"; # Bank 1, Vcco=3.3V
303 NET sram_flash_a5 LOC="J12"; # Bank 1, Vcco=3.3V
304 NET sram_flash_a6 LOC="K22"; # Bank 1, Vcco=3.3V
305 NET sram_flash_a7 LOC="K23"; # Bank 1, Vcco=3.3V
306 NET sram_flash_a8 LOC="K14"; # Bank 1, Vcco=3.3V
307 NET sram_flash_a9 LOC="L14"; # Bank 1, Vcco=3.3V
308 NET sram_flash_a10 LOC="H22"; # Bank 1, Vcco=3.3V
309 NET sram_flash_a11 LOC="G22"; # Bank 1, Vcco=3.3V
310 NET sram_flash_a12 LOC="J15"; # Bank 1, Vcco=3.3V
311 NET sram_flash_a13 LOC="K16"; # Bank 1, Vcco=3.3V
312 NET sram_flash_a14 LOC="K21"; # Bank 1, Vcco=3.3V
313 NET sram_flash_a15 LOC="J22"; # Bank 1, Vcco=3.3V
314 NET sram_flash_a16 LOC="L16"; # Bank 1, Vcco=3.3V
315 NET sram_flash_a17 LOC="L15"; # Bank 1, Vcco=3.3V
316 NET sram_flash_a18 LOC="L20"; # Bank 1, Vcco=3.3V
317 NET sram_flash_a19 LOC="L21"; # Bank 1, Vcco=3.3V
318 NET sram_flash_a20 LOC="AE23"; # Bank 2, Vcco=3.3V
319 NET sram_flash_a21 LOC="AE22"; # Bank 2, Vcco=3.3V
320 NET sram_flash_d0 LOC="AD19"; # Bank 2, Vcco=3.3V
321 NET sram_flash_d1 LOC="AE19"; # Bank 2, Vcco=3.3V
322 NET sram_flash_d2 LOC="AE17"; # Bank 2, Vcco=3.3V
323 NET sram_flash_d3 LOC="AF16"; # Bank 2, Vcco=3.3V
324 NET sram_flash_d4 LOC="AD20"; # Bank 2, Vcco=3.3V
325 NET sram_flash_d5 LOC="AE21"; # Bank 2, Vcco=3.3V
326 NET sram_flash_d6 LOC="AE16"; # Bank 2, Vcco=3.3V
327 NET sram_flash_d7 LOC="AF15"; # Bank 2, Vcco=3.3V
328 NET sram_flash_d8 LOC="AH13"; # Bank 4, Vcco=3.3V, No DCI
329 NET sram_flash_d9 LOC="AH14"; # Bank 4, Vcco=3.3V, No DCI
330 NET sram_flash_d10 LOC="AH19"; # Bank 4, Vcco=3.3V, No DCI
331 NET sram_flash_d11 LOC="AH20"; # Bank 4, Vcco=3.3V, No DCI
332 NET sram_flash_d12 LOC="AG13"; # Bank 4, Vcco=3.3V, No DCI
333 NET sram_flash_d13 LOC="AH12"; # Bank 4, Vcco=3.3V, No DCI
334 NET sram_flash_d14 LOC="AH22"; # Bank 4, Vcco=3.3V, No DCI
335 NET sram_flash_d15 LOC="AG22"; # Bank 4, Vcco=3.3V, No DCI
336 NET sram_flash_we_b LOC="AF20"; # Bank 2, Vcco=3.3V
337 NET sram_mode LOC="A13"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
338 NET sram_oe_b LOC="B12"; # Bank 20, Vcco=3.3V, DCI using 49.9 ohm resistors
341 == Test ==============================================================
350 set ilc=*; recv, deliver;
354 send token to ddr.inAddrRead;
355 set ilc=3; collect, send to debug.in;
358 set word= 0x1; deliver;
359 set word= 0x10; deliver;
360 set word=0x100; deliver;
363 set word=20; deliver;
364 set word=16; deliver;
365 set word=12; deliver;
369 set word= 0x1; deliver;
370 set word= 0x10; deliver;
371 set word=0x100; deliver;
374 == Constants ========================================================
376 == Contributors =========================================================
377 Adam Megacz <megacz@cs.berkeley.edu>