1 package com.sun.vlsi.chips.marina.test;
2 /* -*- tab-width: 4 -*- */
3 import com.sun.async.test.BitVector;
4 import com.sun.async.test.ChainControl;
5 import com.sun.async.test.ChipModel;
6 import com.sun.async.test.JtagTester;
7 import com.sun.async.test.NanosimModel;
8 import com.sun.async.test.VerilogModel;
9 import com.sun.async.test.*;
11 import edu.berkeley.fleet.api.Instruction;
12 import edu.berkeley.fleet.marina.MarinaPath;
14 /** The Marina object will eventually represent the Marina test chip.
15 * Right now, it doesn't do much of anything. It just helps me exercise
16 * my test infrastructure. */
19 public static final int INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE = 5;
20 public static final int INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO = MarinaPath.SIGNAL_BIT_INDEX;
23 public static int TOKEN_FIFO_CAPACITY = 3;
25 //public static boolean kesselsCounter = true;
26 public static boolean kesselsCounter = false;
27 public static boolean omegaCounter = false;
29 public static final String DATA_CHAIN = kesselsCounter ? "marina.marina_data" : "marina.ivan_data";
30 public static final String CONTROL_CHAIN = kesselsCounter ? "marina.marina_control" : "marina.ivan_control";
31 public static final String REPORT_CHAIN = kesselsCounter ? "marina.marina_report" : "marina.ivan_report";
33 public static String prefix = "marinaGu@0.outDockW@"+(kesselsCounter?"3":"0")+".marinaOu@"+(kesselsCounter?"1":"0")+".";
34 public static String MASTER_CLEAR = "mc";
38 private static String prefix = "outDockW@"+(kesselsCounter?"3":"0")+".marinaOu@1.";
39 private static String MASTER_CLEAR = "EXTmasterClear";
42 private static final String OLC_PATH_EVEN =
43 prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.scanEx3h@1"; // bits 2,4,6
44 private static final String OLC_PATH_ODD =
45 prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.scanEx3h@2"; // bits 1,3,5
46 private static final String OLC_PATH_KESSEL =
47 prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.counte@0.adamScan@1.scanEx6h@";
48 private static final String ILC_PATH_ODD =
49 prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx4h@0"; // bits 1,3,5,7
50 private static final String ILC_PATH_EVEN =
51 prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx4h@1"; // bits 2,4,6,8
52 private static final String FLAGS_PATH =
53 prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.scanEx3h@0";
55 private static final String INSTR_RING_CONTROL_PATH =
56 prefix+"southFif@1.tapPropS@1.tapStage@2";
57 private static final String TOK_FIFO_PATH =
59 private static final String INSTRUCTION_COUNTER_PATH =
60 prefix+"southFif@1.tapPropS@1.instruct@0";
61 private static final String DATA_COUNTER_PATH =
62 prefix+"northFif@1.fillDrai@1.instruct@0";
63 private static final String TOK_PRED_PATH =
64 prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.scanEx2h@0.scanCell@10";
66 private static final int COUNTER_LENGTH = 34;
67 private static final int INSTRUCTION_SEND_NDX = 1;
68 private static final int INSTRUCTION_RECIRCULATE_NDX = 0;
70 public static final int INSTRUCTION_LENGTH = 36;
72 private static final int A_FLAG_NDX = 0;
73 private static final int B_FLAG_NDX = 1;
75 public static final int SOUTH_RING_CAPACITY = 11;
77 // ILC appears in scan chain as "count[1:6], zLo, i, dLo"
79 // value is bit reversed and complemented
82 shiftReport(true, false);
83 BitVector odd = cc.getOutBits(REPORT_CHAIN+"."+ILC_PATH_ODD).bitReverse().not();
84 BitVector even = cc.getOutBits(REPORT_CHAIN+"."+ILC_PATH_EVEN).bitReverse().not();
85 BitVector ret = new BitVector(8, "olc");
86 for(int i=0; i<4; i++) {
87 ret.set(i*2+1, odd.get(i));
88 ret.set(i*2, even.get(i));
90 value = (int)ret.toLong();
92 /** Get the inner loop counter done bit. */
93 public boolean getDone() {
94 return (value & 0x40) != 0;
96 /** Get the inner loop counter infinity bit */
97 public boolean getInfinity() {
98 return (value & 0x80) != 0;
100 /** Get the 6 bits of count of the inner loop counter */
101 public int getCount() {
104 public String toString() {
105 return "[ilc, count="+getCount()+", infinity="+getInfinity()+", done="+getDone()+"]";
109 private final Indenter indenter;
111 // The name of the scan chain
112 // The instance path, from the top cell of the netlist, of the instance of infinityWithCover
113 private final ChainControls cc; // specifies the scan chain
114 private final ChipModel model;
115 public final ProperStopper data;
116 public final InstructionStopper instrIn;
118 private void prln(String msg) {indenter.prln(msg);}
119 private void pr(String msg) {indenter.pr(msg);}
121 /** Shift the report scan chain */
122 private void shiftReport(boolean readEnable, boolean writeEnable) {
123 cc.shift(REPORT_CHAIN, readEnable, writeEnable);
126 /** Shift the report scan chain */
127 private void shiftControl(boolean readEnable, boolean writeEnable) {
128 cc.shift(CONTROL_CHAIN, readEnable, writeEnable);
131 /** Shift the data scan chain */
132 private void shiftData(boolean readEnable, boolean writeEnable) {
133 cc.shift(DATA_CHAIN, readEnable, writeEnable);
136 public Marina(ChainControls cc, ChipModel model, boolean clockHack, Indenter indenter) {
139 this.indenter = indenter;
140 data = new ProperStopper("north fifo",
141 prefix+"northFif@1.fillDrai@1.properSt@1",
145 cc, model, clockHack, indenter);
146 instrIn = new InstructionStopper("south fifo",
147 prefix+"southFif@1.tapPropS@1.properSt@1",
151 cc, model, clockHack, indenter);
153 public void masterClear() {
154 final double WIDTH = 10; // ns
155 // Put a high going pulse on the internal chip master clear signal
156 if (model instanceof VerilogModel) {
161 VerilogModel vm = (VerilogModel)model;
163 // In real life the flags come up with some undefined
164 // value. In verilog we need to prevent the X'es from
165 // propagating, so we force the flags to a known value
167 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__set_", 0);
168 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__clr_", 1);
169 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__set_", 0);
170 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__clr_", 1);
172 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_", 1);
173 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_", 0);
175 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@0.net_50", 0); // A
176 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@1.net_50", 0); // B
177 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.litDandP@0.latch2in@0.hi2inLat@0.latchKee@0.out_B_", 0); // C
179 // possible C-flag inputs
180 vm.setNodeState(prefix+"northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE+1)+"]", 0);
181 vm.setNodeState(prefix+"northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO+1)+"]", 0);
183 // force the OLC to zero
185 for(int i=1; i<=6; i++)
186 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]", (i==1)?0:1);
188 // set the ILC input to 1
189 for(int i=1; i<=8; i++) {
191 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.\\inLO["+i+"]", (i==1)?0:1);
194 vm.setNodeState(prefix+"northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire", 1);
196 vm.setNodeState(prefix+"northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire", 0);
199 vm.setNodeState(MASTER_CLEAR, 1);
201 vm.setNodeState(MASTER_CLEAR, 0);
204 // pulse ilc[load] and olc[load]
205 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_load_", 1);
206 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_decLO_", 1);
207 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_torpLO_", 1);
209 vm.setNodeState(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_", 1);
212 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_load_");
213 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_decLO_");
214 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.ilc_torpLO_");
216 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.olc_load_");
218 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__set_");
219 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_A__clr_");
220 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__set_");
221 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_B__clr_");
223 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__set_");
224 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flag_D__clr_");
226 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@0.net_50");
227 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.flags@0.aFlag@1.net_50");
229 // Every move instruction, even those with Ti=0,Di=0,
230 // loads the C-flag. It will get loaded with an "X",
231 // which will then leak into the flags and from there the
233 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.litDandP@0.latch2in@0.hi2inLat@0.latchKee@0.out_B_");
234 vm.releaseNode(prefix+"northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ONE+1)+"]");
235 vm.releaseNode(prefix+"northFif@1.upDown8w@2.weakStag@22.ain["+(INDEX_OF_ADDRESS_BIT_COPIED_TO_C_FLAG_WHEN_DC_EQUALS_ZERO+1)+"]");
236 vm.releaseNode(prefix+"northFif@1.upDown8w@2.weakStag@22.addr1in2@0.fire");
238 for(int i=1; i<=8; i++) {
240 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.ilcMoveO@0.ilc@0.\\inLO["+i+"] ");
245 for(int i=1; i<=6; i++)
246 vm.releaseNode(prefix+"outputDo@0.outM1Pre@0.outDockP@0.outDockC@0.olcWcont@0.olc@0.inLO["+i+"]");
248 // the proper stopper states come up in an undefined ("X")
249 // state, so under Verilog we need to force them to a
255 } else if (model instanceof NanosimModel) {
256 NanosimModel nModel = (NanosimModel) model;
258 nModel.setNodeVoltage(prefix+"sid[9]",1.0);
259 nModel.setNodeVoltage(prefix+"sic[9]",1.0);
260 nModel.setNodeVoltage(prefix+"sir[9]",1.0);
261 nModel.waitNS(WIDTH);
262 nModel.setNodeVoltage(prefix+"sid[9]",0.0);
263 nModel.setNodeVoltage(prefix+"sic[9]",0.0);
264 nModel.setNodeVoltage(prefix+"sir[9]",0.0);
267 nModel.setNodeVoltage(MASTER_CLEAR,1.0);
268 nModel.waitNS(WIDTH);
269 nModel.setNodeVoltage(MASTER_CLEAR,0.0);
272 mc0.setLogicState(true);
273 mc1.setLogicState(true);
275 mc0.setLogicState(false);
276 mc1.setLogicState(false);
279 resetAfterMasterClear();
285 private void resetAfterMasterClear() {
286 // The following call to ChainControl.resetInBits() is vital!
287 // If you forget, then the inBits member initializes
288 // with random data. Then when you do your first write,
289 // some bits are written randomly.
292 // For reset, I want to clear all the stoppers simultaneously
301 data.resetAfterMasterClear();
302 //tokOut.resetAfterMasterClear();
303 instrIn.resetAfterMasterClear();
307 /** Get the 6 bit outer loop counter. */
308 public int getOLC() {
309 shiftReport(true, false);
311 BitVector bits = null;
312 for(int i=0; i<4; i++) {
313 BitVector x = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_KESSEL+i);
314 //System.out.println("bits are: " + x);
315 bits = bits==null ? x : bits.cat(x);
317 System.out.print(" kesselsCounter = ");
321 for(int bit=5; bit>=0; bit--) {
322 boolean zeroOrTwo = bits.get(4+bit*3);
323 boolean zeroOrDone = bits.get(4+bit*3+1);
324 if ( zeroOrTwo && !zeroOrDone) {
326 System.out.print("2");
328 } else if (!zeroOrTwo && !zeroOrDone) {
330 System.out.print("1");
332 } else if ( zeroOrTwo && zeroOrDone) {
333 System.out.print("0");
336 } else if (!zeroOrTwo && zeroOrDone) {
337 System.out.print("_");
338 if (!done) bad = true;
340 // FIXME: check for unreduced counter and warn about it
342 if (bad) System.out.print(" WARNING: UNREDUCED COUNTER VALUE!!!!!!");
343 System.out.println();
345 } else if (kesselsCounter) {
346 BitVector bits = null;
347 for(int i=0; i<4; i++) {
348 BitVector x = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_KESSEL+i);
349 //System.out.println("bits are: " + x);
350 bits = bits==null ? x : bits.cat(x);
352 //System.out.println("kesselsCounter = " + bits);
355 for(int i=0; i<6; i++) first |= bits.get(4+i*3) ? (1<<i) : 0;
356 for(int i=0; i<6; i++) second |= bits.get(4+i*3+2) ? (1<<i) : 0;
357 return (first+second);
359 BitVector odd = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_ODD).bitReverse();
360 BitVector even = cc.getOutBits(REPORT_CHAIN+"."+OLC_PATH_EVEN).bitReverse();
363 BitVector bv = new BitVector(6, "olc");
364 for(int i=0; i<3; i++) {
365 bv.set(i*2, odd.get(i));
366 bv.set(i*2+1, even.get(i));
368 return (int)bv.toLong();
371 /** Get the 7 bit inner loop counter. The MSB is the zero bit.
372 * The low order 6 bits are the count */
373 public Ilc getILC() {
376 /** Get the A flag */
377 public boolean getFlagA() {
378 shiftReport(true, false);
379 return cc.getOutBits(REPORT_CHAIN+"."+FLAGS_PATH).get(A_FLAG_NDX);
381 /** Get the B flag */
382 public boolean getFlagB() {
383 shiftReport(true, false);
384 return cc.getOutBits(REPORT_CHAIN+"."+FLAGS_PATH).get(B_FLAG_NDX);
386 /** return value of instruction counter. Instruction counter counts
387 * the instructions flowing through 1/2 of alternating FIFO.
388 * Caution: instruction counter is written by all scans,
389 * regardless of readEnable or writeEnable! */
390 public long getInstructionCounter() {
391 shiftData(true, false);
392 BitVector count = cc.getOutBits(DATA_CHAIN+"."+INSTRUCTION_COUNTER_PATH);
393 int sz = count.getNumBits();
394 MarinaTest.fatal(sz!=COUNTER_LENGTH, "wrong number of counter bits: "+sz+
395 " expected: "+COUNTER_LENGTH);
396 return count.bitReverse().toLong();
398 /** return value of data counter. Data counter counts items flowing
399 * through drain stage of data proper stopper.
400 * Caution: data counter is written by all scans,
401 * regardless of readEnable or writeEnable! */
402 public long getDataCounter() {
403 shiftData(true, false);
404 BitVector count = cc.getOutBits(DATA_CHAIN+"."+DATA_COUNTER_PATH);
405 int sz = count.getNumBits();
406 MarinaTest.fatal(sz!=COUNTER_LENGTH, "wrong number of counter bits: "+sz+
407 " expected: "+COUNTER_LENGTH);
408 return count.bitReverse().toLong();
410 /** Fill the "North" Fifo ring */
411 public void fillNorthProperStopper() {
412 BitVector data = new BitVector(37, "empty");
413 BitVector addr = new BitVector(14, "empty");
414 for(int i=0; i<data.getNumBits(); i++) data.set(i, false);
415 for(int i=0; i<addr.getNumBits(); i++) addr.set(i, false);
416 fillNorthProperStopper(new MarinaPacket(data, false, addr));
418 /** Fill the "North" Fifo ring */
419 public void fillNorthProperStopper(MarinaPacket mp) {
420 prln("inserting into north: " + mp);
421 this.data.fill(mp.toSingleBitVector());
423 /** Enable the transmission of instructions from the instruction
424 * ring test structure to the EPI FIFO. */
425 public void enableInstructionSend(boolean b) {
426 BitVector bv = cc.getInBits(CONTROL_CHAIN+"."+INSTR_RING_CONTROL_PATH);
427 bv.set(INSTRUCTION_SEND_NDX, b);
428 cc.setInBits(CONTROL_CHAIN+"."+INSTR_RING_CONTROL_PATH, bv);
429 shiftControl(false, true);
431 /** Enable the recirculation of instructions within the South FIFO */
432 public void enableInstructionRecirculate(boolean b) {
433 BitVector bv = cc.getInBits(CONTROL_CHAIN+"."+INSTR_RING_CONTROL_PATH);
434 bv.set(INSTRUCTION_RECIRCULATE_NDX, b);
435 cc.setInBits(CONTROL_CHAIN+"."+INSTR_RING_CONTROL_PATH, bv);
436 shiftControl(false, true);
438 /** get the number of tokens in the token FIFO.
439 * This includes the Token successor wire, the token FIFO wires,
440 * and Token predecessor wire.
441 * Master clear clears the token FIFO. */
442 public int getNumTokens() {
443 shiftReport(true, false);
444 // get the token successor and token FIFO wires
445 BitVector bv = cc.getOutBits(REPORT_CHAIN+"."+TOK_FIFO_PATH);
446 int sz = bv.getNumBits();
447 MarinaTest.fatal(sz!=3, "wrong token FIFO size: "+sz+" expected: 3");
449 // get the token predecessor wire
450 BitVector pred = cc.getOutBits(REPORT_CHAIN+"."+TOK_PRED_PATH);
451 sz = pred.getNumBits();
452 MarinaTest.fatal(sz!=1, "wrong token predecessor size: "+sz+" expected: 1");
456 sz = bv.getNumBits();
457 prln("Token state wires: "+bv.getState());
460 for (int i=0; i<sz; i++) if (bv.get(i)) nbTok++;
463 /** Configure the test probe so it measures the throughput of
464 * the north data FIFO. The test probe frequency is 8192
465 * times slower than the FIFO throughput. This control has
466 * highest priority. */
467 public void probeDataCounter(Boolean b) {
468 data.setGeneralPurposeOutput(b);
470 /** Configure the test probe so it measures the throughput of
471 * the alternating instruction FIFO. The test probe frequency is
472 * 1/16384 of the FIFO throughput. This control has second
473 * highest priority. Thus the following two calls probe the
474 * instruction counter:
475 * probeDataCounter(false);
476 * probeInstructionCounter(true)
478 public void enableInstructionCounter(Boolean b) {
479 instrIn.setGeneralPurposeOutput(b);
482 public void fillSouthProperStopper(Instruction[] instructions) { fillSouthProperStopper(instructions, false); }
483 public void fillSouthProperStopper(Instruction[] instructions, boolean repeat) {
484 enableInstructionSend(false);
485 enableInstructionRecirculate(true);
486 for(Instruction i : instructions)
489 enableInstructionRecirculate(repeat);
490 enableInstructionSend(true);