1 package edu.berkeley.fleet.fpga;
2 import edu.berkeley.fleet.fpga.*;
3 import edu.berkeley.fleet.api.*;
4 import edu.berkeley.fleet.two.*;
5 import edu.berkeley.fleet.*;
6 import java.lang.reflect.*;
7 import edu.berkeley.sbp.chr.*;
8 import edu.berkeley.sbp.misc.*;
9 import edu.berkeley.sbp.meta.*;
10 import edu.berkeley.sbp.util.*;
13 import edu.berkeley.fleet.two.*;
14 import static edu.berkeley.fleet.two.FleetTwoFleet.*;
15 import static edu.berkeley.fleet.fpga.verilog.Verilog.*;
16 import static edu.berkeley.fleet.fpga.verilog.Verilog.PercolatedPort;
19 public class Fpga extends FleetTwoFleet {
22 public FabricElement top_horn;
25 public LinkedHashMap<String,FpgaShip> ships = new LinkedHashMap<String,FpgaShip>();
26 public Iterator<Ship> iterator() { return (Iterator<Ship>)(Object)ships.values().iterator(); }
28 public Ship getShip(String type, int ordinal) {
30 if (s.getType().equals(type))
36 public static void main(String[] s) throws Exception {
37 new Fpga(new Module("main")).top.dump(s[0]);
40 pw = new PrintWriter(new OutputStreamWriter(new FileOutputStream(s[0]+"/timescale.v")));
41 pw.println("`timescale 1ns / 10ps");
44 pw = new PrintWriter(new OutputStreamWriter(new FileOutputStream(s[0]+"/vram.v")));
45 pw.println("`define BRAM_ADDR_WIDTH 19");
46 pw.println("`define BRAM_DATA_WIDTH 3");
47 pw.println("`define BRAM_SIZE (640*480)");
48 pw.println("`define BRAM_NAME vram");
49 pw.println("`include \"bram.inc\"");
53 public Module getVerilogModule() { return top; }
55 public FleetProcess run(Instruction[] instructions) {
57 return new Client(this, "none", instructions);
58 } catch (Exception e) { throw new RuntimeException(e); }
61 public BitVector getDestAddr(Path path) {
62 return ((FpgaPath)path).toBitVector();
65 // Setup //////////////////////////////////////////////////////////////////////////////
67 public Ship createShip(String type, String name) throws IOException {
68 ShipDescription sd = new ShipDescription(type, new BufferedReader(new InputStreamReader(new FileInputStream("ships/"+type+".ship"))));
69 FpgaShip ship = new FpgaShip(this, sd);
70 ships.put(name, ship);
74 public Fpga() throws Exception { this(new Module("main")); }
75 public Fpga(Module top) throws Exception {
77 debugShip = createShip("Debug", "debug");
79 //boolean small = false;
82 createShip("Memory", "memory1");
85 for(int i=0; i<2; i++)
86 createShip("Fifo", "fifo"+i);
87 for(int i=0; i<2; i++)
88 createShip("Alu", "alu"+i);
89 createShip("Counter", "counter");
90 createShip("CarrySaveAdder", "csa1");
91 createShip("Rotator", "rotator");
92 createShip("Lut3", "lut");
94 createShip("Memory", "memory2");
95 createShip("Memory", "memory3");
97 for(int i=0; i<3; i++)
98 createShip("Alu", "alu"+i);
100 for(int i=0; i<1; i++)
101 createShip("Fifo", "fifo"+i);
103 for(int i=0; i<14; i++)
104 createShip("Counter", "counter"+i);
107 createShip("CarrySaveAdder", "csa1");
108 createShip("Rotator", "rotator");
109 createShip("Lut3", "lut");
111 //createShip("DDR2", "ddr2");
113 createShip("DRAM", "dram");
114 createShip("Video", "video");
117 new Module.InstantiatedModule(top, new FifoModule(8, WIDTH_WORD));
119 Module.Latch temp_in = top.new Latch("temp", WIDTH_PACKET);
120 Module.Latch count = top.new Latch("count", 8);
122 ArrayList inbox_sources = new ArrayList<FabricElement>();
123 ArrayList inbox_dests = new ArrayList<FabricElement>();
124 ArrayList outbox_sources = new ArrayList<FabricElement>();
125 ArrayList outbox_dests = new ArrayList<FabricElement>();
126 ArrayList instruction_dests = new ArrayList<FabricElement>();
128 for(FpgaShip ship : (Iterable<FpgaShip>)(Object)this) {
129 for(Dock port : ship) {
130 if (port.isInputDock()) {
131 inbox_sources.add(((FpgaDock)port));
132 instruction_dests.add(port.getInstructionDestination());
133 inbox_dests.add(port.getDataDestination());
135 outbox_sources.add(((FpgaDock)port));
136 instruction_dests.add(port.getInstructionDestination());
137 outbox_dests.add(port.getDataDestination());
142 ArrayList dests = new ArrayList<FabricElement>();
143 ArrayList sources = new ArrayList<FabricElement>();
144 sources.addAll(inbox_sources);
145 sources.addAll(outbox_sources);
146 dests.addAll(inbox_dests);
147 dests.addAll(instruction_dests);
148 dests.addAll(outbox_dests);
149 top_horn = mkNode((FabricElement[])dests.toArray(new FabricElement[0]), true);
150 FabricElement source = mkNode((FabricElement[])sources.toArray(new FabricElement[0]), false);
151 FunnelModule.FunnelInstance top_funnel = new FunnelModule.FunnelInstance(this, top, null, source.getOutputPort());
152 ((FunnelModule.FunnelInstance)source).out = top_funnel;
153 top_funnel.addOutput(top_horn, top_horn.getInputPort());
154 Module.SinkPort debug_in = top_funnel.getInputPort("in1");
156 top.addPreCrap("reg root_in_a_;");
157 top.addPreCrap("assign root_in_a = root_in_a_;");
158 top.new Event(new Object[] { "(root_in_r && root_in_a)" },
159 new Object[] { new SimpleAction("root_in_a_<=0;") });
160 top.new Event(new Object[] { "(root_in_r && !root_in_a)", "count<=7" },
161 new Object[] { new SimpleAction(temp_in.getVerilogName()+" <= {" + temp_in.getVerilogName() + "["+(WIDTH_PACKET-(1+8))+":0], root_in_d[7:0] };"),
162 new AssignAction(count, count.getVerilogName()+"+1"),
163 new SimpleAction("root_in_a_<=1;")
165 top.new Event(new Object[] { debug_in, "count>7" },
166 new Object[] { new AssignAction(count, "0"),
167 new AssignAction(debug_in, temp_in),
172 public FabricElement mkNode(FabricElement[] ports, boolean is_horn) { return mkNode(ports, is_horn, 0, ports.length); }
173 public FabricElement mkNode(FabricElement[] ports, boolean is_horn, int start, int end) {
176 case 1: return ports[start];
178 FabricElement leftPort = mkNode(ports, is_horn, start, (end+start)/2);
179 FabricElement rightPort = mkNode(ports, is_horn, (end+start)/2, end);
181 ? new HornModule.HornInstance(this, top, leftPort, rightPort)
182 : new FunnelModule.FunnelInstance(this, top, leftPort, rightPort);
188 // Expand //////////////////////////////////////////////////////////////////////////////
190 public void expand(ShipDescription sd) {
192 if (sd.getSection("fpga")==null) return;
193 String filename = sd.getName().toLowerCase();
194 File outf = new File("build/fpga/"+filename+".v");
195 new File(outf.getParent()).mkdirs();
196 System.err.println("writing to " + outf);
197 FileOutputStream out = new FileOutputStream(outf);
198 PrintWriter pw = new PrintWriter(out);
200 pw.println("`define WORDWIDTH "+WIDTH_WORD);
201 pw.println("`define CODEBAG_SIZE_BITS "+CBD_SIZE.valmaskwidth);
204 for(DockDescription dd : sd) {
205 String name = dd.getName();
206 pw.println("`define "+name+"_full ("+name+"_r && !"+name+"_a)");
207 pw.println("`define "+name+"_empty (!"+name+"_r && !"+name+"_a)");
208 if (dd.isInputDock()) {
209 pw.println("`define drain_"+name+" "+name+"_a <= 1;");
211 pw.println("`define fill_"+name+" "+name+"_r <= 1;");
212 pw.println("`define "+name+"_draining ("+name+"_r && "+name+"_a)");
216 pw.print("`define reset ");
217 for(DockDescription bb : sd) {
218 String bb_name = bb.getName();
219 if (bb.isInputDock()) pw.print(bb_name+"_a <= 1; "+bb_name+"_f <= 0; ");
220 else pw.print(bb_name+"_r <= 0; ");
224 pw.print("`define cleanup ");
225 for(DockDescription bb : sd) {
226 String bb_name = bb.getName();
227 if (bb.isInputDock()) pw.print("if (!"+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_a <= 0; ");
228 else pw.print("if ( "+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_r <= 0; ");
232 // FIXME: this corresponds to something
234 pw.print("`define flush_happening (1");
235 for(DockDescription bb : sd)
236 if (bb.isInputDock())
237 pw.print(" && "+bb.getName()+"_r_ && !"+bb.getName()+"_a && "+bb.getName()+"_d["+WIDTH_WORD+"]");
241 pw.print("`define flush ");
242 for(DockDescription bb : sd)
243 if (bb.isInputDock())
244 pw.print(" if (!"+bb.getName()+"_r_) "+bb.getName()+"_f <= 0; ");
246 for(DockDescription bb : sd)
247 if (bb.isInputDock())
248 pw.print(" && "+bb.getName()+"_r_ && !"+bb.getName()+"_a");
249 pw.print(") begin ");
252 for(DockDescription bb : sd)
253 if (bb.isInputDock())
254 pw.print(" && "+bb.getName()+"_d["+WIDTH_WORD+"] ");
255 pw.print(") begin ");
257 for(DockDescription bb : sd)
258 if (bb.isInputDock())
259 pw.print(bb.getName()+"_f <= 1; ");
261 pw.print(" end else if (0");
262 for(DockDescription bb : sd)
263 if (bb.isInputDock())
264 pw.print(" || "+bb.getName()+"_d["+WIDTH_WORD+"] ");
265 pw.print(") begin ");
267 for(DockDescription bb : sd)
268 if (bb.isInputDock())
269 pw.print(" if (!"+bb.getName()+"_d["+WIDTH_WORD+"]) "+bb.getName()+"_f <= 1; ");
276 pw.println("module " + filename + "( clk, rst ");
277 for(DockDescription bb : sd) {
278 String bb_name = bb.getName();
280 if (bb.isInputDock()) {
281 pw.print(", " + bb_name+"_r_");
282 pw.print(", " + bb_name+"_a_");
283 pw.print(", " + bb_name+"_d");
285 pw.print(", " + bb_name+"_r_");
286 pw.print(", " + bb_name+"_a");
287 pw.print(", " + bb_name+"_d_");
291 for(PercolatedPort pp : sd.percolatedPorts) {
297 pw.println(" input clk;");
298 pw.println(" input rst;");
299 for(PercolatedPort pp : sd.percolatedPorts) {
301 case UP: pw.print("output"); break;
302 case DOWN: pw.print("input"); break;
303 case INOUT: pw.print("inout"); break;
307 pw.print("["+(pp.width-1)+":0]");
313 for(DockDescription bb : sd) {
314 String bb_name = bb.getName();
315 if (bb.isInputDock()) {
316 pw.println(" input ["+WIDTH_WORD+":0] "+bb_name+"_d;");
317 pw.println(" input "+bb_name+"_r_;");
318 pw.println(" wire "+bb_name+"_r;");
319 pw.println(" assign "+bb_name+"_r = "+bb_name+"_r_ & ~"+bb_name+"_d["+WIDTH_WORD+"];");
320 pw.println(" output "+bb_name+"_a_;");
321 pw.println(" reg "+bb_name+"_a;");
322 pw.println(" initial "+bb_name+"_a = 0;");
323 pw.println(" reg "+bb_name+"_f;");
324 pw.println(" initial "+bb_name+"_f = 0;");
325 pw.println(" assign "+bb_name+"_a_ = "+bb_name+"_a || "+bb_name+"_f;");
327 pw.println(" output ["+WIDTH_WORD+":0] "+bb_name+"_d_;");
328 pw.println(" input "+bb_name+"_a;");
329 pw.println(" output "+bb_name+"_r_;");
330 pw.println(" reg "+bb_name+"_r;");
331 pw.println(" initial "+bb_name+"_r = 0;");
332 pw.println(" assign "+bb_name+"_r_ = "+bb_name+"_r;");
337 if (filename.equals("fifo")) {
338 pw.println(" wire in_a__;");
339 pw.println(" wire out_r__;");
340 pw.println(" fifo8x37 fifo8x37(clk, rst,");
341 pw.println(" in_r, in_a__, in_d,");
342 pw.println(" out_r__, out_a, out_d_);");
343 pw.println(" always @(posedge clk) begin");
344 pw.println(" if (!rst) begin");
345 pw.println(" `reset");
346 pw.println(" end else begin");
347 pw.println(" `flush");
348 pw.println(" out_r <= out_r__;");
349 pw.println(" in_a <= in_a__;");
353 pw.println(sd.getSection("fpga"));
356 pw.println("endmodule");
360 } catch (Exception e) { throw new RuntimeException(e); }