make HornModule and FunnelModule take an Fpga argument
[fleet.git] / src / edu / berkeley / fleet / fpga / Fpga.java
1 package edu.berkeley.fleet.fpga;
2 import edu.berkeley.fleet.fpga.*;
3 import edu.berkeley.fleet.api.*;
4 import edu.berkeley.fleet.two.*;
5 import edu.berkeley.fleet.*;
6 import java.lang.reflect.*;
7 import edu.berkeley.sbp.chr.*;
8 import edu.berkeley.sbp.misc.*;
9 import edu.berkeley.sbp.meta.*;
10 import edu.berkeley.sbp.util.*;
11 import java.util.*;
12 import java.io.*;
13 import edu.berkeley.fleet.two.*;
14 import static edu.berkeley.fleet.two.FleetTwoFleet.*;
15 import static edu.berkeley.fleet.fpga.verilog.Verilog.*;
16
17
18 /*
19 => get rid of getInputPort(String) and instead use members
20 => clean up fabricelement methods
21 => get rid of addcrap
22 => automatic width-setting on ports
23 => nuke DATAWIDTH?
24   => serdes and fastclock/slowclock?
25 */
26
27 public class Fpga extends FleetTwoFleet {
28
29     public  Module top;
30     public  FabricElement top_horn;
31     Ship debugShip;
32
33     public LinkedHashMap<String,FpgaShip> ships = new LinkedHashMap<String,FpgaShip>();
34     public Iterator<Ship> iterator() { return (Iterator<Ship>)(Object)ships.values().iterator(); }
35
36     public Ship getShip(String type, int ordinal) {
37         for(Ship s : this)
38             if (s.getType().equals(type))
39                 if (--ordinal < 0)
40                     return s;
41         return null;
42     }
43
44     public static void main(String[] s) throws Exception { 
45         new Fpga(new Module("root")).top.dump(s[0]);
46     }
47
48     public FleetProcess run(Instruction[] instructions) {
49         try {
50             return new Client(this, "none", instructions);
51         } catch (Exception e) { throw new RuntimeException(e); }
52     }
53
54     // Setup //////////////////////////////////////////////////////////////////////////////
55
56     public Ship createShip(String type, String name) throws IOException {
57         ShipDescription sd = new ShipDescription(type, new BufferedReader(new InputStreamReader(new FileInputStream("ships/"+type+".ship"))));
58         FpgaShip ship = new FpgaShip(this, sd);
59         ships.put(name, ship);
60         return ship;
61     }
62
63     public Fpga() throws Exception { this(new Module("root")); }
64     public Fpga(Module top) throws Exception {
65         this.top = top;
66         debugShip = createShip("Debug",     "debug");
67
68         boolean small = false;
69
70         createShip("Memory",      "memory1");
71
72         if (small) {
73             createShip("Fifo", "fifo");
74             createShip("Alu",  "alu");
75         } else {
76             //createShip("Memory",    "memory2");
77             //createShip("Memory",    "memory3");
78
79             for(int i=0; i<5; i++)
80                 createShip("Alu",       "alu"+i);
81
82             for(int i=0; i<2; i++)
83                 createShip("Fifo",      "fifo"+i);
84
85             for(int i=0; i<13; i++)
86                 createShip("Counter",  "counter"+i);
87
88             createShip("CarrySaveAdder",  "csa1");
89             createShip("Rotator",         "rotator");
90             createShip("Lut3",            "lut");
91
92             //createShip("DDR2",    "ddr2");
93         }
94         createShip("DRAM",    "dram");
95         createShip("Video",   "video");
96
97         //Module.SourcePort  debug_in    = top.createWireSourcePort("debug_in", WIDTH_PACKET);
98         Module.SourcePort  debug_out   = null;
99         for(FpgaShip ship : (Iterable<FpgaShip>)(Object)this) {
100             if (ship.getType().toLowerCase().equals("debug"))
101                 debug_out = ship.getVerilogModule().getOutputPort("debug_out");
102         }
103
104         // for FifoShip
105         new Module.InstantiatedModule(top, new FifoModule(8, WIDTH_WORD));
106
107         Module.SourcePort  in          = top.createInputPort("in", 8);
108         Module.SinkPort    out         = top.createOutputPort("out", 8, "");
109         Module.Latch       temp_in     = top.new Latch("temp", WIDTH_PACKET);
110         Module.Latch       count       = top.new Latch("count", 8);
111         Module.Latch       count_out   = top.new Latch("count_out", 8);
112
113         ArrayList inbox_sources = new ArrayList<FabricElement>();
114         ArrayList inbox_dests   = new ArrayList<FabricElement>();
115         ArrayList outbox_sources = new ArrayList<FabricElement>();
116         ArrayList outbox_dests   = new ArrayList<FabricElement>();
117         ArrayList instruction_dests   = new ArrayList<FabricElement>();
118         int numdocks = 0;
119         for(FpgaShip ship : (Iterable<FpgaShip>)(Object)this) {
120             if (ship.getType().toLowerCase().equals("debug"))
121                 debug_out = ship.getVerilogModule().getOutputPort("debug_out");
122             for(Dock port : ship) {
123                 if (port.isInputDock()) {
124                     inbox_sources.add(((FpgaDock)port));
125                     instruction_dests.add(port.getInstructionDestination());
126                     inbox_dests.add(port.getDataDestination());
127                 } else {
128                     outbox_sources.add(((FpgaDock)port));
129                     instruction_dests.add(port.getInstructionDestination());
130                     outbox_dests.add(port.getDataDestination());
131                 }
132                 numdocks++;
133             }
134         }
135         //System.err.println("dock count = " + numdocks);
136         ArrayList dests   = new ArrayList<FabricElement>();
137         ArrayList sources = new ArrayList<FabricElement>();
138         sources.addAll(inbox_sources);
139         sources.addAll(outbox_sources);
140         dests.addAll(inbox_dests);
141         dests.addAll(instruction_dests);
142         dests.addAll(outbox_dests);
143         top_horn = mkNode((FabricElement[])dests.toArray(new FabricElement[0]), true);
144         FabricElement   source  = mkNode((FabricElement[])sources.toArray(new FabricElement[0]), false);
145         FunnelModule.FunnelInstance top_funnel = new FunnelModule.FunnelInstance(this, top, null, source.getOutputPort());
146         ((FunnelModule.FunnelInstance)source).out = top_funnel;
147         //top_horn.addInput(top_funnel, top_funnel.getOutputPort());
148         top_funnel.addOutput(top_horn, top_horn.getInputPort());
149
150         //Module.SourcePort  debug_in    = top.createWireSourcePort("debug_in", WIDTH_PACKET);
151         Module.SinkPort debug_in = top_funnel.getInputPort("in1");
152
153         top.new Event(new Object[] { in, "count<=7" },
154                       new Object[] { new SimpleAction(temp_in.getVerilogName()+" <= {" + temp_in.getVerilogName() + "["+(WIDTH_PACKET-(1+8))+":0], in[7:0] };"),
155                                      new SimpleAction("count <= count+1;"),
156                                      in
157                       });
158         top.new Event(new Object[] { debug_in, "count>7" },
159                       new Object[] { new SimpleAction(" count <= 0; "),
160                                      new AssignAction(debug_in, temp_in),
161                                      debug_in
162                       });
163         top.new Event(new Object[] { out, debug_out },
164                       new Object[] { new SimpleAction(out.getVerilogName()+" <= ("+debug_out.getVerilogName()+">> (count_out*8));"),
165                                      new SimpleAction("if (count_out >= 5) begin "+
166                                                           "count_out <= 0; "+debug_out.getVerilogName()+"_a <= 1; end"+
167                                                           " else count_out <= count_out+1; "),
168                                      out });
169
170     }
171
172     public FabricElement mkNode(FabricElement[] ports, boolean is_horn) { return mkNode(ports, is_horn, 0, ports.length); }
173     public FabricElement mkNode(FabricElement[] ports, boolean is_horn, int start, int end) {
174         switch(end-start) {
175             case 0: return null;
176             case 1: return ports[start];
177             default: {
178                 FabricElement leftPort  = mkNode(ports, is_horn,  start,         (end+start)/2);
179                 FabricElement rightPort = mkNode(ports, is_horn,  (end+start)/2, end);
180                 return is_horn
181                     ? new HornModule.HornInstance(this, top,     leftPort, rightPort)
182                     : new FunnelModule.FunnelInstance(this, top, leftPort, rightPort);
183             }
184         }
185     }
186
187     public Module getVerilogModule() { return top; }
188
189
190     // Expand //////////////////////////////////////////////////////////////////////////////
191
192     public void expand(ShipDescription sd) {
193         try {
194             if (sd.getSection("fpga")==null) return;
195             String filename = sd.getName().toLowerCase();
196             File outf = new File("build/fpga/"+filename+".v");
197             new File(outf.getParent()).mkdirs();
198             System.err.println("writing to " + outf);
199             FileOutputStream out = new FileOutputStream(outf);
200             PrintWriter pw = new PrintWriter(out);
201
202             boolean debug = "debug".equals(filename);
203
204             pw.println("`define DATAWIDTH                "+WIDTH_WORD);
205             pw.println("`define CODEBAG_SIZE_BITS        "+CBD_SIZE.valmaskwidth);
206             pw.println();
207
208             for(DockDescription dd : sd) {
209                 String name = dd.getName();
210                 pw.println("`define "+name+"_full    ("+name+"_r && !"+name+"_a)");
211                 pw.println("`define "+name+"_empty  (!"+name+"_r && !"+name+"_a)");
212                 if (dd.isInputDock()) {
213                     pw.println("`define drain_"+name+"  "+name+"_a <= 1");
214                 } else {
215                     pw.println("`define fill_"+name+"  "+name+"_r <= 1");
216                 }
217             }
218
219             pw.print("`define reset ");
220             for(DockDescription bb : sd) {
221                 String bb_name = bb.getName();
222                 if (bb.isInputDock()) pw.print(bb_name+"_a <= 1; "+bb_name+"_f <= 0; ");
223                 else                  pw.print(bb_name+"_r <= 0; ");
224             }
225             pw.println();
226
227             pw.print("`define flush ");
228             for(DockDescription bb : sd)
229                 if (bb.isInputDock())
230                     pw.print(" if (!"+bb.getName()+"_r_) "+bb.getName()+"_f <= 0; ");
231             pw.print("if (1");
232             for(DockDescription bb : sd)
233                 if (bb.isInputDock())
234                     pw.print(" && "+bb.getName()+"_r_ && !"+bb.getName()+"_a");
235             pw.print(") begin ");
236             if (true) {
237                 pw.print("if (1");
238                 for(DockDescription bb : sd)
239                     if (bb.isInputDock())
240                         pw.print(" && "+bb.getName()+"_d["+WIDTH_WORD+"] ");
241                 pw.print(") begin ");
242                 if (true) {
243                     for(DockDescription bb : sd)
244                         if (bb.isInputDock())
245                             pw.print(bb.getName()+"_f <= 1; ");
246                 }
247                 pw.print(" end else if (0");
248                 for(DockDescription bb : sd)
249                     if (bb.isInputDock())
250                         pw.print(" || "+bb.getName()+"_d["+WIDTH_WORD+"] ");
251                 pw.print(") begin ");
252                 if (true) {
253                     for(DockDescription bb : sd)
254                         if (bb.isInputDock())
255                             pw.print(" if (!"+bb.getName()+"_d["+WIDTH_WORD+"]) "+bb.getName()+"_f <= 1; ");
256                 }
257                 pw.print(" end ");
258             }
259             pw.print(" end ");
260             pw.println();
261             
262             pw.println("module " + filename + "( clk, rst ");
263             for(DockDescription bb : sd) {
264                 String bb_name = bb.getName();
265                 pw.print("        ");
266                 if (bb.isInputDock()) {
267                     pw.print(", " + bb_name+"_r_");
268                     pw.print(", " + bb_name+"_a_");
269                     pw.print(", " + bb_name+"_d");
270                 } else {
271                     pw.print(", " + bb_name+"_r_");
272                     pw.print(", " + bb_name+"_a");
273                     pw.print(", " + bb_name+"_d_");
274                 }
275                 pw.println();
276             }
277             if (filename.equals("debug")) {
278                 pw.println("    , out_r_");
279                 pw.println("    , out_a");
280                 pw.println("    , out_d_");
281             }
282             if (filename.equals("dram")) {
283                 pw.println("    , dram_addr_");
284                 pw.println("    , dram_addr_r_");
285                 pw.println("    , dram_addr_a");
286                 pw.println("    , dram_isread_");
287                 pw.println("    , dram_write_data_");
288                 pw.println("    , dram_write_data_push_");
289                 pw.println("    , dram_write_data_full");
290                 pw.println("    , dram_read_data");
291                 pw.println("    , dram_read_data_pop_");
292                 pw.println("    , dram_read_data_empty");
293                 pw.println("    , dram_read_data_latency");
294             }
295             if (filename.equals("ddr2")) {
296                 pw.println("    , ddr2_addr_");
297                 pw.println("    , ddr2_addr_r_");
298                 pw.println("    , ddr2_addr_a");
299                 pw.println("    , ddr2_isread_");
300                 pw.println("    , ddr2_write_data_");
301                 pw.println("    , ddr2_write_data_push_");
302                 pw.println("    , ddr2_write_data_full");
303                 pw.println("    , ddr2_read_data");
304                 pw.println("    , ddr2_read_data_pop_");
305                 pw.println("    , ddr2_read_data_empty");
306                 pw.println("    , ddr2_read_data_latency");
307             }
308             if (filename.equals("video")) {
309                 pw.println("    , vga_clk");
310                 pw.println("    , vga_psave");
311                 pw.println("    , vga_hsync");
312                 pw.println("    , vga_vsync");
313                 pw.println("    , vga_sync");
314                 pw.println("    , vga_blank");
315                 pw.println("    , vga_r");
316                 pw.println("    , vga_g");
317                 pw.println("    , vga_b");
318                 pw.println("    , vga_clkout");
319             }
320             pw.println("        );");
321             pw.println();
322             pw.println("    input clk;");
323             pw.println("    input rst;");
324             if (filename.equals("debug")) {
325                 pw.println("        output  ["+WIDTH_WORD+":0] out_d_;");
326                 pw.println("        input   out_a;");
327                 pw.println("        output  out_r_;");
328             }
329             if (filename.equals("dram")) {
330                 pw.println("output  [31:0] dram_addr_;");
331                 pw.println("output         dram_addr_r_;");
332                 pw.println("input          dram_addr_a;");
333                 pw.println("output         dram_isread_;");
334                 pw.println("output  [63:0] dram_write_data_;");
335                 pw.println("output         dram_write_data_push_;");
336                 pw.println("input          dram_write_data_full;");
337                 pw.println("input   [63:0] dram_read_data;");
338                 pw.println("output         dram_read_data_pop_;");
339                 pw.println("input          dram_read_data_empty;");
340                 pw.println("input   [1:0]  dram_read_data_latency;");
341             }
342             if (filename.equals("ddr2")) {
343                 pw.println("output  [31:0] ddr2_addr_;");
344                 pw.println("output         ddr2_addr_r_;");
345                 pw.println("input          ddr2_addr_a;");
346                 pw.println("output         ddr2_isread_;");
347                 pw.println("output  [63:0] ddr2_write_data_;");
348                 pw.println("output         ddr2_write_data_push_;");
349                 pw.println("input          ddr2_write_data_full;");
350                 pw.println("input   [63:0] ddr2_read_data;");
351                 pw.println("output         ddr2_read_data_pop_;");
352                 pw.println("input          ddr2_read_data_empty;");
353                 pw.println("input   [1:0]  ddr2_read_data_latency;");
354             }
355             if (filename.equals("video")) {
356                 pw.println("input          vga_clk;");
357                 pw.println("output         vga_psave;");
358                 pw.println("output         vga_hsync;");
359                 pw.println("output         vga_vsync;");
360                 pw.println("output         vga_sync;");
361                 pw.println("output         vga_blank;");
362                 pw.println("output   [7:0] vga_r;");
363                 pw.println("output   [7:0] vga_g;");
364                 pw.println("output   [7:0] vga_b;");
365                 pw.println("output         vga_clkout;");
366             }
367
368             for(DockDescription bb : sd) {
369                 String bb_name = bb.getName();
370                 if (bb.isInputDock()) {
371                     pw.println("        input   ["+WIDTH_WORD+":0] "+bb_name+"_d;");
372                     pw.println("        input   "+bb_name+"_r_;");
373                     pw.println("        wire    "+bb_name+"_r;");
374                     pw.println("        assign  "+bb_name+"_r = "+bb_name+"_r_ & ~"+bb_name+"_d["+WIDTH_WORD+"];");
375                     pw.println("        output  "+bb_name+"_a_;");
376                     pw.println("        reg     "+bb_name+"_a;");
377                     pw.println("        initial "+bb_name+"_a  = 0;");
378                     pw.println("        reg     "+bb_name+"_f;");
379                     pw.println("        initial "+bb_name+"_f  = 0;");
380                     pw.println("        assign  "+bb_name+"_a_ = "+bb_name+"_a || "+bb_name+"_f;");
381                 } else {
382                     pw.println("        output  ["+WIDTH_WORD+":0] "+bb_name+"_d_;");
383                     pw.println("        input   "+bb_name+"_a;");
384                     pw.println("        output  "+bb_name+"_r_;");
385                     pw.println("        reg     "+bb_name+"_r;");
386                     pw.println("        initial "+bb_name+"_r  = 0;");
387                     pw.println("        assign  "+bb_name+"_r_ = "+bb_name+"_r;");
388                 }
389                 pw.println();
390             }
391
392             pw.println(sd.getSection("fpga"));
393
394             pw.println("endmodule");
395
396             pw.flush();
397             pw.close();
398         } catch (Exception e) { throw new RuntimeException(e); }
399     }
400
401     public long getDestAddr(Path path) {
402         return ((FpgaPath)path).toLong();
403     }
404     public Dock getBoxByInstAddr(long dest) {
405         for(Ship ship : Fpga.this)
406             for(Dock bb : ship)
407                 if (((FpgaDestination)((FpgaDock)bb).getInstructionDestination()).getAddr() == dest)
408                     return bb;
409         return null;
410     }
411
412 }