src/edu/berkeley/fleet/fpga/Fpga.java

   1 package edu.berkeley.fleet.fpga;
   2 import edu.berkeley.fleet.fpga.*;
   3 import edu.berkeley.fleet.api.*;
   4 import edu.berkeley.fleet.two.*;
   5 import edu.berkeley.fleet.*;
   6 import java.lang.reflect.*;
   7 import edu.berkeley.sbp.chr.*;
   8 import edu.berkeley.sbp.misc.*;
   9 import edu.berkeley.sbp.meta.*;
  10 import edu.berkeley.sbp.util.*;
  11 import java.util.*;
  12 import java.io.*;
  13 import edu.berkeley.fleet.two.*;
  14 import static edu.berkeley.fleet.two.FleetTwoFleet.*;
  15 import static edu.berkeley.fleet.fpga.verilog.Verilog.*;
  16
  17
  18 /*
  19 => get rid of getInputPort(String) and instead use members
  20 => clean up fabricelement methods
  21 => get rid of addcrap
  22 => automatic width-setting on ports
  23 => nuke DATAWIDTH?
  24   => serdes and fastclock/slowclock?
  25 */
  26
  27 public class Fpga extends FleetTwoFleet {
  28
  29     public  Module top;
  30     public  FabricElement top_horn;
  31     Ship debugShip;
  32
  33     public LinkedHashMap<String,FpgaShip> ships = new LinkedHashMap<String,FpgaShip>();
  34     public Iterator<Ship> iterator() { return (Iterator<Ship>)(Object)ships.values().iterator(); }
  35
  36     public Ship getShip(String type, int ordinal) {
  37         for(Ship s : this)
  38             if (s.getType().equals(type))
  39                 if (--ordinal < 0)
  40                     return s;
  41         return null;
  42     }
  43
  44     public static void main(String[] s) throws Exception {
  45         new Fpga(new Module("root")).top.dump(s[0]);
  46     }
  47
  48     public FleetProcess run(Instruction[] instructions) {
  49         try {
  50             return new Client(this, "none", instructions);
  51         } catch (Exception e) { throw new RuntimeException(e); }
  52     }
  53
  54     // Setup //////////////////////////////////////////////////////////////////////////////
  55
  56     public Ship createShip(String type, String name) throws IOException {
  57         ShipDescription sd = new ShipDescription(type, new BufferedReader(new InputStreamReader(new FileInputStream("ships/"+type+".ship"))));
  58         FpgaShip ship = new FpgaShip(this, sd);
  59         ships.put(name, ship);
  60         return ship;
  61     }
  62
  63     public Fpga() throws Exception { this(new Module("root")); }
  64     public Fpga(Module top) throws Exception {
  65         this.top = top;
  66         debugShip = createShip("Debug",     "debug");
  67
  68         createShip("Memory",      "memory1");
  69         //createShip("Memory",    "memory2");
  70         //createShip("Memory",    "memory3");
  71
  72         for(int i=0; i<5; i++)
  73             createShip("Alu",       "alu"+i);
  74
  75         for(int i=0; i<2; i++)
  76             createShip("Fifo",      "fifo"+i);
  77
  78         for(int i=0; i<13; i++)
  79             createShip("Counter",  "counter"+i);
  80
  81         createShip("CarrySaveAdder",  "csa1");
  82         createShip("Rotator",         "rotator");
  83         createShip("Lut3",            "lut");
  84
  85         createShip("DRAM",    "dram");
  86         //createShip("DDR2",    "ddr2");
  87         createShip("Video",   "video");
  88
  89         //Module.SourcePort  debug_in    = top.createWireSourcePort("debug_in", WIDTH_PACKET);
  90         Module.SourcePort  debug_out   = null;
  91         for(FpgaShip ship : (Iterable<FpgaShip>)(Object)this) {
  92             if (ship.getType().toLowerCase().equals("debug"))
  93                 debug_out = ship.getVerilogModule().getOutputPort("debug_out");
  94         }
  95
  96         // for FifoShip
  97         new Module.InstantiatedModule(top, new FifoModule(8, WIDTH_WORD));
  98
  99         Module.SourcePort  in          = top.createInputPort("in", 8);
 100         Module.SinkPort    out         = top.createOutputPort("out", 8, "");
 101         Module.Latch       temp_in     = top.new Latch("temp", WIDTH_PACKET);
 102         Module.Latch       count       = top.new Latch("count", 8);
 103         Module.Latch       count_out   = top.new Latch("count_out", 8);
 104
 105         ArrayList inbox_sources = new ArrayList<FabricElement>();
 106         ArrayList inbox_dests   = new ArrayList<FabricElement>();
 107         ArrayList outbox_sources = new ArrayList<FabricElement>();
 108         ArrayList outbox_dests   = new ArrayList<FabricElement>();
 109         ArrayList instruction_dests   = new ArrayList<FabricElement>();
 110         int numdocks = 0;
 111         for(FpgaShip ship : (Iterable<FpgaShip>)(Object)this) {
 112             if (ship.getType().toLowerCase().equals("debug"))
 113                 debug_out = ship.getVerilogModule().getOutputPort("debug_out");
 114             for(Dock port : ship) {
 115                 if (port.isInputDock()) {
 116                     inbox_sources.add(((FpgaDock)port));
 117                     instruction_dests.add(port.getInstructionDestination());
 118                     inbox_dests.add(port.getDataDestination());
 119                 } else {
 120                     outbox_sources.add(((FpgaDock)port));
 121                     instruction_dests.add(port.getInstructionDestination());
 122                     outbox_dests.add(port.getDataDestination());
 123                 }
 124                 numdocks++;
 125             }
 126         }
 127         //System.err.println("dock count = " + numdocks);
 128         ArrayList dests   = new ArrayList<FabricElement>();
 129         ArrayList sources = new ArrayList<FabricElement>();
 130         sources.addAll(inbox_sources);
 131         sources.addAll(outbox_sources);
 132         dests.addAll(inbox_dests);
 133         dests.addAll(instruction_dests);
 134         dests.addAll(outbox_dests);
 135         top_horn = mkNode((FabricElement[])dests.toArray(new FabricElement[0]), true);
 136         FabricElement   source  = mkNode((FabricElement[])sources.toArray(new FabricElement[0]), false);
 137         FunnelModule.FunnelInstance top_funnel = new FunnelModule.FunnelInstance(top, null, source.getOutputPort());
 138         ((FunnelModule.FunnelInstance)source).out = top_funnel;
 139         //top_horn.addInput(top_funnel, top_funnel.getOutputPort());
 140         top_funnel.addOutput(top_horn, top_horn.getInputPort());
 141
 142         //Module.SourcePort  debug_in    = top.createWireSourcePort("debug_in", WIDTH_PACKET);
 143         Module.SinkPort debug_in = top_funnel.getInputPort("in1");
 144
 145         top.new Event(new Object[] { in, "count<=7" },
 146                       new Object[] { new SimpleAction(temp_in.getVerilogName()+" <= {" + temp_in.getVerilogName() + "["+(WIDTH_PACKET-(1+8))+":0], in[7:0] };"),
 147                                      new SimpleAction("count <= count+1;"),
 148                                      in
 149                       });
 150         top.new Event(new Object[] { debug_in, "count>7" },
 151                       new Object[] { new SimpleAction(" count <= 0; "),
 152                                      new AssignAction(debug_in, temp_in),
 153                                      debug_in
 154                       });
 155         top.new Event(new Object[] { out, debug_out },
 156                       new Object[] { new SimpleAction(out.getVerilogName()+" <= ("+debug_out.getVerilogName()+">> (count_out*8));"),
 157                                      new SimpleAction("if (count_out >= 5) begin "+
 158                                                           "count_out <= 0; "+debug_out.getVerilogName()+"_a <= 1; end"+
 159                                                           " else count_out <= count_out+1; "),
 160                                      out });
 161
 162     }
 163
 164     public FabricElement mkNode(FabricElement[] ports, boolean is_horn) { return mkNode(ports, is_horn, 0, ports.length); }
 165     public FabricElement mkNode(FabricElement[] ports, boolean is_horn, int start, int end) {
 166         switch(end-start) {
 167             case 0: return null;
 168             case 1: return ports[start];
 169             default: {
 170                 FabricElement leftPort  = mkNode(ports, is_horn,  start,         (end+start)/2);
 171                 FabricElement rightPort = mkNode(ports, is_horn,  (end+start)/2, end);
 172                 return is_horn
 173                     ? new HornModule.HornInstance(top,     leftPort, rightPort)
 174                     : new FunnelModule.FunnelInstance(top, leftPort, rightPort);
 175             }
 176         }
 177     }
 178
 179     public Module getVerilogModule() { return top; }
 180
 181
 182     // Expand //////////////////////////////////////////////////////////////////////////////
 183
 184     public void expand(ShipDescription sd) {
 185         try {
 186             if (sd.getSection("fpga")==null) return;
 187             String filename = sd.getName().toLowerCase();
 188             File outf = new File("build/fpga/"+filename+".v");
 189             new File(outf.getParent()).mkdirs();
 190             System.err.println("writing to " + outf);
 191             FileOutputStream out = new FileOutputStream(outf);
 192             PrintWriter pw = new PrintWriter(out);
 193
 194             boolean debug = "debug".equals(filename);
 195
 196             pw.println("`include \"bitfields.v\"");
 197             pw.println();
 198
 199             pw.print("`define reset ");
 200             for(DockDescription bb : sd) {
 201                 String bb_name = bb.getName();
 202                 if (bb.isInputDock()) pw.print(bb_name+"_a <= 1; "+bb_name+"_f <= 0; ");
 203                 else                  pw.print(bb_name+"_r <= 0; ");
 204             }
 205             pw.println();
 206
 207             pw.print("`define flush ");
 208             for(DockDescription bb : sd)
 209                 if (bb.isInputDock())
 210                     pw.print(" if (!"+bb.getName()+"_r_) "+bb.getName()+"_f <= 0; ");
 211             pw.print("if (1");
 212             for(DockDescription bb : sd)
 213                 if (bb.isInputDock())
 214                     pw.print(" && "+bb.getName()+"_r_ && !"+bb.getName()+"_a");
 215             pw.print(") begin ");
 216             if (true) {
 217                 pw.print("if (1");
 218                 for(DockDescription bb : sd)
 219                     if (bb.isInputDock())
 220                         pw.print(" && "+bb.getName()+"_d["+WIDTH_WORD+"] ");
 221                 pw.print(") begin ");
 222                 if (true) {
 223                     for(DockDescription bb : sd)
 224                         if (bb.isInputDock())
 225                             pw.print(bb.getName()+"_f <= 1; ");
 226                 }
 227                 pw.print(" end else if (0");
 228                 for(DockDescription bb : sd)
 229                     if (bb.isInputDock())
 230                         pw.print(" || "+bb.getName()+"_d["+WIDTH_WORD+"] ");
 231                 pw.print(") begin ");
 232                 if (true) {
 233                     for(DockDescription bb : sd)
 234                         if (bb.isInputDock())
 235                             pw.print(" if (!"+bb.getName()+"_d["+WIDTH_WORD+"]) "+bb.getName()+"_f <= 1; ");
 236                 }
 237                 pw.print(" end ");
 238             }
 239             pw.print(" end ");
 240             pw.println();
 241
 242             pw.println("module " + filename + "( clk, rst ");
 243             for(DockDescription bb : sd) {
 244                 String bb_name = bb.getName();
 245                 pw.print("        ");
 246                 if (bb.isInputDock()) {
 247                     pw.print(", " + bb_name+"_r_");
 248                     pw.print(", " + bb_name+"_a_");
 249                     pw.print(", " + bb_name+"_d");
 250                 } else {
 251                     pw.print(", " + bb_name+"_r_");
 252                     pw.print(", " + bb_name+"_a");
 253                     pw.print(", " + bb_name+"_d_");
 254                 }
 255                 pw.println();
 256             }
 257             if (filename.equals("debug")) {
 258                 pw.println("    , out_r_");
 259                 pw.println("    , out_a");
 260                 pw.println("    , out_d_");
 261             }
 262             if (filename.equals("dram")) {
 263                 pw.println("    , dram_addr_");
 264                 pw.println("    , dram_addr_r_");
 265                 pw.println("    , dram_addr_a");
 266                 pw.println("    , dram_isread_");
 267                 pw.println("    , dram_write_data_");
 268                 pw.println("    , dram_write_data_push_");
 269                 pw.println("    , dram_write_data_full");
 270                 pw.println("    , dram_read_data");
 271                 pw.println("    , dram_read_data_pop_");
 272                 pw.println("    , dram_read_data_empty");
 273                 pw.println("    , dram_read_data_latency");
 274             }
 275             if (filename.equals("ddr2")) {
 276                 pw.println("    , ddr2_addr_");
 277                 pw.println("    , ddr2_addr_r_");
 278                 pw.println("    , ddr2_addr_a");
 279                 pw.println("    , ddr2_isread_");
 280                 pw.println("    , ddr2_write_data_");
 281                 pw.println("    , ddr2_write_data_push_");
 282                 pw.println("    , ddr2_write_data_full");
 283                 pw.println("    , ddr2_read_data");
 284                 pw.println("    , ddr2_read_data_pop_");
 285                 pw.println("    , ddr2_read_data_empty");
 286                 pw.println("    , ddr2_read_data_latency");
 287             }
 288             if (filename.equals("video")) {
 289                 pw.println("    , vga_clk");
 290                 pw.println("    , vga_psave");
 291                 pw.println("    , vga_hsync");
 292                 pw.println("    , vga_vsync");
 293                 pw.println("    , vga_sync");
 294                 pw.println("    , vga_blank");
 295                 pw.println("    , vga_r");
 296                 pw.println("    , vga_g");
 297                 pw.println("    , vga_b");
 298                 pw.println("    , vga_clkout");
 299             }
 300             pw.println("        );");
 301             pw.println();
 302             pw.println("    input clk;");
 303             pw.println("    input rst;");
 304             if (filename.equals("debug")) {
 305                 pw.println("        output  ["+WIDTH_WORD+":0] out_d_;");
 306                 pw.println("        input   out_a;");
 307                 pw.println("        output  out_r_;");
 308             }
 309             if (filename.equals("dram")) {
 310                 pw.println("output  [31:0] dram_addr_;");
 311                 pw.println("output         dram_addr_r_;");
 312                 pw.println("input          dram_addr_a;");
 313                 pw.println("output         dram_isread_;");
 314                 pw.println("output  [63:0] dram_write_data_;");
 315                 pw.println("output         dram_write_data_push_;");
 316                 pw.println("input          dram_write_data_full;");
 317                 pw.println("input   [63:0] dram_read_data;");
 318                 pw.println("output         dram_read_data_pop_;");
 319                 pw.println("input          dram_read_data_empty;");
 320                 pw.println("input   [1:0]  dram_read_data_latency;");
 321             }
 322             if (filename.equals("ddr2")) {
 323                 pw.println("output  [31:0] ddr2_addr_;");
 324                 pw.println("output         ddr2_addr_r_;");
 325                 pw.println("input          ddr2_addr_a;");
 326                 pw.println("output         ddr2_isread_;");
 327                 pw.println("output  [63:0] ddr2_write_data_;");
 328                 pw.println("output         ddr2_write_data_push_;");
 329                 pw.println("input          ddr2_write_data_full;");
 330                 pw.println("input   [63:0] ddr2_read_data;");
 331                 pw.println("output         ddr2_read_data_pop_;");
 332                 pw.println("input          ddr2_read_data_empty;");
 333                 pw.println("input   [1:0]  ddr2_read_data_latency;");
 334             }
 335             if (filename.equals("video")) {
 336                 pw.println("input          vga_clk;");
 337                 pw.println("output         vga_psave;");
 338                 pw.println("output         vga_hsync;");
 339                 pw.println("output         vga_vsync;");
 340                 pw.println("output         vga_sync;");
 341                 pw.println("output         vga_blank;");
 342                 pw.println("output   [7:0] vga_r;");
 343                 pw.println("output   [7:0] vga_g;");
 344                 pw.println("output   [7:0] vga_b;");
 345                 pw.println("output         vga_clkout;");
 346             }
 347
 348             for(DockDescription bb : sd) {
 349                 String bb_name = bb.getName();
 350                 if (bb.isInputDock()) {
 351                     pw.println("        input   ["+WIDTH_WORD+":0] "+bb_name+"_d;");
 352                     pw.println("        input   "+bb_name+"_r_;");
 353                     pw.println("        wire    "+bb_name+"_r;");
 354                     pw.println("        assign  "+bb_name+"_r = "+bb_name+"_r_ & ~"+bb_name+"_d["+WIDTH_WORD+"];");
 355                     pw.println("        output  "+bb_name+"_a_;");
 356                     pw.println("        reg     "+bb_name+"_a;");
 357                     pw.println("        initial "+bb_name+"_a  = 0;");
 358                     pw.println("        reg     "+bb_name+"_f;");
 359                     pw.println("        initial "+bb_name+"_f  = 0;");
 360                     pw.println("        assign  "+bb_name+"_a_ = "+bb_name+"_a || "+bb_name+"_f;");
 361                 } else {
 362                     pw.println("        output  ["+WIDTH_WORD+":0] "+bb_name+"_d_;");
 363                     pw.println("        input   "+bb_name+"_a;");
 364                     pw.println("        output  "+bb_name+"_r_;");
 365                     pw.println("        reg     "+bb_name+"_r;");
 366                     pw.println("        initial "+bb_name+"_r  = 0;");
 367                     pw.println("        assign  "+bb_name+"_r_ = "+bb_name+"_r;");
 368                 }
 369                 pw.println();
 370             }
 371
 372             pw.println(sd.getSection("fpga"));
 373
 374             pw.println("endmodule");
 375
 376             pw.flush();
 377             pw.close();
 378         } catch (Exception e) { throw new RuntimeException(e); }
 379     }
 380
 381     public long getDestAddr(Path path) {
 382         return ((FpgaPath)path).toLong();
 383     }
 384     public Dock getBoxByInstAddr(long dest) {
 385         for(Ship ship : Fpga.this)
 386             for(Dock bb : ship)
 387                 if (((FpgaDestination)((FpgaDock)bb).getInstructionDestination()).getAddr() == dest)
 388                     return bb;
 389         return null;
 390     }
 391
 392 }