src/edu/berkeley/fleet/fpga/Fpga.java

   1 package edu.berkeley.fleet.fpga;
   2 import edu.berkeley.fleet.fpga.*;
   3 import edu.berkeley.fleet.api.*;
   4 import edu.berkeley.fleet.two.*;
   5 import edu.berkeley.fleet.*;
   6 import java.lang.reflect.*;
   7 import edu.berkeley.sbp.chr.*;
   8 import edu.berkeley.sbp.misc.*;
   9 import edu.berkeley.sbp.meta.*;
  10 import edu.berkeley.sbp.util.*;
  11 import java.util.*;
  12 import java.io.*;
  13 import edu.berkeley.fleet.two.*;
  14 import static edu.berkeley.fleet.two.FleetTwoFleet.*;
  15 import static edu.berkeley.fleet.fpga.verilog.Verilog.*;
  16
  17
  18 public class Fpga extends FleetTwoFleet {
  19
  20     public  Module top;
  21     public  FabricElement top_horn;
  22     Ship debugShip;
  23
  24     public LinkedHashMap<String,FpgaShip> ships = new LinkedHashMap<String,FpgaShip>();
  25     public Iterator<Ship> iterator() { return (Iterator<Ship>)(Object)ships.values().iterator(); }
  26
  27     public Ship getShip(String type, int ordinal) {
  28         for(Ship s : this)
  29             if (s.getType().equals(type))
  30                 if (--ordinal < 0)
  31                     return s;
  32         return null;
  33     }
  34
  35     public static void main(String[] s) throws Exception {
  36         new Fpga(new Module("root")).top.dump(s[0]);
  37         PrintWriter pw;
  38
  39         pw = new PrintWriter(new OutputStreamWriter(new FileOutputStream(s[0]+"/timescale.v")));
  40         pw.println("`timescale 1ns / 10ps");
  41         pw.close();
  42
  43         pw = new PrintWriter(new OutputStreamWriter(new FileOutputStream(s[0]+"/bram14.v")));
  44         pw.println("`define BRAM_ADDR_WIDTH 14");
  45         pw.println("`define BRAM_DATA_WIDTH `WORDWIDTH");
  46         pw.println("`define BRAM_SIZE (1<<(`BRAM_ADDR_WIDTH))");
  47         pw.println("`define BRAM_NAME bram14");
  48         pw.println("`include \"bram.inc\"");
  49         pw.close();
  50
  51         pw = new PrintWriter(new OutputStreamWriter(new FileOutputStream(s[0]+"/vram.v")));
  52         pw.println("`define BRAM_ADDR_WIDTH 19");
  53         pw.println("`define BRAM_DATA_WIDTH 3");
  54         pw.println("`define BRAM_SIZE (640*480)");
  55         pw.println("`define BRAM_NAME vram");
  56         pw.println("`include \"bram.inc\"");
  57         pw.close();
  58     }
  59
  60     public Module getVerilogModule() { return top; }
  61
  62     public FleetProcess run(Instruction[] instructions) {
  63         try {
  64             return new Client(this, "none", instructions);
  65         } catch (Exception e) { throw new RuntimeException(e); }
  66     }
  67
  68     public BitVector getDestAddr(Path path) {
  69         return ((FpgaPath)path).toBitVector();
  70     }
  71
  72     // Setup //////////////////////////////////////////////////////////////////////////////
  73
  74     public Ship createShip(String type, String name) throws IOException {
  75         ShipDescription sd = new ShipDescription(type, new BufferedReader(new InputStreamReader(new FileInputStream("ships/"+type+".ship"))));
  76         FpgaShip ship = new FpgaShip(this, sd);
  77         ships.put(name, ship);
  78         return ship;
  79     }
  80
  81     public Fpga() throws Exception { this(new Module("root")); }
  82     public Fpga(Module top) throws Exception {
  83         this.top = top;
  84         debugShip = createShip("Debug",     "debug");
  85
  86         //boolean small = false;
  87         boolean small = true;
  88
  89         createShip("Memory",      "memory1");
  90
  91         if (small) {
  92             for(int i=0; i<2; i++)
  93                 createShip("Fifo",           "fifo"+i);
  94             for(int i=0; i<2; i++)
  95                 createShip("Alu",            "alu"+i);
  96             createShip("Counter",        "counter");
  97             createShip("CarrySaveAdder", "csa1");
  98             createShip("Rotator",        "rotator");
  99             createShip("Lut3",           "lut");
 100         } else {
 101             createShip("Memory",    "memory2");
 102             createShip("Memory",    "memory3");
 103
 104             for(int i=0; i<3; i++)
 105                 createShip("Alu",       "alu"+i);
 106
 107             for(int i=0; i<1; i++)
 108                 createShip("Fifo",      "fifo"+i);
 109
 110             for(int i=0; i<14; i++)
 111                 createShip("Counter",  "counter"+i);
 112
 113             /*
 114             createShip("CarrySaveAdder",  "csa1");
 115             createShip("Rotator",         "rotator");
 116             createShip("Lut3",            "lut");
 117             */
 118             //createShip("DDR2",    "ddr2");
 119         }
 120         createShip("DRAM",    "dram");
 121         createShip("Video",   "video");
 122
 123         //Module.SourcePort  debug_in    = top.createWireSourcePort("debug_in", WIDTH_PACKET);
 124         Module.SourcePort  debug_out   = null;
 125         for(FpgaShip ship : (Iterable<FpgaShip>)(Object)this) {
 126             if (ship.getType().toLowerCase().equals("debug"))
 127                 debug_out = ship.getVerilogModule().getOutputPort("debug_out");
 128         }
 129
 130         // for FifoShip
 131         new Module.InstantiatedModule(top, new FifoModule(8, WIDTH_WORD));
 132
 133         Module.SourcePort  in          = top.createInputPort("in", 8);
 134         Module.SinkPort    out         = top.createOutputPort("out", 8, "");
 135         Module.Latch       temp_in     = top.new Latch("temp", WIDTH_PACKET);
 136         Module.Latch       count       = top.new Latch("count", 8);
 137         Module.Latch       count_out   = top.new Latch("count_out", 8);
 138
 139         ArrayList inbox_sources = new ArrayList<FabricElement>();
 140         ArrayList inbox_dests   = new ArrayList<FabricElement>();
 141         ArrayList outbox_sources = new ArrayList<FabricElement>();
 142         ArrayList outbox_dests   = new ArrayList<FabricElement>();
 143         ArrayList instruction_dests   = new ArrayList<FabricElement>();
 144         int numdocks = 0;
 145         for(FpgaShip ship : (Iterable<FpgaShip>)(Object)this) {
 146             if (ship.getType().toLowerCase().equals("debug"))
 147                 debug_out = ship.getVerilogModule().getOutputPort("debug_out");
 148             for(Dock port : ship) {
 149                 if (port.isInputDock()) {
 150                     inbox_sources.add(((FpgaDock)port));
 151                     instruction_dests.add(port.getInstructionDestination());
 152                     inbox_dests.add(port.getDataDestination());
 153                 } else {
 154                     outbox_sources.add(((FpgaDock)port));
 155                     instruction_dests.add(port.getInstructionDestination());
 156                     outbox_dests.add(port.getDataDestination());
 157                 }
 158                 numdocks++;
 159             }
 160         }
 161         ArrayList dests   = new ArrayList<FabricElement>();
 162         ArrayList sources = new ArrayList<FabricElement>();
 163         sources.addAll(inbox_sources);
 164         sources.addAll(outbox_sources);
 165         dests.addAll(inbox_dests);
 166         dests.addAll(instruction_dests);
 167         dests.addAll(outbox_dests);
 168         top_horn = mkNode((FabricElement[])dests.toArray(new FabricElement[0]), true);
 169         FabricElement   source  = mkNode((FabricElement[])sources.toArray(new FabricElement[0]), false);
 170         FunnelModule.FunnelInstance top_funnel = new FunnelModule.FunnelInstance(this, top, null, source.getOutputPort());
 171         ((FunnelModule.FunnelInstance)source).out = top_funnel;
 172         top_funnel.addOutput(top_horn, top_horn.getInputPort());
 173         Module.SinkPort debug_in = top_funnel.getInputPort("in1");
 174
 175         top.new Event(new Object[] { in, "count<=7" },
 176                       new Object[] { new SimpleAction(temp_in.getVerilogName()+" <= {" + temp_in.getVerilogName() + "["+(WIDTH_PACKET-(1+8))+":0], in[7:0] };"),
 177                                      new AssignAction(count, count.getVerilogName()+"+1"),
 178                                      in
 179                       });
 180         top.new Event(new Object[] { debug_in, "count>7" },
 181                       new Object[] { new AssignAction(count, "0"),
 182                                      new AssignAction(debug_in, temp_in),
 183                                      debug_in
 184                       });
 185         top.new Event(new Object[] { out, debug_out },
 186                       new Object[] { new SimpleAction(out.getVerilogName()+" <= ("+debug_out.getVerilogName()+">> (count_out*8));"),
 187                                      new ConditionalAction("count_out >= 5", debug_out),
 188                                      new ConditionalAction("count_out >= 5", new AssignAction(count_out, "0")),
 189                                      new ConditionalAction("count_out <  5", new AssignAction(count_out, "count_out+1")),
 190                                      out });
 191
 192     }
 193
 194     public FabricElement mkNode(FabricElement[] ports, boolean is_horn) { return mkNode(ports, is_horn, 0, ports.length); }
 195     public FabricElement mkNode(FabricElement[] ports, boolean is_horn, int start, int end) {
 196         switch(end-start) {
 197             case 0: return null;
 198             case 1: return ports[start];
 199             default: {
 200                 FabricElement leftPort  = mkNode(ports, is_horn,  start,         (end+start)/2);
 201                 FabricElement rightPort = mkNode(ports, is_horn,  (end+start)/2, end);
 202                 return is_horn
 203                     ? new HornModule.HornInstance(this, top,     leftPort, rightPort)
 204                     : new FunnelModule.FunnelInstance(this, top, leftPort, rightPort);
 205             }
 206         }
 207     }
 208
 209
 210     // Expand //////////////////////////////////////////////////////////////////////////////
 211
 212     public void expand(ShipDescription sd) {
 213         try {
 214             if (sd.getSection("fpga")==null) return;
 215             String filename = sd.getName().toLowerCase();
 216             File outf = new File("build/fpga/"+filename+".v");
 217             new File(outf.getParent()).mkdirs();
 218             System.err.println("writing to " + outf);
 219             FileOutputStream out = new FileOutputStream(outf);
 220             PrintWriter pw = new PrintWriter(out);
 221
 222             boolean debug = "debug".equals(filename);
 223
 224             pw.println("`define WORDWIDTH                "+WIDTH_WORD);
 225             pw.println("`define CODEBAG_SIZE_BITS        "+CBD_SIZE.valmaskwidth);
 226             pw.println();
 227
 228             for(DockDescription dd : sd) {
 229                 String name = dd.getName();
 230                 pw.println("`define "+name+"_full    ("+name+"_r && !"+name+"_a)");
 231                 pw.println("`define "+name+"_empty  (!"+name+"_r && !"+name+"_a)");
 232                 if (dd.isInputDock()) {
 233                     pw.println("`define drain_"+name+"  "+name+"_a <= 1;");
 234                 } else {
 235                     pw.println("`define fill_"+name+"  "+name+"_r <= 1;");
 236                     pw.println("`define "+name+"_draining ("+name+"_r && "+name+"_a)");
 237                 }
 238             }
 239             if (debug) {
 240                 String name = "out";
 241                 pw.println("`define "+name+"_full    ("+name+"_r && !"+name+"_a)");
 242                 pw.println("`define "+name+"_empty  (!"+name+"_r && !"+name+"_a)");
 243                 pw.println("`define fill_"+name+"  "+name+"_r <= 1;");
 244                 pw.println("`define "+name+"_draining ("+name+"_r && "+name+"_a)");
 245             }
 246
 247             pw.print("`define reset ");
 248             for(DockDescription bb : sd) {
 249                 String bb_name = bb.getName();
 250                 if (bb.isInputDock()) pw.print(bb_name+"_a <= 1; "+bb_name+"_f <= 0; ");
 251                 else                  pw.print(bb_name+"_r <= 0; ");
 252             }
 253             if (debug) {
 254                 String bb_name = "out";
 255                 pw.print(bb_name+"_r <= 0; ");
 256             }
 257             pw.println();
 258
 259             pw.print("`define cleanup ");
 260             for(DockDescription bb : sd) {
 261                 String bb_name = bb.getName();
 262                 if (bb.isInputDock()) pw.print("if (!"+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_a <= 0; ");
 263                 else                  pw.print("if ( "+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_r <= 0; ");
 264             }
 265             if (debug) {
 266                 String bb_name = "out";
 267                 pw.print("if ( "+bb_name+"_r && "+bb_name+"_a) "+bb_name+"_r <= 0; ");
 268             }
 269             pw.println();
 270
 271             // FIXME: this corresponds to something
 272             /*
 273             pw.print("`define flush_happening (1");
 274             for(DockDescription bb : sd)
 275                 if (bb.isInputDock())
 276                     pw.print(" && "+bb.getName()+"_r_ && !"+bb.getName()+"_a && "+bb.getName()+"_d["+WIDTH_WORD+"]");
 277             pw.println(")");
 278             */
 279
 280             pw.print("`define flush ");
 281             for(DockDescription bb : sd)
 282                 if (bb.isInputDock())
 283                     pw.print(" if (!"+bb.getName()+"_r_) "+bb.getName()+"_f <= 0; ");
 284             pw.print("if (1");
 285             for(DockDescription bb : sd)
 286                 if (bb.isInputDock())
 287                     pw.print(" && "+bb.getName()+"_r_ && !"+bb.getName()+"_a");
 288             pw.print(") begin ");
 289             if (true) {
 290                 pw.print("if (1");
 291                 for(DockDescription bb : sd)
 292                     if (bb.isInputDock())
 293                         pw.print(" && "+bb.getName()+"_d["+WIDTH_WORD+"] ");
 294                 pw.print(") begin ");
 295                 if (true) {
 296                     for(DockDescription bb : sd)
 297                         if (bb.isInputDock())
 298                             pw.print(bb.getName()+"_f <= 1; ");
 299                 }
 300                 pw.print(" end else if (0");
 301                 for(DockDescription bb : sd)
 302                     if (bb.isInputDock())
 303                         pw.print(" || "+bb.getName()+"_d["+WIDTH_WORD+"] ");
 304                 pw.print(") begin ");
 305                 if (true) {
 306                     for(DockDescription bb : sd)
 307                         if (bb.isInputDock())
 308                             pw.print(" if (!"+bb.getName()+"_d["+WIDTH_WORD+"]) "+bb.getName()+"_f <= 1; ");
 309                 }
 310                 pw.print(" end ");
 311             }
 312             pw.print(" end ");
 313             pw.println();
 314
 315             pw.println("module " + filename + "( clk, rst ");
 316             for(DockDescription bb : sd) {
 317                 String bb_name = bb.getName();
 318                 pw.print("        ");
 319                 if (bb.isInputDock()) {
 320                     pw.print(", " + bb_name+"_r_");
 321                     pw.print(", " + bb_name+"_a_");
 322                     pw.print(", " + bb_name+"_d");
 323                 } else {
 324                     pw.print(", " + bb_name+"_r_");
 325                     pw.print(", " + bb_name+"_a");
 326                     pw.print(", " + bb_name+"_d_");
 327                 }
 328                 pw.println();
 329             }
 330             if (filename.equals("debug")) {
 331                 pw.println("    , out_r_");
 332                 pw.println("    , out_a");
 333                 pw.println("    , out_d_");
 334             }
 335             if (filename.equals("dram")) {
 336                 pw.println("    , dram_addr_");
 337                 pw.println("    , dram_addr_r_");
 338                 pw.println("    , dram_addr_a");
 339                 pw.println("    , dram_isread_");
 340                 pw.println("    , dram_write_data_");
 341                 pw.println("    , dram_write_data_push_");
 342                 pw.println("    , dram_write_data_full");
 343                 pw.println("    , dram_read_data");
 344                 pw.println("    , dram_read_data_pop_");
 345                 pw.println("    , dram_read_data_empty");
 346                 pw.println("    , dram_read_data_latency");
 347             }
 348             if (filename.equals("ddr2")) {
 349                 pw.println("    , ddr2_addr_");
 350                 pw.println("    , ddr2_addr_r_");
 351                 pw.println("    , ddr2_addr_a");
 352                 pw.println("    , ddr2_isread_");
 353                 pw.println("    , ddr2_write_data_");
 354                 pw.println("    , ddr2_write_data_push_");
 355                 pw.println("    , ddr2_write_data_full");
 356                 pw.println("    , ddr2_read_data");
 357                 pw.println("    , ddr2_read_data_pop_");
 358                 pw.println("    , ddr2_read_data_empty");
 359                 pw.println("    , ddr2_read_data_latency");
 360             }
 361             if (filename.equals("video")) {
 362                 pw.println("    , vga_clk");
 363                 pw.println("    , vga_psave");
 364                 pw.println("    , vga_hsync");
 365                 pw.println("    , vga_vsync");
 366                 pw.println("    , vga_sync");
 367                 pw.println("    , vga_blank");
 368                 pw.println("    , vga_r");
 369                 pw.println("    , vga_g");
 370                 pw.println("    , vga_b");
 371                 pw.println("    , vga_clkout");
 372             }
 373             pw.println("        );");
 374             pw.println();
 375             pw.println("    input clk;");
 376             pw.println("    input rst;");
 377             if (filename.equals("dram")) {
 378                 pw.println("output  [31:0] dram_addr_;");
 379                 pw.println("output         dram_addr_r_;");
 380                 pw.println("input          dram_addr_a;");
 381                 pw.println("output         dram_isread_;");
 382                 pw.println("output  [63:0] dram_write_data_;");
 383                 pw.println("output         dram_write_data_push_;");
 384                 pw.println("input          dram_write_data_full;");
 385                 pw.println("input   [63:0] dram_read_data;");
 386                 pw.println("output         dram_read_data_pop_;");
 387                 pw.println("input          dram_read_data_empty;");
 388                 pw.println("input   [1:0]  dram_read_data_latency;");
 389             }
 390             if (filename.equals("ddr2")) {
 391                 pw.println("output  [31:0] ddr2_addr_;");
 392                 pw.println("output         ddr2_addr_r_;");
 393                 pw.println("input          ddr2_addr_a;");
 394                 pw.println("output         ddr2_isread_;");
 395                 pw.println("output  [63:0] ddr2_write_data_;");
 396                 pw.println("output         ddr2_write_data_push_;");
 397                 pw.println("input          ddr2_write_data_full;");
 398                 pw.println("input   [63:0] ddr2_read_data;");
 399                 pw.println("output         ddr2_read_data_pop_;");
 400                 pw.println("input          ddr2_read_data_empty;");
 401                 pw.println("input   [1:0]  ddr2_read_data_latency;");
 402             }
 403             if (filename.equals("video")) {
 404                 pw.println("input          vga_clk;");
 405                 pw.println("output         vga_psave;");
 406                 pw.println("output         vga_hsync;");
 407                 pw.println("output         vga_vsync;");
 408                 pw.println("output         vga_sync;");
 409                 pw.println("output         vga_blank;");
 410                 pw.println("output   [7:0] vga_r;");
 411                 pw.println("output   [7:0] vga_g;");
 412                 pw.println("output   [7:0] vga_b;");
 413                 pw.println("output         vga_clkout;");
 414             }
 415
 416             for(DockDescription bb : sd) {
 417                 String bb_name = bb.getName();
 418                 if (bb.isInputDock()) {
 419                     pw.println("        input   ["+WIDTH_WORD+":0] "+bb_name+"_d;");
 420                     pw.println("        input   "+bb_name+"_r_;");
 421                     pw.println("        wire    "+bb_name+"_r;");
 422                     pw.println("        assign  "+bb_name+"_r = "+bb_name+"_r_ & ~"+bb_name+"_d["+WIDTH_WORD+"];");
 423                     pw.println("        output  "+bb_name+"_a_;");
 424                     pw.println("        reg     "+bb_name+"_a;");
 425                     pw.println("        initial "+bb_name+"_a  = 0;");
 426                     pw.println("        reg     "+bb_name+"_f;");
 427                     pw.println("        initial "+bb_name+"_f  = 0;");
 428                     pw.println("        assign  "+bb_name+"_a_ = "+bb_name+"_a || "+bb_name+"_f;");
 429                 } else {
 430                     pw.println("        output  ["+WIDTH_WORD+":0] "+bb_name+"_d_;");
 431                     pw.println("        input   "+bb_name+"_a;");
 432                     pw.println("        output  "+bb_name+"_r_;");
 433                     pw.println("        reg     "+bb_name+"_r;");
 434                     pw.println("        initial "+bb_name+"_r  = 0;");
 435                     pw.println("        assign  "+bb_name+"_r_ = "+bb_name+"_r;");
 436                 }
 437                 pw.println();
 438             }
 439             if (filename.equals("debug")) {
 440                 String bb_name = "out";
 441                 pw.println("        output  ["+WIDTH_WORD+":0] "+bb_name+"_d_;");
 442                 pw.println("        input   "+bb_name+"_a;");
 443                 pw.println("        output  "+bb_name+"_r_;");
 444                 pw.println("        reg     "+bb_name+"_r;");
 445                 pw.println("        initial "+bb_name+"_r  = 0;");
 446                 pw.println("        assign  "+bb_name+"_r_ = "+bb_name+"_r;");
 447             }
 448
 449             if (filename.equals("fifo")) {
 450                 pw.println("  wire in_a__;");
 451                 pw.println("  wire out_r__;");
 452                 pw.println("  fifo8x37 fifo8x37(clk, rst,");
 453                 pw.println("                    in_r,    in_a__, in_d,");
 454                 pw.println("                    out_r__, out_a,  out_d_);");
 455                 pw.println("  always @(posedge clk) begin");
 456                 pw.println("    if (!rst) begin");
 457                 pw.println("      `reset");
 458                 pw.println("    end else begin");
 459                 pw.println("      `flush");
 460                 pw.println("      out_r <= out_r__;");
 461                 pw.println("      in_a  <= in_a__;");
 462                 pw.println("    end");
 463                 pw.println("  end");
 464             } else {
 465                 pw.println(sd.getSection("fpga"));
 466             }
 467
 468             pw.println("endmodule");
 469
 470             pw.flush();
 471             pw.close();
 472         } catch (Exception e) { throw new RuntimeException(e); }
 473     }
 474
 475 }