src/edu/berkeley/fleet/fpga/FpgaDock.java

   1 package edu.berkeley.fleet.fpga;
   2 import edu.berkeley.fleet.api.*;
   3 import edu.berkeley.fleet.two.*;
   4 import edu.berkeley.fleet.*;
   5 import java.lang.reflect.*;
   6 import edu.berkeley.sbp.chr.*;
   7 import edu.berkeley.sbp.misc.*;
   8 import edu.berkeley.sbp.meta.*;
   9 import edu.berkeley.sbp.util.*;
  10 import java.util.*;
  11 import java.io.*;
  12 import static edu.berkeley.fleet.two.FleetTwoFleet.*;
  13 import static edu.berkeley.fleet.fpga.verilog.Verilog.*;
  14 import edu.berkeley.fleet.api.*;
  15 import edu.berkeley.fleet.api.Dock;
  16 import edu.berkeley.fleet.two.*;
  17 import java.util.*;
  18
  19 public class FpgaDock extends FleetTwoDock implements FabricElement {
  20
  21     private static final int INSTRUCTION_FIFO_SIZE = 12;
  22     private static final int EPILOGUE_FIFO_SIZE    = 0;
  23     private static final int DATA_FIFO_SIZE        = 4;
  24
  25     private FpgaDestination dataDestination;
  26     private FpgaDestination instructionDestination;
  27
  28     private Module.InstantiatedModule instance;
  29
  30     public Module.InstantiatedModule getInstance() { return instance; }
  31
  32     private Fpga fpga;
  33
  34     public Destination getDataDestination() { return dataDestination; }
  35     public Destination getInstructionDestination() { return instructionDestination; }
  36     public int         getInstructionFifoSize() { return INSTRUCTION_FIFO_SIZE; }
  37
  38     FpgaDock(FpgaShip ship, DockDescription bbd) {
  39         super(ship, bbd);
  40         this.fpga = (Fpga)ship.getFleet();
  41         this.instance = new Module.InstantiatedModule(((Fpga)ship.getFleet()).top, new DockModule(isInputDock()));
  42         this.dataDestination = new FpgaDestination(this, this.instance.getInputPort("fabric_in"), false);
  43         this.instructionDestination = new FpgaDestination(this, this.instance.getInputPort("instruction"), true);
  44         Module.InstantiatedModule shipm = ship.getVerilogModule();
  45         if (isInputDock()) {
  46             instance.getOutputPort("ship").connect(shipm.getInputPort(getName()));
  47         } else {
  48             shipm.getOutputPort(getName()).connect(instance.getInputPort("ship"));
  49         }
  50     }
  51
  52
  53     // FabricElement methods //////////////////////////////////////////////////////////////////////////////
  54
  55     private FabricElement upstream;
  56     public Module.SourcePort getOutputPort() { throw new RuntimeException(); }
  57     public Module.Port getInputPort()  { throw new RuntimeException(); }
  58     public Path getPath(Destination dest,BitVector signal) { return getPath((FpgaDestination)dest, signal); }
  59     public FpgaPath getPath(FpgaDestination dest,BitVector signal) { return upstream.getPath(dest, signal); }
  60     public void addInput(FabricElement in, Module.Port inPort) { throw new RuntimeException(); }
  61     public void addOutput(FabricElement out, Module.Port outPort) {
  62         this.upstream = out;
  63         instance.getOutputPort("fabric_out").connect((Module.SinkPort)outPort);
  64     }
  65
  66     public class TorpedoBranchModule extends Module {
  67         public TorpedoBranchModule() {
  68             super("torpedobranch");
  69             Module.SourcePort in      = createInputPort ("in",  fpga.WIDTH_PACKET);
  70             Module.SinkPort   out     = createOutputPort("out", fpga.getWordWidth()-fpga.DISPATCH_PATH.valmaskwidth);
  71             Module.SinkPort   torpedo = createOutputPort("torpedo", 0);
  72             Module.StateWire  busy    = new StateWire("busy", false);
  73
  74             new Event(new Object[] { in, busy.isFull(), out },
  75                       new Action[] { in, busy.doDrain() });
  76             new Event(new Object[] { in, busy.isEmpty(), out, torpedo, in.testMask(fpga.PACKET_IS_TOKEN) },
  77                       new Action[] { in,                      torpedo });
  78             new Event(new Object[] { in, busy.isEmpty(), out,          in.testMask(fpga.PACKET_IS_TOKEN).invert() },
  79                       new Action[] {     busy.doFill(),  out });
  80
  81             out.connectValue(in.getBits(fpga.PACKET_DATA));
  82         }
  83     }
  84
  85     public class RequeueModule extends Module {
  86         public RequeueModule() {
  87             super("requeue");
  88             Module.SourcePort fabric_in     = createInputPort ("fabric_in",  fpga.getWordWidth()-fpga.DISPATCH_PATH.valmaskwidth);
  89             Module.SourcePort ondeck_in     = createInputPort ("ondeck_in",  fpga.getWordWidth()-fpga.DISPATCH_PATH.valmaskwidth);
  90             Module.SourcePort abort         = createInputPort ("abort",     1);
  91             Module.SinkPort   out           = createOutputPort("out",        fpga.getWordWidth()-fpga.DISPATCH_PATH.valmaskwidth);
  92
  93             Module.StateWire  circulating   = new StateWire("circulating", false);
  94             Module.StateWire  doResetFabric = new StateWire("doResetFabric", false);
  95             Module.StateWire  doResetOndeck = new StateWire("doResetOndeck", false);
  96
  97             out.connectValue(new MuxValue(circulating.isEmpty(), fabric_in, ondeck_in));
  98
  99             // always: discard one-shot instructions
 100             new Event(new Object[] { doResetFabric.isFull(),  out },
 101                       new Action[] { doResetFabric.doDrain(), fabric_in });
 102             new Event(new Object[] { doResetOndeck.isFull(),  out },
 103                       new Action[] { doResetOndeck.doDrain(), ondeck_in });
 104
 105             // Updating->Circulating transition
 106             new Event(new Object[] { doResetFabric.isEmpty(),
 107                                      doResetOndeck.isEmpty(),
 108                                      circulating.isEmpty(),
 109                                      fabric_in,
 110                                      fpga.TAIL.verilog(fabric_in.getName()),
 111                                      ondeck_in,
 112                                      fpga.HEAD.verilog(ondeck_in.getName()) },
 113                       new Action[] { circulating.doFill(),
 114                                      fabric_in,
 115                                      ondeck_in });
 116
 117             // Circulating->Updating transition
 118             new Event(new Object[] { doResetFabric.isEmpty(),
 119                                      doResetOndeck.isEmpty(),
 120                                      circulating.isFull(),
 121                                      ondeck_in,
 122                                      abort.getVerilog() },
 123                       new Action[] { circulating.doDrain(),
 124                                      ondeck_in });
 125
 126             // Updating
 127             new Event(new Object[] { doResetFabric.isEmpty(),
 128                                      doResetOndeck.isEmpty(),
 129                                      circulating.isEmpty(),
 130                                      fabric_in,
 131                                      "!"+fpga.TAIL.verilog(fabric_in.getName()) },
 132                       new Action[] { doResetFabric.doFill(),
 133                                      out });
 134             new Event(new Object[] { doResetFabric.isEmpty(),
 135                                      doResetOndeck.isEmpty(),
 136                                      circulating.isEmpty(),
 137                                      ondeck_in,
 138                                      "!"+fpga.HEAD.verilog(ondeck_in.getName()) },
 139                       new Action[] { ondeck_in });
 140
 141             // Circulating
 142             new Event(new Object[] { doResetFabric.isEmpty(),
 143                                      doResetOndeck.isEmpty(),
 144                                      circulating.isFull(),
 145                                      ondeck_in,
 146                                      "!"+abort.getVerilog() },
 147                       new Action[] { doResetOndeck.doFill(),
 148                                      out });
 149         }
 150     }
 151
 152     public class DockModule extends Module {
 153
 154         public DockModule(boolean inbox) {
 155             super(inbox ? "inbox" : "outbox");
 156
 157             int dfifo_width = inbox ? fpga.getWordWidth()+1 : 1;
 158
 159             // FIXME: assumes fpga.DISPATCH_PATH is at top of word!!!
 160             Module ififo_m   = new FifoModule(INSTRUCTION_FIFO_SIZE, fpga.getWordWidth()-fpga.DISPATCH_PATH.valmaskwidth);
 161             Module dfifo_m   = new FifoModule(DATA_FIFO_SIZE,        dfifo_width);
 162
 163             Module.SourcePort instruction   = createInputPort("instruction", fpga.WIDTH_PACKET);
 164             Module.SourcePort fabric_in     = createInputPort("fabric_in",   fpga.WIDTH_PACKET);
 165
 166             // FIXME: at inboxes, no need for a full set of latches
 167             Module.SinkPort   fabric_out    = createOutputPort("fabric_out", fpga.WIDTH_PACKET);
 168
 169             Module.InstantiatedModule dfifo = new Module.InstantiatedModule(this, dfifo_m);
 170
 171             fabric_in.connect(dfifo.getInputPort("in"));
 172             dfifo.getInputPort("in").connectValue(
 173                 !inbox
 174                 ? fabric_in.getBits(fpga.PACKET_SIGNAL)
 175                 : new CatValue(new Value[] {
 176                         fabric_in.getBits(fpga.PACKET_SIGNAL),
 177                         fabric_in.getBits(fpga.PACKET_DATA)
 178                     }));
 179
 180             Module.SourcePort dfifo_out     = dfifo.getOutputPort("out");
 181             Module.SourcePort ship_out      = !inbox ? createInputPort("ship",  fpga.getWordWidth()+1) : null;
 182             Module.SinkPort   ship_in       =  inbox ? createOutputPort("ship", fpga.getWordWidth()+1) : null;
 183
 184             Module.Latch     ilc            = new Latch("ilc", fpga.SET_ILC_FROM_IMMEDIATE.valmaskwidth+1, 1);
 185             Module.Latch     olc            = new Latch("olc", fpga.SET_OLC_FROM_IMMEDIATE.valmaskwidth, 1);
 186             Module.Latch     flag_a         = new Latch("flag_a", 1);
 187             Module.Latch     flag_b         = new Latch("flag_b", 1);
 188             Module.Latch     flag_c         = new Latch("flag_c", 1);
 189             Module.Latch     flag_d         = new Latch("flag_d", 1);
 190             Module.Latch     flag_z         = new Latch("flag_z", 1);
 191
 192             Module.SinkPort   token_out     = fabric_out;
 193             Module.SourcePort token_in      = dfifo_out;
 194             Module.SinkPort   data_out      = inbox ? ship_in   : fabric_out;
 195             Module.SourcePort data_in       = inbox ? dfifo_out : ship_out;
 196
 197             Module.InstantiatedModule ififo = new Module.InstantiatedModule(this, ififo_m);
 198             Module.SinkPort   ififo_in      = ififo.getInputPort("in");
 199             Module.SourcePort ififo_out     = ififo.getOutputPort("out");
 200
 201             Module.InstantiatedModule torpedo_branch = new Module.InstantiatedModule(this, new TorpedoBranchModule());
 202             instruction.connect(torpedo_branch.getInputPort("in"));
 203             Module.SourcePort efifo_out              = torpedo_branch.getOutputPort("out");
 204             Module.SourcePort torpedo_branch_torpedo = torpedo_branch.getOutputPort("torpedo");
 205
 206             Module.InstantiatedModule fanout_module = new Module.InstantiatedModule(this, new FanoutModule(fpga.getWordWidth()-fpga.DISPATCH_PATH.valmaskwidth));
 207             Module.SinkPort   fanout_module_in   = fanout_module.getInputPort("in");
 208             Module.SourcePort fanout_module_out0 = fanout_module.getOutputPort("out0");
 209             Module.SourcePort fanout_module_out1 = fanout_module.getOutputPort("out1");
 210
 211             Module.InstantiatedModule requeue_module = new Module.InstantiatedModule(this, new RequeueModule());
 212             Module.SinkPort   requeue_fabric_in = requeue_module.getInputPort("fabric_in");
 213             Module.SinkPort   requeue_ondeck    = requeue_module.getInputPort("ondeck_in");
 214             Module.SinkPort   requeue_abort     = requeue_module.getInputPort("abort");
 215             Module.SourcePort requeue_out       = requeue_module.getOutputPort("out");
 216
 217             efifo_out.connect(requeue_fabric_in);
 218             requeue_out.connect(ififo_in);
 219             ififo_out.connect(fanout_module_in);
 220             fanout_module_out0.connect(requeue_ondeck);
 221             Module.SourcePort ondeck = fanout_module_out1;
 222
 223             WireValue decremented = new WireValue("decremented", Math.max(ilc.width,olc.width),
 224                                                   new SimpleValue("("+ondeck.testMask(fpga.SET_OLC_FROM_OLC_MINUS_ONE).getVerilogTrigger()+
 225                                                                   " ? {1'b0, olc} : ilc)-1"));
 226             WireValue data_latch_output_p = new WireValue("data_latch_output",
 227                                                            inbox ? fpga.getWordWidth()+1 : fpga.getWordWidth(),
 228                                                            (inbox
 229                                                             ? new SimpleValue(data_out.getName())
 230                                                             : new SimpleValue(data_out.getBits(fpga.PACKET_DATA).getVerilog()))
 231                                                           );
 232
 233             Assignable data_latch    = new SimpleAssignable(inbox ? data_out.getName() : data_out.getBits(fpga.PACKET_DATA).getVerilog());
 234             Module.SourcePort  data_latch_input = inbox ? data_in : data_in;
 235
 236             BitVector bv = new BitVector(fpga.SET_ILC_FROM_IMMEDIATE.valmaskwidth+1);
 237             bv.set(fpga.SET_ILC_FROM_IMMEDIATE.valmaskwidth, true);
 238             Value magic_standing_value = new ConstantValue(bv);
 239
 240             Trigger done_executing       = new SimpleTrigger("((ilc==0) || (ilc==1) || !"+fpga.MOVE.verilog(ondeck.getName())+")");
 241
 242             String predicate_met =
 243                 "("+
 244                 "("+
 245                 "!"+fpga.MOVE.verilog(ondeck.getName())+" || (ilc!=0)"+
 246                 ") && ("+
 247                 "("+
 248                 fpga.P_ALWAYS.verilog(ondeck.getName())+
 249                 ") || ("+
 250                 fpga.P_OLC_ZERO.verilog(ondeck.getName())+"==flag_d"+
 251                 ")"+
 252                 ") && ("+
 253                 " " + fpga.P_A.verilog(ondeck.getName())+" ? flag_a"+
 254                 ":" + fpga.P_B.verilog(ondeck.getName())+" ? flag_b"+
 255                 ":" + fpga.P_NOT_A.verilog(ondeck.getName())+" ? !flag_a"+
 256                 ":" + fpga.P_NOT_B.verilog(ondeck.getName())+" ? !flag_b "+
 257                 ": 1"+
 258                 ")"+
 259                 ")";
 260
 261             requeue_abort.connectValue(new SimpleValue("("+predicate_met+") && "+fpga.ABORT.verilog(ondeck.getName())));
 262
 263             // Torpedo strikes
 264             new Event(new Object[] {
 265                     ondeck,
 266                     data_out,
 267                     token_out,
 268                     predicate_met,
 269                     fpga.MOVE.verilog(ondeck.getName()),
 270                     "!"+fpga.NOT_INTERRUPTIBLE.verilog(ondeck.getName()),
 271                     torpedo_branch_torpedo
 272                 },
 273                 new Object[] {
 274                     ondeck,
 275                     torpedo_branch_torpedo,
 276                     new AssignAction(olc,    new ConstantValue(new BitVector(olc.width).set(0))),
 277                     new AssignAction(flag_z, new ConstantValue(new BitVector(1).set(1))),
 278                     new AssignAction(flag_d, new ConstantValue(new BitVector(1).set(1))),
 279                     new AssignAction(ilc,    new ConstantValue(new BitVector(ilc.width).set(1)))
 280                 });
 281
 282             // Predicate not met
 283             new Event(new Object[] { ondeck, "!("+predicate_met+")" },
 284                       new Action[] { ondeck,
 285                                      new ConditionalAction(ondeck.testMask(fpga.MOVE),
 286                                                            new AssignAction(ilc, new ConstantValue(new BitVector(ilc.width).set(1))))
 287                       });
 288
 289             new Event(new Object[] { ondeck,
 290                                      data_out,
 291                                      token_out,
 292                                      predicate_met,
 293                                      "(!"+fpga.MOVE.verilog(ondeck.getName())+" || "+fpga.NOT_INTERRUPTIBLE.verilog(ondeck.getName())+" || !"+torpedo_branch_torpedo.isFull()+")",
 294                                      new ConditionalTrigger(ondeck.testMask(fpga.DI), data_in),
 295                                      new ConditionalTrigger(ondeck.testMask(fpga.TI), token_in)
 296                       },
 297                       new Action[] {
 298                           new ConditionalAction(new AndTrigger(done_executing, ondeck.testMask(fpga.MOVE)),
 299                                                 new AssignAction(ilc, new ConstantValue(new BitVector(ilc.width).set(1)))),
 300                           new ConditionalAction(done_executing, ondeck),
 301                           new ConditionalAction(done_executing.invert(),
 302                                                 new AssignAction(ilc, new MuxValue(new TestValue(ilc, TestValue.TestType.EQ, magic_standing_value),
 303                                                                                    magic_standing_value,
 304                                                                                    decremented))),
 305                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_DATA_LATCH),
 306                                                 new AssignAction(olc, new SimpleValue("data_latch_output"))),
 307                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_IMMEDIATE),
 308                                                 new AssignAction(olc, ondeck.getBits(fpga.SET_OLC_FROM_IMMEDIATE))),
 309                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_OLC_MINUS_ONE),
 310                                                 new AssignAction(olc, new SimpleValue("olc==0 ? 0 : decremented"))),
 311
 312                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_DATA_LATCH),
 313                                                 new AssignAction(flag_z, new ConstantValue(new BitVector(1).set(0)))),
 314                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_IMMEDIATE),
 315                                                 new AssignAction(flag_z, new ConstantValue(new BitVector(1).set(0)))),
 316                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_OLC_MINUS_ONE),
 317                                                 new AssignAction(flag_z, new SimpleValue("(olc==0 || olc==1)"))),
 318
 319                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_DATA_LATCH),
 320                                                 new AssignAction(flag_d, new SimpleValue("data_latch_output==0"))),
 321                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_IMMEDIATE),
 322                                                 new AssignAction(flag_d, new SimpleValue(ondeck.getBits(fpga.SET_OLC_FROM_IMMEDIATE).getVerilog()+"==0"))),
 323                           new ConditionalAction(ondeck.testMask(fpga.SET_OLC_FROM_OLC_MINUS_ONE),
 324                                                 new AssignAction(flag_d, new SimpleValue("(olc==0 || olc==1)"))),
 325
 326                           new ConditionalAction(ondeck.testMask(fpga.SET_ILC_FROM_DATA_LATCH),
 327                                                 new AssignAction(ilc, new SimpleValue("data_latch_output"))),
 328
 329                           new ConditionalAction(ondeck.testMask(fpga.SET_ILC_FROM_IMMEDIATE),
 330                                                 new AssignAction(ilc, ondeck.getBits(fpga.SET_ILC_FROM_IMMEDIATE))),
 331                           new ConditionalAction(ondeck.testMask(fpga.SET_ILC_FROM_INFINITY),
 332                                                 new AssignAction(ilc, magic_standing_value)),
 333                           new ConditionalAction(ondeck.testMask(fpga.SHIFT),
 334                                                 new AssignAction(data_latch,
 335                                                                  new SimpleValue("{ data_latch_output["+(fpga.getWordWidth()-1-fpga.SHIFT.valmaskwidth)+":0], "+
 336                                                                                  ondeck.getBits(fpga.SHIFT).getVerilog()+"}"))),
 337                           new ConditionalAction(ondeck.testMask(fpga.SET_IMMEDIATE),
 338                                                 new AssignAction(data_latch,
 339                                                                  new SimpleValue("{ {"+(fpga.getWordWidth()-fpga.DataLatch_WIDTH)+
 340                                                                                  "{"+ondeck.getBits(fpga.SET_IMMEDIATE_EXTEND).getVerilog()+"}}, "+
 341                                                                                  ondeck.getBits(fpga.SET_IMMEDIATE).getVerilog()+" }"))),
 342                           new ConditionalAction(ondeck.testMask(fpga.SET_FLAGS),
 343                                                 new AssignAction(flag_a, new_flag(ondeck.getBits(fpga.SET_FLAGS_A),flag_a,flag_b,flag_c))),
 344                           new ConditionalAction(ondeck.testMask(fpga.SET_FLAGS),
 345                                                 new AssignAction(flag_b, new_flag(ondeck.getBits(fpga.SET_FLAGS_B),flag_a,flag_b,flag_c))),
 346                           new ConditionalAction(inbox
 347                                                 ? new OrTrigger(ondeck.testMask(fpga.DI), ondeck.testMask(fpga.TI))
 348                                                 : new AndTrigger(ondeck.testMask(fpga.DI).invert(), ondeck.testMask(fpga.TI)),
 349                                                 new AssignAction(flag_c, dfifo_out.getBits(dfifo_width-1, dfifo_width-1))),
 350                           new ConditionalAction(ondeck.testMask(fpga.DI),    data_in),
 351                           new ConditionalAction(ondeck.testMask(fpga.DO),    data_out),
 352                           new ConditionalAction(ondeck.testMask(fpga.FLUSH), data_out),
 353                           inbox
 354                           ? new AssignAction(new SimpleAssignable(data_out.getName()+"["+fpga.getWordWidth()+"]"), new SimpleValue(fpga.FLUSH.verilog(ondeck.getName())+"?1:0"))
 355                           : new ConditionalAction(ondeck.testMask(fpga.DI),   new AssignAction(flag_c, new SimpleValue(data_latch_input.getVerilog()+"["+fpga.getWordWidth()+"]"))),
 356                           new ConditionalAction(ondeck.testMask(fpga.TI),    token_in),
 357                           new ConditionalAction(ondeck.testMask(fpga.TO),    token_out),
 358                           new ConditionalAction(ondeck.testMask(fpga.DC),   new AssignAction(data_latch, data_latch_input)),
 359                           new AssignAction(token_out.getBits(fpga.PACKET_TOKEN),
 360                                            new SimpleValue("("+fpga.TO.verilog(ondeck.getName())+")?1:0")),
 361                           new ConditionalAction(ondeck.testMask(fpga.PATH_DATA),
 362                                                 new AssignAction(new SimpleAssignable("{ "+token_out.getBits(fpga.PACKET_SIGNAL).getVerilog()+", "+
 363                                                                                       token_out.getBits(fpga.PACKET_DEST).getVerilog()+" }"),
 364                                                                  data_latch_input.getBits(fpga.DISPATCH_PATH))),
 365                           new ConditionalAction(ondeck.testMask(fpga.PATH_IMMEDIATE),
 366                                                 new AssignAction(new SimpleAssignable("{ "+token_out.getBits(fpga.PACKET_SIGNAL).getVerilog()+", "+
 367                                                                                       token_out.getBits(fpga.PACKET_DEST).getVerilog()+" }"),
 368                                                                  ondeck.getBits(fpga.PATH_IMMEDIATE)))
 369                       }
 370                 );
 371         }
 372
 373         private Value new_flag(Value v, Value flag_a, Value flag_b, Value flag_c) {
 374             Value[] vals = new Value[] {
 375                 new LogicValue(v.getBits(0,0), LogicValue.LogicType.AND, flag_c.invertBits()),
 376                 new LogicValue(v.getBits(1,1), LogicValue.LogicType.AND, flag_c),
 377                 new LogicValue(v.getBits(2,2), LogicValue.LogicType.AND, flag_b.invertBits()),
 378                 new LogicValue(v.getBits(3,3), LogicValue.LogicType.AND, flag_b),
 379                 new LogicValue(v.getBits(4,4), LogicValue.LogicType.AND, flag_a.invertBits()),
 380                 new LogicValue(v.getBits(5,5), LogicValue.LogicType.AND, flag_a),
 381             };
 382             Value ret = new ConstantValue(new BitVector(1).set(0));
 383             for(int i=0; i<vals.length; i++)
 384                 ret = new LogicValue(ret, LogicValue.LogicType.OR, vals[i]);
 385             return ret;
 386         }
 387     }
 388 }
 389