6 wire [47:0]fifostage_3_in;
8 wire fifostage_6_out_r;
9 wire [47:0]fifostage_6_out;
10 wire fifostage_6_out_a;
12 wire fifostage_0_in_a;
13 wire fifostage_0_in_r;
14 wire [47:0]fifostage_0_in;
16 wire fifostage_1_out_r;
17 wire [47:0]fifostage_1_out;
18 wire fifostage_1_out_a;
20 wire fifostage_3_out_r;
21 wire [47:0]fifostage_3_out;
22 wire fifostage_3_out_a;
24 wire fifostage_4_out_r;
25 wire [47:0]fifostage_4_out;
26 wire fifostage_4_out_a;
28 wire fifostage_2_in_a;
29 wire fifostage_2_in_r;
30 wire [47:0]fifostage_2_in;
32 wire fifostage_7_out_r;
33 wire [47:0]fifostage_7_out;
34 wire fifostage_7_out_a;
42 wire fifostage_7_in_a;
43 wire fifostage_7_in_r;
44 wire [47:0]fifostage_7_in;
46 wire fifostage_0_out_r;
47 wire [47:0]fifostage_0_out;
48 wire fifostage_0_out_a;
50 wire fifostage_1_in_a;
51 wire fifostage_1_in_r;
52 wire [47:0]fifostage_1_in;
54 wire fifostage_2_out_r;
55 wire [47:0]fifostage_2_out;
56 wire fifostage_2_out_a;
58 wire fifostage_6_in_a;
59 wire fifostage_6_in_r;
60 wire [47:0]fifostage_6_in;
62 wire fifostage_4_in_a;
63 wire fifostage_4_in_r;
64 wire [47:0]fifostage_4_in;
71 wire fifostage_5_in_a;
72 wire fifostage_5_in_r;
73 wire [47:0]fifostage_5_in;
75 wire fifostage_5_out_r;
76 wire [47:0]fifostage_5_out;
77 wire fifostage_5_out_a;
80 assign fifostage_7_in_r = fifostage_6_out_r;
81 assign fifostage_6_out_a = fifostage_7_in_a;
82 assign fifostage_7_in = fifostage_6_out;
85 assign fifostage_2_in_r = fifostage_1_out_r;
86 assign fifostage_1_out_a = fifostage_2_in_a;
87 assign fifostage_2_in = fifostage_1_out;
89 assign fifostage_4_in_r = fifostage_3_out_r;
90 assign fifostage_3_out_a = fifostage_4_in_a;
91 assign fifostage_4_in = fifostage_3_out;
93 assign fifostage_5_in_r = fifostage_4_out_r;
94 assign fifostage_4_out_a = fifostage_5_in_a;
95 assign fifostage_5_in = fifostage_4_out;
98 assign out_r = fifostage_7_out_r;
99 assign fifostage_7_out_a = out_a;
100 assign out = fifostage_7_out;
102 assign out_r_ = out_r;
106 assign fifostage_1_in_r = fifostage_0_out_r;
107 assign fifostage_0_out_a = fifostage_1_in_a;
108 assign fifostage_1_in = fifostage_0_out;
111 assign fifostage_3_in_r = fifostage_2_out_r;
112 assign fifostage_2_out_a = fifostage_3_in_a;
113 assign fifostage_3_in = fifostage_2_out;
118 assign fifostage_0_in_r = in_r;
119 assign in_a = fifostage_0_in_a;
120 assign fifostage_0_in = in;
123 assign fifostage_6_in_r = fifostage_5_out_r;
124 assign fifostage_5_out_a = fifostage_6_in_a;
125 assign fifostage_6_in = fifostage_5_out;
127 fifostage fifostage_6(clk, rst
128 , fifostage_6_in_r, fifostage_6_in_a, fifostage_6_in
129 , fifostage_6_out_r, fifostage_6_out_a, fifostage_6_out
131 fifostage fifostage_0(clk, rst
132 , fifostage_0_in_r, fifostage_0_in_a, fifostage_0_in
133 , fifostage_0_out_r, fifostage_0_out_a, fifostage_0_out
135 fifostage fifostage_3(clk, rst
136 , fifostage_3_in_r, fifostage_3_in_a, fifostage_3_in
137 , fifostage_3_out_r, fifostage_3_out_a, fifostage_3_out
139 fifostage fifostage_7(clk, rst
140 , fifostage_7_in_r, fifostage_7_in_a, fifostage_7_in
141 , fifostage_7_out_r, fifostage_7_out_a, fifostage_7_out
143 fifostage fifostage_5(clk, rst
144 , fifostage_5_in_r, fifostage_5_in_a, fifostage_5_in
145 , fifostage_5_out_r, fifostage_5_out_a, fifostage_5_out
147 fifostage fifostage_4(clk, rst
148 , fifostage_4_in_r, fifostage_4_in_a, fifostage_4_in
149 , fifostage_4_out_r, fifostage_4_out_a, fifostage_4_out
151 fifostage fifostage_2(clk, rst
152 , fifostage_2_in_r, fifostage_2_in_a, fifostage_2_in
153 , fifostage_2_out_r, fifostage_2_out_a, fifostage_2_out
155 fifostage fifostage_1(clk, rst
156 , fifostage_1_in_r, fifostage_1_in_a, fifostage_1_in
157 , fifostage_1_out_r, fifostage_1_out_a, fifostage_1_out
160 always @(posedge clk) begin