src/edu/berkeley/fleet/fpga/verilog/Verilog.java

   1 package edu.berkeley.fleet.fpga.verilog;
   2 import edu.berkeley.fleet.api.*;
   3 import edu.berkeley.fleet.two.*;
   4 import edu.berkeley.fleet.*;
   5 import java.lang.reflect.*;
   6 import edu.berkeley.sbp.chr.*;
   7 import edu.berkeley.sbp.misc.*;
   8 import edu.berkeley.sbp.meta.*;
   9 import edu.berkeley.sbp.util.*;
  10 import java.util.*;
  11 import java.io.*;
  12 import static edu.berkeley.fleet.two.FleetTwoFleet.*;
  13
  14 public class Verilog {
  15
  16     public static class SimpleValue implements Value {
  17         public final String s;
  18         public SimpleValue(String s) { this.s = s; }
  19         public SimpleValue(String s, int high, int low) { this.s = s+"["+high+":"+low+"]"; }
  20         public Value getBits(int high, int low) { return new SimpleValue(s, high, low); }
  21         public Assignable getAssignableBits(int high, int low) { return new SimpleValue(s, high, low); }
  22         public String getVerilogName() { return s; }
  23         public String toString() { return s; }
  24     }
  25
  26     public static class CatValue implements Value {
  27         private final Value[] values;
  28         public CatValue(Value[] values) { this.values = values; }
  29         public Value getBits(int high, int low) {
  30             throw new RuntimeException();
  31         }
  32         public Assignable getAssignableBits(int high, int low) {
  33             throw new RuntimeException();
  34         }
  35         public String toString() { return getVerilogName(); }
  36         public String getVerilogName() {
  37             StringBuffer sb = new StringBuffer();
  38             sb.append("{ ");
  39             boolean first = true;
  40             for(int i=0; i<values.length; i++) {
  41                 if (values[i]==null) continue;
  42                 if (!first) sb.append(", ");
  43                 sb.append(values[i].getVerilogName());
  44                 first = false;
  45             }
  46             sb.append(" }");
  47             return sb.toString();
  48         }
  49     }
  50
  51     public static interface Action {
  52         public String getVerilogAction();
  53     }
  54
  55     public static interface Trigger {
  56         public String getVerilogTrigger();
  57     }
  58
  59     public static interface Assignable {
  60         public String getVerilogName();
  61         public Assignable getAssignableBits(int high, int low);
  62     }
  63
  64     public static interface Value extends Assignable {
  65         public String getVerilogName();
  66         public Value getBits(int high, int low);
  67     }
  68
  69     public static class ConditionalAction implements Action {
  70         public String condition;
  71         public Action action;
  72         public ConditionalAction(String condition, Action action) {
  73             this.condition = condition;
  74             this.action = action;
  75         }
  76         public String toString() { return getVerilogAction(); }
  77         public String getVerilogAction() { return "if ("+condition+") begin "+action.getVerilogAction()+" end"; }
  78     }
  79
  80     public static class ConditionalTrigger implements Trigger {
  81         public String condition;
  82         public Trigger trigger;
  83         public ConditionalTrigger(String condition, Trigger trigger) {
  84             this.condition = condition;
  85             this.trigger = trigger;
  86             if (trigger instanceof Module.Port)
  87                 ((Module.Port)trigger).hasLatch = true;
  88         }
  89         public String getVerilogTrigger() {
  90             return "&& (("+condition+") ? (1 " + trigger.getVerilogTrigger() + ") : 1)";
  91         }
  92     }
  93
  94     public static class SimpleAssignable implements Assignable {
  95         public final String s;
  96         public SimpleAssignable(String s) { this.s = s; }
  97         public String getVerilogName() { return s; }
  98         public Assignable getAssignableBits(int high, int low) { return new SimpleValue(s, high, low); }
  99     }
 100
 101     public static class AssignAction implements Action {
 102         public String left;
 103         public String right;
 104         public AssignAction(Assignable left, Value right) {
 105             this.left = left.getVerilogName();
 106             this.right = right.getVerilogName().toString();
 107         }
 108         public AssignAction(Assignable left, String right) {
 109             this.left = left.getVerilogName();
 110             this.right = right;
 111         }
 112         public String getVerilogAction() { return left + "<=" + right + ";"; }
 113         public String toString() { return getVerilogAction(); }
 114     }
 115
 116     public static class SimpleAction implements Action {
 117         public final String verilog;
 118         public SimpleAction(String verilog) { this.verilog = verilog; }
 119         public String getVerilogAction() { return verilog; }
 120         public String toString() { return verilog; }
 121     }
 122
 123     public static class Module {
 124         public void dump(String prefix) throws IOException {
 125             PrintWriter pw = new PrintWriter(new OutputStreamWriter(new FileOutputStream(prefix+"/"+name+".v")));
 126             /*
 127             pw.println("`define DATAWIDTH                "+WIDTH_WORD);
 128             pw.println("`define CODEBAG_SIZE_BITS        "+CBD_SIZE.valmaskwidth);
 129             */
 130             dump(pw, true);
 131             pw.flush();
 132             for(InstantiatedModule m : instantiatedModules)
 133                 m.module.dump(prefix);
 134         }
 135         public int id = 0;
 136         public final String name;
 137         public String getName() { return name; }
 138         public Port getPort(String name) { return ports.get(name); }
 139
 140         public HashSet<InstantiatedModule> instantiatedModules = new HashSet<InstantiatedModule>();
 141         public final ArrayList<Event> events = new ArrayList<Event>();
 142
 143         // FIXME: always-alphabetical convention?
 144         public final HashMap<String,Port> ports = new HashMap<String,Port>();
 145         public final ArrayList<String> portorder = new ArrayList<String>();
 146         public final HashMap<String,StateWire> statewires = new HashMap<String,StateWire>();
 147         public final HashMap<String,Latch> latches = new HashMap<String,Latch>();
 148
 149         public StringBuffer crap = new StringBuffer();
 150         public StringBuffer precrap = new StringBuffer();
 151         //public void addCrap(String s) { crap.append(s); crap.append('\n'); }
 152         public void addPreCrap(String s) { precrap.append(s); precrap.append('\n'); }
 153         public void addPreCrap0(String s) { precrap.append(s); }
 154
 155         public Module(String name) {
 156             this.name = name;
 157         }
 158
 159         public SourcePort createInputPort(String name, int width) {
 160             if (ports.get(name)!=null) throw new RuntimeException();
 161             return new SourcePort(name, width, true);
 162         }
 163         public SourcePort getInputPort(String name) {
 164             SourcePort ret = (SourcePort)ports.get(name);
 165             if (ret==null) throw new RuntimeException();
 166             return ret;
 167         }
 168         public SinkPort createOutputPort(String name, int width, String resetBehavior) {
 169             if (ports.get(name)!=null) throw new RuntimeException();
 170             return new SinkPort(name, width, true, resetBehavior);
 171         }
 172         public SinkPort createWirePort(String name, int width) {
 173             if (ports.get(name)!=null) throw new RuntimeException();
 174             return new SinkPort(name, width, false, "");
 175         }
 176         public SourcePort createWireSourcePort(String name, int width) {
 177             if (ports.get(name)!=null) throw new RuntimeException();
 178             return new SourcePort(name, width, false);
 179         }
 180         public SinkPort getOutputPort(String name) {
 181             SinkPort ret = (SinkPort)ports.get(name);
 182             if (ret==null) throw new RuntimeException();
 183             return ret;
 184         }
 185
 186         public class StateWire {
 187             public final String name;
 188             public final boolean initiallyFull;
 189             public String getName() { return name; }
 190             public Action isFull()  { return new SimpleAction(name+"==1"); }
 191             public Action isEmpty() { return new SimpleAction(name+"==0"); }
 192             public Action doFill()  { return new SimpleAction(name+"<=1;"); }
 193             public Action doDrain() { return new SimpleAction(name+"<=0;"); }
 194             public String doReset() { return name+"<="+(initiallyFull?"1":"0")+";"; }
 195             public StateWire(String name) { this(name, false); }
 196             public StateWire(String name, boolean initiallyFull) {
 197                 this.name = name;
 198                 this.initiallyFull = initiallyFull;
 199                 statewires.put(name, this);
 200             }
 201             public void dump(PrintWriter pw) {
 202                 pw.println("  reg "+name+";");
 203                 pw.println("  initial "+name+"="+(initiallyFull?"1":"0")+";");
 204             }
 205         }
 206
 207         public class Latch implements Assignable, Value {
 208             public final String name;
 209             public final int width;
 210             public final long initial;
 211             public Latch(String name, int width) { this(name, width, 0); }
 212             public Latch(String name, int width, long initial) {
 213                 this.width = width;
 214                 this.name = name;
 215                 this.initial = initial;
 216                 latches.put(name, this);
 217             }
 218             public String getVerilogName() { return name; }
 219             public Value getBits(int high, int low) { return new SimpleValue(getVerilogName(), high, low); }
 220             public Assignable getAssignableBits(int high, int low) { return new SimpleValue(getVerilogName(), high, low); }
 221             public String doReset() { return name+"<="+initial+";"; }
 222             public void dump(PrintWriter pw) {
 223                 pw.println("  reg ["+(width-1)+":0] "+name+";");
 224                 pw.println("  initial "+name+"="+initial+";");
 225             }
 226             public void connect(SinkPort driven) {
 227                 driven.latchDriver = this;
 228             }
 229         }
 230
 231         public abstract class Port implements Action, Assignable, Trigger {
 232             public abstract String doReset();
 233             public final String name;
 234             public String getName() { return name; }
 235             public final int width;
 236             public int getWidth() { return width; }
 237             public boolean hasLatch = false;
 238             public boolean external;
 239             public Port(String name, int width, boolean external) {
 240                 this.width = width;
 241                 this.name = name;
 242                 this.external = external;
 243                 ports.put(name, this);
 244                 if (external)
 245                     portorder.add(name);
 246             }
 247             public String getVerilogName() { return name; }
 248             public String getAck() { return name+"_a"; }
 249             public String getReq() { return name+"_r"; }
 250             public abstract String getInterface();
 251             public abstract String getSimpleInterface();
 252             public abstract String getDeclaration();
 253             public abstract String getAssignments();
 254             public abstract void   connect(SinkPort driven);
 255         }
 256
 257         public static class InstantiatedModule {
 258             public final Module module;
 259             public final Module thisModule;
 260             public final int id;
 261             public final HashMap<String,Port> ports = new HashMap<String,Port>();
 262             public String getName() { return module.getName()+"_"+id; }
 263             public InstantiatedModule(Module thisModule, Module module) {
 264                 this.thisModule = thisModule;
 265                 this.module = module;
 266                 this.id = thisModule.id++;
 267                 thisModule.instantiatedModules.add(this);
 268             }
 269             public void dump(PrintWriter pw) {
 270                 pw.println("  " + module.getName() + " " + getName() + "(clk, rst ");
 271                 for(String s : module.portorder)
 272                     pw.println(", " + getPort(s).getSimpleInterface());
 273                 if (module.name.equals("dram")) {
 274                     pw.println("    , dram_addr");
 275                     pw.println("    , dram_addr_r");
 276                     pw.println("    , dram_addr_a");
 277                     pw.println("    , dram_isread");
 278                     pw.println("    , dram_write_data");
 279                     pw.println("    , dram_write_data_push");
 280                     pw.println("    , dram_write_data_full");
 281                     pw.println("    , dram_read_data");
 282                     pw.println("    , dram_read_data_pop");
 283                     pw.println("    , dram_read_data_empty");
 284                     pw.println("    , dram_read_data_latency");
 285                 }
 286                 if (module.name.equals("ddr2")) {
 287                     pw.println("    , ddr2_addr");
 288                     pw.println("    , ddr2_addr_r");
 289                     pw.println("    , ddr2_addr_a");
 290                     pw.println("    , ddr2_isread");
 291                     pw.println("    , ddr2_write_data");
 292                     pw.println("    , ddr2_write_data_push");
 293                     pw.println("    , ddr2_write_data_full");
 294                     pw.println("    , ddr2_read_data");
 295                     pw.println("    , ddr2_read_data_pop");
 296                     pw.println("    , ddr2_read_data_empty");
 297                     pw.println("    , ddr2_read_data_latency");
 298                 }
 299                 if (module.name.equals("video")) {
 300                     pw.println("    , vga_clk");
 301                     pw.println("    , vga_psave");
 302                     pw.println("    , vga_hsync");
 303                     pw.println("    , vga_vsync");
 304                     pw.println("    , vga_sync");
 305                     pw.println("    , vga_blank");
 306                     pw.println("    , vga_r");
 307                     pw.println("    , vga_g");
 308                     pw.println("    , vga_b");
 309                     pw.println("    , vga_clkout");
 310                 }
 311                 pw.println("   );");
 312             }
 313             public Port getPort(String name) {
 314                 return (module.ports.get(name) instanceof SinkPort) ? getOutputPort(name) : getInputPort(name);
 315             }
 316             public SinkPort getInputPort(String name) {
 317                 int width = module.getPort(name).getWidth();
 318                 SinkPort port = (SinkPort)ports.get(name);
 319                 if (port == null) {
 320                     port = thisModule.new SinkPort(getName()+"_"+name, width, false, "");
 321                     ports.put(name, port);
 322                 }
 323                 return port;
 324             }
 325             public SourcePort getOutputPort(String name) {
 326                 int width = module.getPort(name).getWidth();
 327                 SourcePort port = (SourcePort)ports.get(name);
 328                 if (port == null) {
 329                     port = thisModule.new SourcePort(getName()+"_"+name, width, false);
 330                     ports.put(name, port);
 331                 }
 332                 return port;
 333             }
 334         }
 335
 336         public class SourcePort extends Port implements Value {
 337             public SourcePort(String name, int width, boolean external) {
 338                 super(name, width, external); }
 339             public Value getBits(int high, int low) { return new SimpleValue(getVerilogName(), high, low); }
 340             public Assignable getAssignableBits(int high, int low) { return new SimpleValue(getVerilogName(), high, low); }
 341             public String getVerilogTrigger() { return " && " + getReq() + " && !"+getAck(); }
 342             public String getVerilogAction() { return getAck() + " <= 1;"; }
 343             public String getInterface() { return getReq()+", "+getAck()+"_, "+name+""; }
 344             public String getSimpleInterface() { return getReq()+", "+getAck()+", "+name+""; }
 345             public String testBit(int index, boolean value) {
 346                 return "("+name+"["+index+"]=="+(value?1:0)+")";
 347             }
 348             public String getDeclaration() {
 349                 StringBuffer sb = new StringBuffer();
 350                 if (external) {
 351                     sb.append("input "  +                 name +"_r;\n");
 352                     sb.append("output " +                 name +"_a_;\n");
 353                     if (width>0)
 354                         sb.append("input ["+(width-1)+":0]" + name +";\n");
 355                     else
 356                         sb.append("input [0:0]" + name +";\n"); // waste a bit, I guess
 357                 } else {
 358                     sb.append("wire "  +                 name +"_r;\n");
 359                     if (width>0)
 360                         sb.append("wire ["+(width-1)+":0]" + name +";\n");
 361                 }
 362                 if (!hasLatch) {
 363                     sb.append("wire "    +                 name +"_a;\n");
 364                 } else {
 365                     sb.append("reg "    +                 name +"_a;\n");
 366                     sb.append("initial " +                name +"_a = 0;\n");
 367                 }
 368                 return sb.toString();
 369             }
 370             public String doReset() { return hasLatch ? name+"_a<=1;" : ""; }
 371             public String getAssignments() {
 372                 StringBuffer sb = new StringBuffer();
 373                 if (external)
 374                     sb.append("assign " +                 name +"_a_ = " + name + "_a;\n");
 375                 return sb.toString();
 376             }
 377             public void connect(SinkPort driven) {
 378                 driven.driver = this;
 379             }
 380         }
 381         public class SinkPort extends Port {
 382             public SourcePort driver = null;
 383             public boolean forceNoLatch = false;
 384             public SinkPort driven = null;
 385             public Latch latchDriver = null;
 386             public final String resetBehavior;
 387             public Assignable getAssignableBits(int high, int low) { return new SimpleValue(getVerilogName(), high, low); }
 388             public String getVerilogAction() { return getReq() + " <= 1;"; }
 389             public String getVerilogTrigger() { return " && !" + getReq() + " && !"+getAck(); }
 390             public SinkPort(String name, int width, boolean external, String resetBehavior) {
 391                 super(name, width, external); this.resetBehavior=resetBehavior; }
 392             public String getResetBehavior() { return resetBehavior; }
 393             public String getInterface() { return name+"_r_, "+name+"_a, "+name+"_"; }
 394             public String getSimpleInterface() { return name+"_r, "+name+"_a, "+name; }
 395             public String getDeclaration() {
 396                 StringBuffer sb = new StringBuffer();
 397                 if (external) {
 398                     sb.append("output "  +                 name +"_r_;\n");
 399                     sb.append("input "   +                 name +"_a;\n");
 400                     if (width>0)
 401                         sb.append("output ["+(width-1)+":0]" + name +"_;\n");
 402                     else
 403                         sb.append("output [0:0]" + name +"_;\n"); // waste a bit, I guess
 404                 } else {
 405                     sb.append("wire "   +                 name +"_a;\n");
 406                 }
 407
 408                 if (forceNoLatch ||  latchDriver!=null) {
 409                     sb.append("reg "    +                  name +"_r;\n");
 410                     sb.append("initial " +                 name +"_r = 0;\n");
 411                     if (width>0)
 412                         sb.append("wire   ["+(width-1)+":0]" + name +";\n");
 413                 } else if (!hasLatch) {
 414                     sb.append("wire "    +                 name +"_r;\n");
 415                     if (width>0)
 416                         sb.append("wire   ["+(width-1)+":0]" + name +";\n");
 417                 } else {
 418                     sb.append("reg "    +                  name +"_r;\n");
 419                     sb.append("initial " +                 name +"_r = 0;\n");
 420                     if (width>0) {
 421                         sb.append("reg    ["+(width-1)+":0]" + name +";\n");
 422                         if (!"/*NORESET*/".equals(resetBehavior))
 423                             sb.append("initial " +                 name +" = 0;\n");
 424                     }
 425                 }
 426                 return sb.toString();
 427             }
 428             public String doReset() {
 429                 return (forceNoLatch||latchDriver!=null)
 430                     ? name+"_r<=0;"
 431                     : hasLatch
 432                     ? (name+"_r<=0; "+("/*NORESET*/".equals(resetBehavior) ? "" : (name+"<=0;")))
 433                     : "";
 434             }
 435             public String getAssignments() {
 436                 StringBuffer sb = new StringBuffer();
 437                 if (external) {
 438                     sb.append("assign " +                  name +"_r_ = " + name + "_r;\n");
 439                     if (width>0)
 440                         sb.append("assign " +                  name +"_ = " + name + ";\n");
 441                 }
 442                 if (driven != null) {
 443                     sb.append("assign " + driven.name +"_r = " + name + "_r;\n");
 444                     sb.append("assign " + name +"_a = " + driven.name + "_a;\n");
 445                     if (width>0)
 446                         sb.append("assign " + driven.name +"   = " + name + ";\n");
 447                 }
 448                 if (driver != null) {
 449                     sb.append("assign " + name +"_r = " + driver.name + "_r;\n");
 450                     sb.append("assign " + driver.name +"_a = " + name + "_a;\n");
 451                     if (width>0)
 452                         sb.append("assign " + name +"   = " + driver.name + ";\n");
 453                 }
 454                 if (latchDriver != null) {
 455                     if (width>0)
 456                         sb.append("assign " + name +"   = " + latchDriver.name + ";\n");
 457                 }
 458                 return sb.toString();
 459             }
 460             public void connect(SinkPort driven) {
 461                 this.driven = driven;
 462                 throw new RuntimeException();
 463             }
 464         }
 465
 466         public void dump(PrintWriter pw, boolean fix) {
 467             pw.println("module "+name+"(clk, rst ");
 468             for(String name : portorder) {
 469                 Port p = ports.get(name);
 470                 pw.println("    , " + p.getInterface());
 471             }
 472             if (this.name.equals("root")) {
 473                 pw.println("    , dram_addr");
 474                 pw.println("    , dram_addr_r");
 475                 pw.println("    , dram_addr_a");
 476                 pw.println("    , dram_isread");
 477                 pw.println("    , dram_write_data");
 478                 pw.println("    , dram_write_data_push");
 479                 pw.println("    , dram_write_data_full");
 480                 pw.println("    , dram_read_data");
 481                 pw.println("    , dram_read_data_pop");
 482                 pw.println("    , dram_read_data_empty");
 483                 pw.println("    , dram_read_data_latency");
 484                 pw.println("    , vga_clk");
 485                 pw.println("    , vga_psave");
 486                 pw.println("    , vga_hsync");
 487                 pw.println("    , vga_vsync");
 488                 pw.println("    , vga_sync");
 489                 pw.println("    , vga_blank");
 490                 pw.println("    , vga_r");
 491                 pw.println("    , vga_g");
 492                 pw.println("    , vga_b");
 493                 pw.println("    , vga_clkout");
 494                 pw.println("    , ddr2_addr");
 495                 pw.println("    , ddr2_addr_r");
 496                 pw.println("    , ddr2_addr_a");
 497                 pw.println("    , ddr2_isread");
 498                 pw.println("    , ddr2_write_data");
 499                 pw.println("    , ddr2_write_data_push");
 500                 pw.println("    , ddr2_write_data_full");
 501                 pw.println("    , ddr2_read_data");
 502                 pw.println("    , ddr2_read_data_pop");
 503                 pw.println("    , ddr2_read_data_empty");
 504                 pw.println("    , ddr2_read_data_latency");
 505             }
 506             pw.println("   );");
 507             pw.println();
 508             pw.println("    input clk;");
 509             pw.println("    input rst;");
 510             if (this.name.equals("root")) {
 511                 pw.println("output  [31:0] dram_addr;");
 512                 pw.println("output         dram_addr_r;");
 513                 pw.println("input          dram_addr_a;");
 514                 pw.println("output         dram_isread;");
 515                 pw.println("output  [63:0] dram_write_data;");
 516                 pw.println("output         dram_write_data_push;");
 517                 pw.println("input          dram_write_data_full;");
 518                 pw.println("input   [63:0] dram_read_data;");
 519                 pw.println("output         dram_read_data_pop;");
 520                 pw.println("input          dram_read_data_empty;");
 521                 pw.println("input   [1:0]  dram_read_data_latency;");
 522                 pw.println("output  [31:0] ddr2_addr;");
 523                 pw.println("output         ddr2_addr_r;");
 524                 pw.println("input          ddr2_addr_a;");
 525                 pw.println("output         ddr2_isread;");
 526                 pw.println("output  [63:0] ddr2_write_data;");
 527                 pw.println("output         ddr2_write_data_push;");
 528                 pw.println("input          ddr2_write_data_full;");
 529                 pw.println("input   [63:0] ddr2_read_data;");
 530                 pw.println("output         ddr2_read_data_pop;");
 531                 pw.println("input          ddr2_read_data_empty;");
 532                 pw.println("input   [1:0]  ddr2_read_data_latency;");
 533                 pw.println("input          vga_clk;");
 534                 pw.println("output         vga_psave;");
 535                 pw.println("output         vga_hsync;");
 536                 pw.println("output         vga_vsync;");
 537                 pw.println("output         vga_sync;");
 538                 pw.println("output         vga_blank;");
 539                 pw.println("output   [7:0] vga_r;");
 540                 pw.println("output   [7:0] vga_g;");
 541                 pw.println("output   [7:0] vga_b;");
 542                 pw.println("output         vga_clkout;");
 543             }
 544             for(String name : ports.keySet()) {
 545                 Port p = ports.get(name);
 546                 pw.println("    " + p.getDeclaration());
 547             }
 548             for(StateWire sw : statewires.values())
 549                 sw.dump(pw);
 550             for(Latch l : latches.values())
 551                 l.dump(pw);
 552             for(String name : ports.keySet()) {
 553                 Port p = ports.get(name);
 554                 pw.println("    " + p.getAssignments());
 555             }
 556             for(InstantiatedModule m : instantiatedModules) {
 557                 m.dump(pw);
 558             }
 559             pw.println(precrap);
 560             pw.println("always @(posedge clk) begin");
 561             pw.println("  if (!rst) begin");
 562             for(Latch l : latches.values())
 563                 pw.println(l.doReset());
 564             for(StateWire sw : statewires.values())
 565                 pw.println(sw.doReset());
 566             for(Port p : ports.values())
 567                 pw.println(p.doReset());
 568             pw.println("  end else begin");
 569             for(Port p : ports.values()) {
 570                 if (p instanceof SourcePort) {
 571                     SourcePort ip = (SourcePort)p;
 572                     if (ip.hasLatch)
 573                         pw.println("if (!"+ip.getReq()+" && "+ip.getAck()+") "+ip.getAck()+"<=0;");
 574                 } else {
 575                     SinkPort op = (SinkPort)p;
 576                     if (op.hasLatch)
 577                         pw.println("if ("+op.getReq()+" && "+op.getAck()+") begin "+
 578                                    op.getReq()+"<=0; "+
 579                                    op.getResetBehavior()+" end");
 580                 }
 581             }
 582             for(Event a : events) a.dump(pw, fix);
 583             pw.println("    begin end");
 584             pw.println("    end");
 585             pw.println("  end");
 586
 587             pw.println(crap);
 588             pw.println("endmodule");
 589         }
 590
 591         public class Event {
 592             public Object[]  triggers;
 593             public Object[]  actions;
 594             public Event(Object[] triggers, Object action) { this(triggers, new Object[] { action }); }
 595             public Event(Object[] triggers, Object[] actions) {
 596                 Module.this.events.add(this);
 597                 this.triggers = triggers;
 598                 this.actions = actions;
 599                 for(int i=0; i<triggers.length; i++)
 600                     if (triggers[i] instanceof Port)
 601                         ((Port)triggers[i]).hasLatch = true;
 602             }
 603             public void dump(PrintWriter pw, boolean fix) {
 604                 pw.print("if (1");
 605                 for(Object o : triggers) {
 606                     if (o instanceof Trigger) pw.print(((Trigger)o).getVerilogTrigger());
 607                     else                      pw.print(" && " + o);
 608                 }
 609                 pw.println(") begin ");
 610                 for(Object a : actions) if (a!=null) pw.println(((Action)a).getVerilogAction());
 611                 if (fix) pw.println("end /*else*/ ");
 612                 else     pw.println("end else ");
 613             }
 614         }
 615     }
 616 }