massive overhaul of fpga code
[fleet.git] / src / edu / berkeley / fleet / fpga / vram.v
1 `define BRAM_ADDR_WIDTH 19
2 `define BRAM_DATA_WIDTH 3
3 `define BRAM_SIZE (640*480)
4 `define BRAM_NAME vram
5
6 `include "bram.inc"