3 module command (clk, data_r, data_a, data_d,
4 command_r, command_a, command_d);
9 input [(`DATAWIDTH-1):0] data_d;
13 output [(`INSTRUCTION_WIDTH-1):0] command_d;
15 assign command_r = data_r;
16 assign data_a = command_a;
17 assign command_d = data_d;