import slipway (fpga-fleet) code
[fleet.git] / src / edu / berkeley / fleet / slipway / inbox.v
1 `include "macros.v"
2
3 module inbox(clk,
4              instr_r,       instr_a_,      instr_d,
5              fabric_in_r,   fabric_in_a_,  fabric_in_d,
6              fabric_out_r_, fabric_out_a,  fabric_out_d_,
7              ship_r_,   ship_a,    ship_d_);
8   input clk;
9
10   `input(instr_r,     instr_a,     instr_a_,         [(`INSTRUCTION_WIDTH-1):0], instr_d)
11 //  `input(fabric_in_r, fabric_in_a, fabric_in_a_,     [`DATAWIDTH:0],  fabric_in_d)
12   `output(fabric_out_r, fabric_out_r_, fabric_out_a, [(`PACKET_WIDTH-1):0],  fabric_out_d_)
13
14   input   fabric_in_r;
15   output  fabric_in_a_;
16   input   [(`PACKET_WIDTH-1):0] fabric_in_d;
17
18   output ship_r_;
19   input  ship_a;
20   output [(`DATAWIDTH-1):0] ship_d_;
21   wire [(`DATAWIDTH-1):0] fabric_in_data;
22
23   assign fabric_in_data = `packet_data(fabric_in_d);
24
25   fifo4 dfifo(clk, fabric_in_r, fabric_in_a, fabric_in_data,
26                    ship_r_,     ship_a,      ship_d_);
27
28 endmodule