2 // YOU MUST COMPILE THIS WITH -O3 OR THE AVR WILL NOT BE ABLE TO KEEP UP!!!!
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5 //#define F_CPU 3960000
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6 #define F_CPU 4000000
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8 #if !defined(__AVR_AT94K__)
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9 #error you forgot to put -mmcu=at94k on the command line
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12 #include <avr/wdt.h>
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13 #include <util/delay.h>
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15 #include <avr/interrupt.h>
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17 void initUART1(unsigned int baudRate, unsigned int doubleRate) {
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18 UBRRHI = (((baudRate) >> 8) & 0x000F);
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19 UBRR1 = ((baudRate) & 0x00FF);
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20 UCSR1B |= ((1 << RXEN1) | (1 << TXEN1) | (1 << RXCIE1));
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23 UCSR1A |= (1 << U2X1);
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26 UCSR1A &= ~(1 << U2X1);
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30 #define BUFSIZE (1024)
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32 inline void portd(int bit, int on) {
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41 inline void cts(int c) {
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52 static volatile int sending = 0;
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53 static volatile int32_t interrupt_count = 0;
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55 // RECV //////////////////////////////////////////////////////////////////////////////
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57 char read_buf[BUFSIZE];
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58 volatile int read_buf_head;
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59 volatile int read_buf_tail;
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60 char write_buf[BUFSIZE];
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61 volatile int write_buf_head;
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62 volatile int write_buf_tail;
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64 inline int inc(int x) { x++; if (x>=BUFSIZE) x=0; return x; }
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65 inline int read_full() { return inc(read_buf_tail)==read_buf_head; }
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66 inline int read_empty() { return read_buf_head==read_buf_tail; }
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67 inline int read_nearlyFull() {
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68 if (read_buf_tail==read_buf_head) return 0;
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69 if (read_buf_tail < read_buf_head) return (read_buf_head-read_buf_tail) < (BUFSIZE/2);
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70 return (read_buf_tail-read_buf_head) > (BUFSIZE/2);
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73 inline int write_full() { return inc(write_buf_tail)==write_buf_head; }
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74 inline int write_empty() { return write_buf_head==write_buf_tail; }
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75 inline int write_nearlyFull() {
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76 if (write_buf_tail==write_buf_head) return 0;
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77 if (write_buf_tail < write_buf_head) return (write_buf_head-write_buf_tail) < (BUFSIZE/2);
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78 return (write_buf_tail-write_buf_head) > (BUFSIZE/2);
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81 inline char recv() {
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84 while(read_empty()) cts(1);
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85 ret = read_buf[read_buf_head];
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86 read_buf_head = inc(read_buf_head);
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87 if (!read_nearlyFull()) cts(0);
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91 ISR(SIG_UART1_DATA) {
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93 if (write_empty()) {
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94 UCSR1B &= ~(1 << UDRIE1);
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103 char ret = write_buf[write_buf_head];
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104 write_buf_head = inc(write_buf_head);
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110 void send(char c) {
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112 while (write_full());
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114 write_buf[write_buf_tail] = c;
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115 write_buf_tail = inc(write_buf_tail);
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117 UCSR1B |= (1 << UDRIE1);
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119 //while(!(UCSR1A & (1 << UDRE1))); /* Wait for data Regiester to be empty */
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123 void fpga_interrupts(int on) {
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124 if (on/* && interrupt_count<301*/) {
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137 write_buf_head = 0;
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138 write_buf_tail = 0;
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139 EIMF = 0xFF; /* Enalbe External Interrrupt*/
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140 DDRD = 0xFF; /* Configure PORTD as Output */
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141 DDRE = 1 << 4; /* ability to write to E */
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142 initUART1(12, 1); //for slow board
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144 fpga_interrupts(1);
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151 void conf(int z, int y, int x, int d) {
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160 for(i=0; i<5; i++) {
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171 wdt_enable(WDTO_250MS);
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175 #define TIMERVAL 100
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177 ISR(SIG_FPGA_INTERRUPT15) {
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180 //PORTD = ~(interrupt_count & 0xff);
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181 //if (interrupt_count >= 301) fpga_interrupts(0);
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183 fpga_interrupts(1);
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185 ISR(SIG_OVERFLOW0) {
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186 fpga_interrupts(0);
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188 TCNT0 = TIMERVAL; // load the nearest-to-one-second value into the timer0
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189 TIMSK |= (1<<TOIE0); // enable the compare match1 interrupt and the timer/counter0 overflow interrupt
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190 if (sending) UDR1 = FISUA;
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191 fpga_interrupts(1);
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194 void init_timer() {
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195 TCCR0 |= (1<<CS00); // set the timer0 prescaler to CK
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196 TCNT0 = TIMERVAL; // load the nearest-to-one-second value into the timer0
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197 TIMSK |= (1<<TOIE0); //enable the compare match1 interrupt and the timer/counter0 overflow interrupt
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200 ISR(SIG_INTERRUPT1) { // use interrupt1 since interrupt0 is sent by the watchdog (I think)
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204 void die() { cli(); cts(0); _delay_ms(2000); while(1) { portd(2,0); portd(2,1); } }
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205 ISR(SIG_UART1_RECV) {
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206 if (UCSR1A & (1 << FE1)) { portd(2,0); portd(3,1); die(); } // framing error, lock up with LED=01
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207 if ((UCSR1A & (1 << OR1))) { portd(2,1); portd(3,0); die(); } // overflow; lock up with LED=10
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208 if (read_full()) { portd(2,1); portd(3,1); die(); } // buffer overrun
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209 read_buf[read_buf_tail] = UDR1;
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210 read_buf_tail = inc(read_buf_tail);
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213 if (read_nearlyFull()) cts(0);
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216 inline int hex(char c) {
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217 if (c >= '0' && c <= '9') return (c - '0');
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218 if (c >= 'a' && c <= 'f') return ((c - 'a') + 0xa);
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219 if (c >= 'A' && c <= 'F') return ((c - 'A') + 0xa);
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249 fpga_interrupts(0);
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253 fpga_interrupts(1);
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265 int32_t local_interrupt_count = interrupt_count;
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266 interrupt_count = 0;
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267 send((local_interrupt_count >> 24) & 0xff);
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268 send((local_interrupt_count >> 16) & 0xff);
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269 send((local_interrupt_count >> 8) & 0xff);
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270 send((local_interrupt_count >> 0) & 0xff);
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271 fpga_interrupts(1);
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275 if ((r & 0x80) == 0x80) {
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276 switch (r & 0x44) {
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277 case 0x44: z = recv(); break;
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278 case 0x40: z++; break;
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279 case 0x04: z--; break;
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281 switch (r & 0x22) {
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282 case 0x22: y = recv(); break;
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283 case 0x20: y++; break;
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284 case 0x02: y--; break;
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286 switch (r & 0x11) {
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287 case 0x11: x = recv(); break;
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288 case 0x10: x++; break;
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289 case 0x01: x--; break;
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