include shiftReport in isFillStageFull()

[fleet.git] / testCode / isolatedInDock.spi

*** SPICE deck for cell isolatedInDock{sch} from library marina
*** Created on Fri Sep 05, 2008 15:05:59
*** Last revised on Thu Nov 06, 2008 13:25:14
*** Written on Tue Nov 11, 2008 13:03:40 by Electric VLSI Design System, 
*version 8.08k
*** Layout tech: cmos90, foundry TSMC
*** UC SPICE *** , MIN_RESIST 50.0, MIN_CAPAC 0.04FF
.OPTIONS NOMOD NOPAGE
* Model cards are described in this file:
.include '../testCode/header.hsp'

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_70 d g s
MNMOSf@0 d g s gnd nch W='210*(1+ABN/sqrt(210*2))' L='2' 
+DELVTO='AVT0N/sqrt(210*2)'
.ENDS NMOSx-X_70

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_70 d g s
MPMOSf@0 d g s vdd pch W='420*(1+ABP/sqrt(420*2))' L='2'  
+DELVTO='AVT0P/sqrt(420*2)'
.ENDS PMOSx-X_70

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_70 in out
XNMOS@0 out in gnd NMOSx-X_70
XPMOS@0 out in vdd PMOSx-X_70
.ENDS inv-X_70

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_30 d g s
MPMOSf@0 d g s vdd pch W='180*(1+ABP/sqrt(180*2))' L='2'  
+DELVTO='AVT0P/sqrt(180*2)'
.ENDS PMOSx-X_30

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_30 d g s
MNMOSf@0 d g s gnd nch W='90*(1+ABN/sqrt(90*2))' L='2' 
+DELVTO='AVT0N/sqrt(90*2)'
.ENDS NMOSx-X_30

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_15 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_30
XNMOS@1 net@0 g gnd NMOSx-X_30
.ENDS nms2-X_15

*** CELL: redFour:nms2_sy{sch}
.SUBCKT nms2_sy-X_30 d g g2
Xnms2@0 d g g2 nms2-X_15
Xnms2@1 d g2 g nms2-X_15
.ENDS nms2_sy-X_30

*** CELL: redFour:nand2_sy{sch}
.SUBCKT nand2_sy-X_30 ina inb out
XPMOS@0 out inb vdd PMOSx-X_30
XPMOS@1 out ina vdd PMOSx-X_30
Xnms2_sy@0 out ina inb nms2_sy-X_30
.ENDS nand2_sy-X_30

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-947_7-R_34_667m a b
Ccap@0 gnd net@14 3.475f
Ccap@1 gnd net@8 3.475f
Ccap@2 gnd net@11 3.475f
Rres@0 net@14 a 5.476
Rres@1 net@11 net@14 10.951
Rres@2 b net@8 5.476
Rres@3 net@8 net@11 10.951
.ENDS wire-C_0_011f-947_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-947_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-947_7-R_34_667m
.ENDS wire90-947_7-layer_1-width_3

*** CELL: driversJ:dataDriver70{sch}
.SUBCKT dataDriver70 inA inB out
Xinv@0 net@8 out inv-X_70
Xnand2_sy@0 inA inB net@7 nand2_sy-X_30
Xwire90@0 net@7 net@8 wire90-947_7-layer_1-width_3
.ENDS dataDriver70

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_1_733 d g s
MNMOSf@0 d g s gnd nch W='5.199*(1+ABN/sqrt(5.199*2))' L='2' 
+DELVTO='AVT0N/sqrt(5.199*2)'
.ENDS NMOSx-X_1_733

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_4 d g s
MPMOSf@0 d g s vdd pch W='24*(1+ABP/sqrt(24*2))' L='2'  
+DELVTO='AVT0P/sqrt(24*2)'
.ENDS PMOSx-X_4

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_1 d g s
MPMOSf@0 d g s vdd pch W='6*(1+ABP/sqrt(6*2))' L='2'  
+DELVTO='AVT0P/sqrt(6*2)'
.ENDS PMOSx-X_1

*** CELL: latchPartsK:latchKeep{sch}
.SUBCKT latchKeep out[B] out[s]
XNMOSx@0 out[B] out[s] gnd NMOSx-X_1_733
XNMOSx@1 out[s] out[B] gnd NMOSx-X_1_733
XPMOSx@0 out[B] out[s] vdd PMOSx-X_4
XPMOSx@1 out[s] out[B] vdd PMOSx-X_1
.ENDS latchKeep

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_3 d g s
MNMOSf@0 d g s gnd nch W='9*(1+ABN/sqrt(9*2))' L='2' DELVTO='AVT0N/sqrt(9*2)'
.ENDS NMOSx-X_3

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_6 d g s
MNMOSf@0 d g s gnd nch W='18*(1+ABN/sqrt(18*2))' L='2' 
+DELVTO='AVT0N/sqrt(18*2)'
.ENDS NMOSx-X_6

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_10 d g s
MNMOSf@0 d g s gnd nch W='30*(1+ABN/sqrt(30*2))' L='2' 
+DELVTO='AVT0N/sqrt(30*2)'
.ENDS NMOSx-X_10

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_5 d g s
MPMOSf@0 d g s vdd pch W='30*(1+ABP/sqrt(30*2))' L='2'  
+DELVTO='AVT0P/sqrt(30*2)'
.ENDS PMOSx-X_5

*** CELL: redFour:invLT{sch}
.SUBCKT invLT-X_5 in out
XNMOS@0 out in gnd NMOSx-X_10
XPMOS@0 out in vdd PMOSx-X_5
.ENDS invLT-X_5

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-124_4-R_34_667m a b
Ccap@0 gnd net@14 0.456f
Ccap@1 gnd net@8 0.456f
Ccap@2 gnd net@11 0.456f
Rres@0 net@14 a 0.719
Rres@1 net@11 net@14 1.438
Rres@2 b net@8 0.719
Rres@3 net@8 net@11 1.438
.ENDS wire-C_0_011f-124_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-124_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-124_4-R_34_667m
.ENDS wire90-124_4-layer_1-width_3

*** CELL: latchPartsK:latchPointF{sch}
.SUBCKT latchPointF hcl in[1] x[F] x[T]
XPMOSx@0 in[1] hcl x[T] NMOSx-X_3
XPMOSx@1 net@8 hcl x[F] NMOSx-X_6
Xinv@0 in[1] net@105 invLT-X_5
Xwire90@0 net@105 net@8 wire90-124_4-layer_1-width_3
.ENDS latchPointF

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-146_1-R_34_667m a b
Ccap@0 gnd net@14 0.536f
Ccap@1 gnd net@8 0.536f
Ccap@2 gnd net@11 0.536f
Rres@0 net@14 a 0.844
Rres@1 net@11 net@14 1.688
Rres@2 b net@8 0.844
Rres@3 net@8 net@11 1.688
.ENDS wire-C_0_011f-146_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-146_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-146_1-R_34_667m
.ENDS wire90-146_1-layer_1-width_3

*** CELL: latchesK:raw1inLatchF{sch}
.SUBCKT raw1inLatchF hcl in[1] out[F]
XlatchFlo@0 out[F] net@58 latchKeep
XlatchPoi@0 hcl in[1] out[F] net@45 latchPointF
Xwire90@0 net@45 net@58 wire90-146_1-layer_1-width_3
.ENDS raw1inLatchF

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_20 d g s
MNMOSf@0 d g s gnd nch W='60*(1+ABN/sqrt(60*2))' L='2' 
+DELVTO='AVT0N/sqrt(60*2)'
.ENDS NMOSx-X_20

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_20 d g s
MPMOSf@0 d g s vdd pch W='120*(1+ABP/sqrt(120*2))' L='2'  
+DELVTO='AVT0P/sqrt(120*2)'
.ENDS PMOSx-X_20

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_20 in out
XNMOS@0 out in gnd NMOSx-X_20
XPMOS@0 out in vdd PMOSx-X_20
.ENDS inv-X_20

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_60 d g s
MNMOSf@0 d g s gnd nch W='180*(1+ABN/sqrt(180*2))' L='2' 
+DELVTO='AVT0N/sqrt(180*2)'
.ENDS NMOSx-X_60

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_60 d g s
MPMOSf@0 d g s vdd pch W='360*(1+ABP/sqrt(360*2))' L='2'  
+DELVTO='AVT0P/sqrt(360*2)'
.ENDS PMOSx-X_60

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_60 in out
XNMOS@0 out in gnd NMOSx-X_60
XPMOS@0 out in vdd PMOSx-X_60
.ENDS inv-X_60

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-294_8-R_34_667m a b
Ccap@0 gnd net@14 1.081f
Ccap@1 gnd net@8 1.081f
Ccap@2 gnd net@11 1.081f
Rres@0 net@14 a 1.703
Rres@1 net@11 net@14 3.407
Rres@2 b net@8 1.703
Rres@3 net@8 net@11 3.407
.ENDS wire-C_0_011f-294_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-294_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-294_8-R_34_667m
.ENDS wire90-294_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-242_1-R_34_667m a b
Ccap@0 gnd net@14 0.888f
Ccap@1 gnd net@8 0.888f
Ccap@2 gnd net@11 0.888f
Rres@0 net@14 a 1.399
Rres@1 net@11 net@14 2.798
Rres@2 b net@8 1.399
Rres@3 net@8 net@11 2.798
.ENDS wire-C_0_011f-242_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-242_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-242_1-R_34_667m
.ENDS wire90-242_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-546_2-R_34_667m a b
Ccap@0 gnd net@14 2.003f
Ccap@1 gnd net@8 2.003f
Ccap@2 gnd net@11 2.003f
Rres@0 net@14 a 3.156
Rres@1 net@11 net@14 6.312
Rres@2 b net@8 3.156
Rres@3 net@8 net@11 6.312
.ENDS wire-C_0_011f-546_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-546_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-546_2-R_34_667m
.ENDS wire90-546_2-layer_1-width_3

*** CELL: latchesK:latch1in60C{sch}
.SUBCKT latch1in60C hcl inS[1] outS[1]
Xhi2inLat@0 hcl inS[1] net@14 raw1inLatchF
XinvLT@0 net@15 net@18 invLT-X_5
XinvLT@1 net@16 net@19 inv-X_20
XinvLT@2 net@17 outS[1] inv-X_60
Xwire90@0 net@14 net@15 wire90-294_8-layer_1-width_3
Xwire90@1 net@18 net@16 wire90-242_1-layer_1-width_3
Xwire90@2 net@19 net@17 wire90-546_2-layer_1-width_3
.ENDS latch1in60C

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2565-R_26m a b
Ccap@0 gnd net@14 9.405f
Ccap@1 gnd net@8 9.405f
Ccap@2 gnd net@11 9.405f
Rres@0 net@14 a 11.115
Rres@1 net@11 net@14 22.23
Rres@2 b net@8 11.115
Rres@3 net@8 net@11 22.23
.ENDS wire-C_0_011f-2565-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2565-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2565-R_26m
.ENDS wire90-2565-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-834-R_26m a b
Ccap@0 gnd net@14 3.058f
Ccap@1 gnd net@8 3.058f
Ccap@2 gnd net@11 3.058f
Rres@0 net@14 a 3.614
Rres@1 net@11 net@14 7.228
Rres@2 b net@8 3.614
Rres@3 net@8 net@11 7.228
.ENDS wire-C_0_011f-834-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-834-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-834-R_26m
.ENDS wire90-834-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2791-R_26m a b
Ccap@0 gnd net@14 10.234f
Ccap@1 gnd net@8 10.234f
Ccap@2 gnd net@11 10.234f
Rres@0 net@14 a 12.094
Rres@1 net@11 net@14 24.189
Rres@2 b net@8 12.094
Rres@3 net@8 net@11 24.189
.ENDS wire-C_0_011f-2791-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2791-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2791-R_26m
.ENDS wire90-2791-layer_1-width_4

*** CELL: registersJ:all1in52{sch}
.SUBCKT all1in52 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] 
+ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] 
+aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] 
+aout[8] aout[9] aout[T] fire in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
+in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] 
+in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] 
+in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] 
+out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] 
+out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] 
+out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[37] out[3] 
+out[4] out[5] out[6] out[7] out[8] out[9]
XdataDriv@0 ain[T] net@90 net@81 dataDriver70
XhiL[1] net@41 in[1] out[1] latch1in60C
XhiL[2] net@41 in[2] out[2] latch1in60C
XhiL[3] net@41 in[3] out[3] latch1in60C
XhiL[4] net@41 in[4] out[4] latch1in60C
XhiL[5] net@41 in[5] out[5] latch1in60C
XhiL[6] net@41 in[6] out[6] latch1in60C
XhiL[7] net@41 in[7] out[7] latch1in60C
XhiL[8] net@41 in[8] out[8] latch1in60C
XhiL[9] net@41 in[9] out[9] latch1in60C
XhiL[10] net@41 in[10] out[10] latch1in60C
XhiL[11] net@41 in[11] out[11] latch1in60C
XhiL[12] net@41 in[12] out[12] latch1in60C
XhiL[13] net@41 in[13] out[13] latch1in60C
XhiL[14] net@41 in[14] out[14] latch1in60C
XhiL[15] net@41 in[15] out[15] latch1in60C
XhiL[16] net@41 in[16] out[16] latch1in60C
XhiL[17] net@41 in[17] out[17] latch1in60C
XhiL[18] net@41 in[18] out[18] latch1in60C
XhiL[19] net@41 in[19] out[19] latch1in60C
XhiL[20] net@41 in[20] out[20] latch1in60C
XhiL[21] net@41 in[21] out[21] latch1in60C
XhiL[22] net@41 in[22] out[22] latch1in60C
XhiL[23] net@41 in[23] out[23] latch1in60C
XhiL[24] net@41 in[24] out[24] latch1in60C
XhiL[25] net@41 in[25] out[25] latch1in60C
XhiL[26] net@41 in[26] out[26] latch1in60C
XhiL[27] net@41 in[27] out[27] latch1in60C
XhiL[28] net@41 in[28] out[28] latch1in60C
XhiL[29] net@41 in[29] out[29] latch1in60C
XhiL[30] net@41 in[30] out[30] latch1in60C
XhiL[31] net@41 in[31] out[31] latch1in60C
XhiL[32] net@41 in[32] out[32] latch1in60C
XhiL[33] net@41 in[33] out[33] latch1in60C
XhiL[34] net@41 in[34] out[34] latch1in60C
XhiL[35] net@41 in[35] out[35] latch1in60C
XhiL[36] net@41 in[36] out[36] latch1in60C
XhiL[37] net@41 in[37] out[37] latch1in60C
Xlat[1] net@98 ain[1] aout[1] latch1in60C
Xlat[2] net@98 ain[2] aout[2] latch1in60C
Xlat[3] net@98 ain[3] aout[3] latch1in60C
Xlat[4] net@98 ain[4] aout[4] latch1in60C
Xlat[5] net@98 ain[5] aout[5] latch1in60C
Xlat[6] net@98 ain[6] aout[6] latch1in60C
Xlat[7] net@98 ain[7] aout[7] latch1in60C
Xlat[8] net@98 ain[8] aout[8] latch1in60C
Xlat[9] net@98 ain[9] aout[9] latch1in60C
Xlat[10] net@98 ain[10] aout[10] latch1in60C
Xlat[11] net@98 ain[11] aout[11] latch1in60C
Xlat[12] net@98 ain[12] aout[12] latch1in60C
Xlat[13] net@98 ain[13] aout[13] latch1in60C
Xlat[14] net@98 ain[14] aout[14] latch1in60C
Xlatch1in@0 net@90 ain[T] aout[T] latch1in60C
Xwire90@0 net@81 net@41 wire90-2565-layer_1-width_4
Xwire90@1 net@81 net@41 wire90-2565-layer_1-width_4
Xwire90@2 fire net@98 wire90-834-layer_1-width_4
Xwire90@3 net@98 net@90 wire90-2791-layer_1-width_4
.ENDS all1in52

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_10 d g s
MPMOSf@0 d g s vdd pch W='60*(1+ABP/sqrt(60*2))' L='2'  
+DELVTO='AVT0P/sqrt(60*2)'
.ENDS PMOSx-X_10

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_25 d g s
MPMOSf@0 d g s vdd pch W='150*(1+ABP/sqrt(150*2))' L='2'  
+DELVTO='AVT0P/sqrt(150*2)'
.ENDS PMOSx-X_25

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_50 d g s
MNMOSf@0 d g s gnd nch W='150*(1+ABN/sqrt(150*2))' L='2' 
+DELVTO='AVT0N/sqrt(150*2)'
.ENDS NMOSx-X_50

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_25 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_50
XNMOS@1 net@0 g gnd NMOSx-X_50
.ENDS nms2-X_25

*** CELL: redFour:nand2{sch}
.SUBCKT nand2-X_25 ina inb out
XPMOS@0 out ina vdd PMOSx-X_25
XPMOS@1 out inb vdd PMOSx-X_25
Xnms2@0 out ina inb nms2-X_25
.ENDS nand2-X_25

*** CELL: arbiterK:half2inArb{sch}
.SUBCKT half2inArb cross grant[B] inA req[B]
XNMOSx@0 vdd req[B] grant[B] PMOSx-X_10
XPMOSx@0 cross inA grant[B] NMOSx-X_10
Xnor2n@0 inA req[B] cross nand2-X_25
.ENDS half2inArb

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-830_7-R_34_667m a b
Ccap@0 gnd net@14 3.046f
Ccap@1 gnd net@8 3.046f
Ccap@2 gnd net@11 3.046f
Rres@0 net@14 a 4.8
Rres@1 net@11 net@14 9.599
Rres@2 b net@8 4.8
Rres@3 net@8 net@11 9.599
.ENDS wire-C_0_011f-830_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-830_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-830_7-R_34_667m
.ENDS wire90-830_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-834_6-R_34_667m a b
Ccap@0 gnd net@14 3.06f
Ccap@1 gnd net@8 3.06f
Ccap@2 gnd net@11 3.06f
Rres@0 net@14 a 4.822
Rres@1 net@11 net@14 9.644
Rres@2 b net@8 4.822
Rres@3 net@8 net@11 9.644
.ENDS wire-C_0_011f-834_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-834_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-834_6-R_34_667m
.ENDS wire90-834_6-layer_1-width_3

*** CELL: arbiterK:arbiter2{sch}
.SUBCKT arbiter2 grant[A] grant[B] req[A] req[B]
XhalfArb@2 net@12 grant[A] net@5 req[A] half2inArb
XhalfArb@3 net@13 grant[B] net@8 req[B] half2inArb
Xwire90@0 net@12 net@8 wire90-830_7-layer_1-width_3
Xwire90@1 net@5 net@13 wire90-834_6-layer_1-width_3
.ENDS arbiter2

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_100 d g s
MNMOSf@0 d g s gnd nch W='300*(1+ABN/sqrt(300*2))' L='2' 
+DELVTO='AVT0N/sqrt(300*2)'
.ENDS NMOSx-X_100

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_100 d g s
MPMOSf@0 d g s vdd pch W='600*(1+ABP/sqrt(600*2))' L='2'  
+DELVTO='AVT0P/sqrt(600*2)'
.ENDS PMOSx-X_100

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_100 in out
XNMOS@0 out in gnd NMOSx-X_100
XPMOS@0 out in vdd PMOSx-X_100
.ENDS inv-X_100

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_40 d g s
MNMOSf@0 d g s gnd nch W='120*(1+ABN/sqrt(120*2))' L='2' 
+DELVTO='AVT0N/sqrt(120*2)'
.ENDS NMOSx-X_40

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_20 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_40
XNMOS@1 net@0 g gnd NMOSx-X_40
.ENDS nms2-X_20

*** CELL: redFour:nms2_sy{sch}
.SUBCKT nms2_sy-X_40 d g g2
Xnms2@0 d g g2 nms2-X_20
Xnms2@1 d g2 g nms2-X_20
.ENDS nms2_sy-X_40

*** CELL: redFour:nand2LT_sy{sch}
.SUBCKT nand2LT_sy-X_40 ina inb out
XPMOS@0 out ina vdd PMOSx-X_20
XPMOS@1 out inb vdd PMOSx-X_20
Xnms2_sy@0 out ina inb nms2_sy-X_40
.ENDS nand2LT_sy-X_40

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-414-R_34_667m a b
Ccap@0 gnd net@14 1.518f
Ccap@1 gnd net@8 1.518f
Ccap@2 gnd net@11 1.518f
Rres@0 net@14 a 2.392
Rres@1 net@11 net@14 4.784
Rres@2 b net@8 2.392
Rres@3 net@8 net@11 4.784
.ENDS wire-C_0_011f-414-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-414-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-414-R_34_667m
.ENDS wire90-414-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-927-R_34_667m a b
Ccap@0 gnd net@14 3.399f
Ccap@1 gnd net@8 3.399f
Ccap@2 gnd net@11 3.399f
Rres@0 net@14 a 5.356
Rres@1 net@11 net@14 10.712
Rres@2 b net@8 5.356
Rres@3 net@8 net@11 10.712
.ENDS wire-C_0_011f-927-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-927-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-927-R_34_667m
.ENDS wire90-927-layer_1-width_3

*** CELL: centersJ:ctrAND2in100{sch}
.SUBCKT ctrAND2in100 inA inB out
Xinv@5 net@146 out inv-X_100
Xinv@6 inB net@135 inv-X_20
Xinv@7 inA net@139 inv-X_20
Xnand2LT_@0 net@140 net@136 net@144 nand2LT_sy-X_40
Xwire90@4 net@135 net@136 wire90-414-layer_1-width_3
Xwire90@5 net@144 net@146 wire90-927-layer_1-width_3
Xwire90@6 net@139 net@140 wire90-414-layer_1-width_3
.ENDS ctrAND2in100

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_10 in out
XNMOS@0 out in gnd NMOSx-X_10
XPMOS@0 out in vdd PMOSx-X_10
.ENDS inv-X_10

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_9_999 d g s
MPMOSf@0 d g s vdd pch W='59.994*(1+ABP/sqrt(59.994*2))' L='2'  
+DELVTO='AVT0P/sqrt(59.994*2)'
.ENDS PMOSx-X_9_999

*** CELL: redFour:pms3{sch}
.SUBCKT pms3-X_3_333 d g g2 g3
XPMOS@0 d g3 net@2 PMOSx-X_9_999
XPMOS@1 net@2 g2 net@5 PMOSx-X_9_999
XPMOS@2 net@5 g vdd PMOSx-X_9_999
.ENDS pms3-X_3_333

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-243_6-R_34_667m a b
Ccap@0 gnd net@14 0.893f
Ccap@1 gnd net@8 0.893f
Ccap@2 gnd net@11 0.893f
Rres@0 net@14 a 1.407
Rres@1 net@11 net@14 2.815
Rres@2 b net@8 1.407
Rres@3 net@8 net@11 2.815
.ENDS wire-C_0_011f-243_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-243_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-243_6-R_34_667m
.ENDS wire90-243_6-layer_1-width_3

*** CELL: driversJ:predDri60wMC{sch}
.SUBCKT predDri60wMC in mc pred
XNMOSx@0 pred in gnd NMOSx-X_60
XNMOSx@1 pred mc gnd NMOSx-X_10
Xinv@0 pred net@145 inv-X_10
Xpms3@0 pred mc in net@174 pms3-X_3_333
Xwire90@0 net@174 net@145 wire90-243_6-layer_1-width_3
.ENDS predDri60wMC

*** CELL: redFour:invLT{sch}
.SUBCKT invLT-X_10 in out
XNMOS@0 out in gnd NMOSx-X_20
XPMOS@0 out in vdd PMOSx-X_10
.ENDS invLT-X_10

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-282-R_34_667m a b
Ccap@0 gnd net@14 1.034f
Ccap@1 gnd net@8 1.034f
Ccap@2 gnd net@11 1.034f
Rres@0 net@14 a 1.629
Rres@1 net@11 net@14 3.259
Rres@2 b net@8 1.629
Rres@3 net@8 net@11 3.259
.ENDS wire-C_0_011f-282-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-282-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-282-R_34_667m
.ENDS wire90-282-layer_1-width_3

*** CELL: latchesK:latch1in10A{sch}
.SUBCKT latch1in10A hcl in[1] out[1]
Xhi2inLat@0 hcl in[1] net@19 raw1inLatchF
XinvLT@0 net@18 out[1] invLT-X_10
Xwire90@0 net@19 net@18 wire90-282-layer_1-width_3
.ENDS latch1in10A

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-145_9-R_34_667m a b
Ccap@0 gnd net@14 0.535f
Ccap@1 gnd net@8 0.535f
Ccap@2 gnd net@11 0.535f
Rres@0 net@14 a 0.843
Rres@1 net@11 net@14 1.686
Rres@2 b net@8 0.843
Rres@3 net@8 net@11 1.686
.ENDS wire-C_0_011f-145_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-145_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-145_9-R_34_667m
.ENDS wire90-145_9-layer_1-width_3

*** CELL: latchesK:raw2inLatchF{sch}
.SUBCKT raw2inLatchF hcl[A] hcl[B] inA[1] inB[1] out[F]
XlatchKee@0 out[F] net@63 latchKeep
XlatchPoi@0 hcl[A] inA[1] out[F] net@45 latchPointF
XlatchPoi@1 hcl[B] inB[1] out[F] net@45 latchPointF
Xwire90@0 net@45 net@63 wire90-145_9-layer_1-width_3
.ENDS raw2inLatchF

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-311_7-R_34_667m a b
Ccap@0 gnd net@14 1.143f
Ccap@1 gnd net@8 1.143f
Ccap@2 gnd net@11 1.143f
Rres@0 net@14 a 1.801
Rres@1 net@11 net@14 3.602
Rres@2 b net@8 1.801
Rres@3 net@8 net@11 3.602
.ENDS wire-C_0_011f-311_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-311_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-311_7-R_34_667m
.ENDS wire90-311_7-layer_1-width_3

*** CELL: latchesK:latch2in10Alo{sch}
.SUBCKT latch2in10Alo hcl[A] hcl[B] inA[1] inB[1] out[1]
Xhi2inLat@0 hcl[A] hcl[B] inA[1] inB[1] dataBar raw2inLatchF
XinvLT@0 net@15 out[1] invLT-X_10
Xwire90@0 dataBar net@15 wire90-311_7-layer_1-width_3
.ENDS latch2in10Alo

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-218_4-R_34_667m a b
Ccap@0 gnd net@14 0.801f
Ccap@1 gnd net@8 0.801f
Ccap@2 gnd net@11 0.801f
Rres@0 net@14 a 1.262
Rres@1 net@11 net@14 2.524
Rres@2 b net@8 1.262
Rres@3 net@8 net@11 2.524
.ENDS wire-C_0_011f-218_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-218_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-218_4-R_34_667m
.ENDS wire90-218_4-layer_1-width_3

*** CELL: scanJ:scanCellE{sch}
.SUBCKT scanCellE dIn[1] p1p p2p rd sin sout
Xlatch1in@0 p2p sin net@2 latch1in10A
Xlatch2in@0 p1p rd net@10 dIn[1] sout latch2in10Alo
Xwire90@0 net@2 net@10 wire90-218_4-layer_1-width_3
.ENDS scanCellE

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-297_6-R_34_667m a b
Ccap@0 gnd net@14 1.091f
Ccap@1 gnd net@8 1.091f
Ccap@2 gnd net@11 1.091f
Rres@0 net@14 a 1.719
Rres@1 net@11 net@14 3.439
Rres@2 b net@8 1.719
Rres@3 net@8 net@11 3.439
.ENDS wire-C_0_011f-297_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-297_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-297_6-R_34_667m
.ENDS wire90-297_6-layer_1-width_3

*** CELL: scanJ:scanEx2vert{sch}
.SUBCKT scanEx2vert dIn[1] dIn[2] mc sir[1] sir[2] sir[3] sir[4] sir[5] 
+sir[6] sir[7] sir[8] sor[1]
XscanCell@1 dIn[1] sir[3] sir[2] sir[5] sir[1] net@26 scanCellE
XscanCell@2 dIn[2] sir[3] sir[2] sir[5] net@27 sor[1] scanCellE
Xwire90@0 net@26 net@27 wire90-297_6-layer_1-width_3
.ENDS scanEx2vert

*** CELL: latchPartsK:latchPointFmcHI{sch}
.SUBCKT latchPointFmcHI mc x[F] x[T]
XPMOSx@0 gnd mc x[T] NMOSx-X_3
XPMOSx@1 vdd mc x[F] NMOSx-X_6
.ENDS latchPointFmcHI

*** CELL: latchesK:raw2inLatchFmc{sch}
.SUBCKT raw2inLatchFmc hcl inA[1] mc out[F]
XlatchKee@0 out[F] net@63 latchKeep
XlatchPoi@0 hcl inA[1] out[F] net@45 latchPointF
XlatchPoi@1 mc out[F] net@45 latchPointFmcHI
Xwire90@0 net@45 net@63 wire90-145_9-layer_1-width_3
.ENDS raw2inLatchFmc

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-283-R_34_667m a b
Ccap@0 gnd net@14 1.038f
Ccap@1 gnd net@8 1.038f
Ccap@2 gnd net@11 1.038f
Rres@0 net@14 a 1.635
Rres@1 net@11 net@14 3.27
Rres@2 b net@8 1.635
Rres@3 net@8 net@11 3.27
.ENDS wire-C_0_011f-283-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-283-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-283-R_34_667m
.ENDS wire90-283-layer_1-width_3

*** CELL: latchesK:latch2in10Alomc{sch}
.SUBCKT latch2in10Alomc hcl inA[1] mc out[1]
Xhi2inLat@0 hcl inA[1] mc dataBar raw2inLatchFmc
XinvLT@0 net@20 out[1] invLT-X_10
Xwire90@0 dataBar net@20 wire90-283-layer_1-width_3
.ENDS latch2in10Alomc

*** CELL: scanJ:scanCellF{sch}
.SUBCKT scanCellF dout[1] mc p1p p2p rd sin sout wr
Xlatch1in@0 p2p sin net@2 latch1in10A
Xlatch2in@0 p1p rd net@10 dout[1] sout latch2in10Alo
Xlatch2in@1 wr sout mc dout[1] latch2in10Alomc
Xwire90@0 net@2 net@10 wire90-297_6-layer_1-width_3
.ENDS scanCellF

*** CELL: scanJ:scanFx3hor{sch}
.SUBCKT scanFx3hor dout[1] dout[2] dout[3] sic[1] sic[2] sic[3] sic[4] sic[5] 
+sic[6] sic[7] sic[8] sic[9] soc[1]
XscanCell@1 dout[2] sic[9] sic[3] sic[2] sic[5] net@32 net@31 sic[4] 
+scanCellF
XscanCell@2 dout[1] sic[9] sic[3] sic[2] sic[5] sic[1] net@30 sic[4] 
+scanCellF
XscanCell@3 dout[3] sic[9] sic[3] sic[2] sic[5] net@33 soc[1] sic[4] 
+scanCellF
Xwire90@0 net@30 net@32 wire90-297_6-layer_1-width_3
Xwire90@1 net@31 net@33 wire90-297_6-layer_1-width_3
.ENDS scanFx3hor

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_5 d g s
MNMOSf@0 d g s gnd nch W='15*(1+ABN/sqrt(15*2))' L='2' 
+DELVTO='AVT0N/sqrt(15*2)'
.ENDS NMOSx-X_5

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_5 in out
XNMOS@0 out in gnd NMOSx-X_5
XPMOS@0 out in vdd PMOSx-X_5
.ENDS inv-X_5

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_16 d g s
MNMOSf@0 d g s gnd nch W='48*(1+ABN/sqrt(48*2))' L='2' 
+DELVTO='AVT0N/sqrt(48*2)'
.ENDS NMOSx-X_16

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_8 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_16
XNMOS@1 net@0 g gnd NMOSx-X_16
.ENDS nms2-X_8

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_10 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_20
XNMOS@1 net@0 g gnd NMOSx-X_20
.ENDS nms2-X_10

*** CELL: redFour:nms2_sy{sch}
.SUBCKT nms2_sy-X_20 d g g2
Xnms2@0 d g g2 nms2-X_10
Xnms2@1 d g2 g nms2-X_10
.ENDS nms2_sy-X_20

*** CELL: redFour:nand2_sy{sch}
.SUBCKT nand2_sy-X_20 ina inb out
XPMOS@0 out inb vdd PMOSx-X_20
XPMOS@1 out ina vdd PMOSx-X_20
Xnms2_sy@0 out ina inb nms2_sy-X_20
.ENDS nand2_sy-X_20

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-627_9-R_34_667m a b
Ccap@0 gnd net@14 2.302f
Ccap@1 gnd net@8 2.302f
Ccap@2 gnd net@11 2.302f
Rres@0 net@14 a 3.628
Rres@1 net@11 net@14 7.256
Rres@2 b net@8 3.628
Rres@3 net@8 net@11 7.256
.ENDS wire-C_0_011f-627_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-627_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-627_9-R_34_667m
.ENDS wire90-627_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-124_7-R_34_667m a b
Ccap@0 gnd net@14 0.457f
Ccap@1 gnd net@8 0.457f
Ccap@2 gnd net@11 0.457f
Rres@0 net@14 a 0.72
Rres@1 net@11 net@14 1.441
Rres@2 b net@8 0.72
Rres@3 net@8 net@11 1.441
.ENDS wire-C_0_011f-124_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-124_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-124_7-R_34_667m
.ENDS wire90-124_7-layer_1-width_3

*** CELL: driversJ:sucANDdri60{sch}
.SUBCKT sucANDdri60 inA inB succ
XPMOSx@0 succ net@51 vdd PMOSx-X_60
Xinv@0 succ net@71 inv-X_5
Xnms2@0 succ net@51 net@72 nms2-X_8
Xnor2_sy@0 inA inB net@67 nand2_sy-X_20
Xwire90@0 net@67 net@51 wire90-627_9-layer_1-width_3
Xwire90@1 net@72 net@71 wire90-124_7-layer_1-width_3
.ENDS sucANDdri60

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-541-R_34_667m a b
Ccap@0 gnd net@14 1.984f
Ccap@1 gnd net@8 1.984f
Ccap@2 gnd net@11 1.984f
Rres@0 net@14 a 3.126
Rres@1 net@11 net@14 6.252
Rres@2 b net@8 3.126
Rres@3 net@8 net@11 6.252
.ENDS wire-C_0_011f-541-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-541-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-541-R_34_667m
.ENDS wire90-541-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-509_3-R_34_667m a b
Ccap@0 gnd net@14 1.867f
Ccap@1 gnd net@8 1.867f
Ccap@2 gnd net@11 1.867f
Rres@0 net@14 a 2.943
Rres@1 net@11 net@14 5.885
Rres@2 b net@8 2.943
Rres@3 net@8 net@11 5.885
.ENDS wire-C_0_011f-509_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-509_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-509_3-R_34_667m
.ENDS wire90-509_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-602_3-R_34_667m a b
Ccap@0 gnd net@14 2.208f
Ccap@1 gnd net@8 2.208f
Ccap@2 gnd net@11 2.208f
Rres@0 net@14 a 3.48
Rres@1 net@11 net@14 6.96
Rres@2 b net@8 3.48
Rres@3 net@8 net@11 6.96
.ENDS wire-C_0_011f-602_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-602_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-602_3-R_34_667m
.ENDS wire90-602_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-440_5-R_34_667m a b
Ccap@0 gnd net@14 1.615f
Ccap@1 gnd net@8 1.615f
Ccap@2 gnd net@11 1.615f
Rres@0 net@14 a 2.545
Rres@1 net@11 net@14 5.09
Rres@2 b net@8 2.545
Rres@3 net@8 net@11 5.09
.ENDS wire-C_0_011f-440_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-440_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-440_5-R_34_667m
.ENDS wire90-440_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-397_6-R_34_667m a b
Ccap@0 gnd net@14 1.458f
Ccap@1 gnd net@8 1.458f
Ccap@2 gnd net@11 1.458f
Rres@0 net@14 a 2.297
Rres@1 net@11 net@14 4.594
Rres@2 b net@8 2.297
Rres@3 net@8 net@11 4.594
.ENDS wire-C_0_011f-397_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-397_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-397_6-R_34_667m
.ENDS wire90-397_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-343_6-R_34_667m a b
Ccap@0 gnd net@14 1.26f
Ccap@1 gnd net@8 1.26f
Ccap@2 gnd net@11 1.26f
Rres@0 net@14 a 1.985
Rres@1 net@11 net@14 3.97
Rres@2 b net@8 1.985
Rres@3 net@8 net@11 3.97
.ENDS wire-C_0_011f-343_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-343_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-343_6-R_34_667m
.ENDS wire90-343_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-831_5-R_34_667m a b
Ccap@0 gnd net@14 3.049f
Ccap@1 gnd net@8 3.049f
Ccap@2 gnd net@11 3.049f
Rres@0 net@14 a 4.804
Rres@1 net@11 net@14 9.608
Rres@2 b net@8 4.804
Rres@3 net@8 net@11 9.608
.ENDS wire-C_0_011f-831_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-831_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-831_5-R_34_667m
.ENDS wire90-831_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-646_3-R_34_667m a b
Ccap@0 gnd net@14 2.37f
Ccap@1 gnd net@8 2.37f
Ccap@2 gnd net@11 2.37f
Rres@0 net@14 a 3.734
Rres@1 net@11 net@14 7.468
Rres@2 b net@8 3.734
Rres@3 net@8 net@11 7.468
.ENDS wire-C_0_011f-646_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-646_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-646_3-R_34_667m
.ENDS wire90-646_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1092_8-R_34_667m a b
Ccap@0 gnd net@14 4.007f
Ccap@1 gnd net@8 4.007f
Ccap@2 gnd net@11 4.007f
Rres@0 net@14 a 6.314
Rres@1 net@11 net@14 12.628
Rres@2 b net@8 6.314
Rres@3 net@8 net@11 12.628
.ENDS wire-C_0_011f-1092_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1092_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1092_8-R_34_667m
.ENDS wire90-1092_8-layer_1-width_3

*** CELL: gaspJ:gaspDrain{sch}
.SUBCKT gaspDrain fire[A] pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] 
+sic[7] sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] 
+sir[9] soc[1] sor[1] succ
Xarbiter2@0 net@374 net@353 pred net@375 arbiter2
Xcenter3i@0 net@241 succ fire[A] ctrAND2in100
Xinv@0 net@357 net@409 inv-X_10
Xinv@1 go net@360 inv-X_10
Xinv@3 silent net@333 inv-X_20
XpredDri6@0 fire[A] net@364 pred predDri60wMC
XscanEx2v@1 pred stopped sir[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] 
+sir[7] sir[8] sor[1] scanEx2vert
XscanFx3h@0 net@467 net@447 net@466 sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] 
+sic[7] sic[8] sic[9] soc[1] scanFx3hor
XsucANDdr@0 net@338 fire[A] succ sucANDdri60
Xwire90@1 net@374 net@241 wire90-541-layer_1-width_3
Xwire90@7 net@375 net@360 wire90-509_3-layer_1-width_3
Xwire90@8 net@364 clear wire90-602_3-layer_1-width_3
Xwire90@9 net@333 net@338 wire90-440_5-layer_1-width_3
Xwire90@10 net@357 net@353 wire90-397_6-layer_1-width_3
Xwire90@11 stopped net@409 wire90-343_6-layer_1-width_3
Xwire90@12 net@466 clear wire90-831_5-layer_1-width_3
Xwire90@13 net@447 silent wire90-646_3-layer_1-width_3
Xwire90@14 net@467 go wire90-1092_8-layer_1-width_3
.ENDS gaspDrain

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1673-R_34_667m a b
Ccap@0 gnd net@14 6.134f
Ccap@1 gnd net@8 6.134f
Ccap@2 gnd net@11 6.134f
Rres@0 net@14 a 9.666
Rres@1 net@11 net@14 19.332
Rres@2 b net@8 9.666
Rres@3 net@8 net@11 19.332
.ENDS wire-C_0_011f-1673-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1673-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1673-R_34_667m
.ENDS wire90-1673-layer_1-width_3

*** CELL: stagesJ:drainStage{sch}
.SUBCKT drainStage ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] 
+aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] 
+aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sic[1] sic[2] 
+sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] 
+sir[5] sir[6] sir[7] sir[8] sir[9] soc[1] sor[1] succ
Xall1in52@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] 
+ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] 
+aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] 
+aout[8] aout[9] aout[T] net@2 in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] all1in52
XgaspPlai@0 net@0 pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] 
+sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] 
+soc[1] sor[1] succ gaspDrain
Xwire90@0 net@0 net@2 wire90-1673-layer_1-width_3
.ENDS drainStage

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-295_8-R_34_667m a b
Ccap@0 gnd net@14 1.085f
Ccap@1 gnd net@8 1.085f
Ccap@2 gnd net@11 1.085f
Rres@0 net@14 a 1.709
Rres@1 net@11 net@14 3.418
Rres@2 b net@8 1.709
Rres@3 net@8 net@11 3.418
.ENDS wire-C_0_011f-295_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-295_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-295_8-R_34_667m
.ENDS wire90-295_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-555_8-R_34_667m a b
Ccap@0 gnd net@14 2.038f
Ccap@1 gnd net@8 2.038f
Ccap@2 gnd net@11 2.038f
Rres@0 net@14 a 3.211
Rres@1 net@11 net@14 6.423
Rres@2 b net@8 3.211
Rres@3 net@8 net@11 6.423
.ENDS wire-C_0_011f-555_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-555_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-555_8-R_34_667m
.ENDS wire90-555_8-layer_1-width_3

*** CELL: latchesK:latch2in60C{sch}
.SUBCKT latch2in60C hcl[A] hcl[B] inA[1] inB[1] outS[1]
Xhi2inLat@0 hcl[A] hcl[B] inA[1] inB[1] net@14 raw2inLatchF
XinvLT@0 net@15 net@18 invLT-X_5
XinvLT@1 net@16 net@19 inv-X_20
XinvLT@2 net@17 outS[1] inv-X_60
Xwire90@0 net@14 net@15 wire90-295_8-layer_1-width_3
Xwire90@1 net@18 net@16 wire90-242_1-layer_1-width_3
Xwire90@2 net@19 net@17 wire90-555_8-layer_1-width_3
.ENDS latch2in60C

*** CELL: latchGroupsK:latchWscan{sch}
.SUBCKT latchWscan hcl in[1] out[1] p1p p2p rd sin sout wr
Xhi2inLat@1 hcl wr in[1] sout out[1] latch2in60C
XscanCell@2 out[1] p1p p2p rd sin sout scanCellE
.ENDS latchWscan

*** CELL: registersJ:addr1in14scan{sch}
.SUBCKT addr1in14scan ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] aout[10] aout[11] aout[12] 
+aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] 
+aout[8] aout[9] fire p1p p2p rd sin sout wrA
Xls[1] fire ain[1] aout[1] p1p p2p rd sin xin[2] wrA latchWscan
Xls[2] fire ain[2] aout[2] p1p p2p rd xin[2] xin[3] wrA latchWscan
Xls[3] fire ain[3] aout[3] p1p p2p rd xin[3] xin[4] wrA latchWscan
Xls[4] fire ain[4] aout[4] p1p p2p rd xin[4] xin[5] wrA latchWscan
Xls[5] fire ain[5] aout[5] p1p p2p rd xin[5] xin[6] wrA latchWscan
Xls[6] fire ain[6] aout[6] p1p p2p rd xin[6] xin[7] wrA latchWscan
Xls[7] fire ain[7] aout[7] p1p p2p rd xin[7] xin[8] wrA latchWscan
Xls[8] fire ain[8] aout[8] p1p p2p rd xin[8] xin[9] wrA latchWscan
Xls[9] fire ain[9] aout[9] p1p p2p rd xin[9] xin[10] wrA latchWscan
Xls[10] fire ain[10] aout[10] p1p p2p rd xin[10] xin[11] wrA latchWscan
Xls[11] fire ain[11] aout[11] p1p p2p rd xin[11] xin[12] wrA latchWscan
Xls[12] fire ain[12] aout[12] p1p p2p rd xin[12] xin[13] wrA latchWscan
Xls[13] fire ain[13] aout[13] p1p p2p rd xin[13] xin[14] wrA latchWscan
Xls[14] fire ain[14] aout[14] p1p p2p rd xin[14] sout wrA latchWscan
.ENDS addr1in14scan

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_40 d g s
MPMOSf@0 d g s vdd pch W='240*(1+ABP/sqrt(240*2))' L='2'  
+DELVTO='AVT0P/sqrt(240*2)'
.ENDS PMOSx-X_40

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_40 in out
XNMOS@0 out in gnd NMOSx-X_40
XPMOS@0 out in vdd PMOSx-X_40
.ENDS inv-X_40

*** CELL: scanJ:scanTwinAmp{sch}
.SUBCKT scanTwinAmp in[1] outA[1] outB[1]
Xinv@0 net@2 outA[1] inv-X_20
Xinv@1 in[1] net@1 inv-X_10
Xinv@2 net@2 outB[1] inv-X_40
Xwire90@0 net@1 net@2 wire90-947_7-layer_1-width_3
.ENDS scanTwinAmp

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2534-R_34_667m a b
Ccap@0 gnd net@14 9.291f
Ccap@1 gnd net@8 9.291f
Ccap@2 gnd net@11 9.291f
Rres@0 net@14 a 14.641
Rres@1 net@11 net@14 29.282
Rres@2 b net@8 14.641
Rres@3 net@8 net@11 29.282
.ENDS wire-C_0_011f-2534-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2534-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2534-R_34_667m
.ENDS wire90-2534-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-918_6-R_34_667m a b
Ccap@0 gnd net@14 3.368f
Ccap@1 gnd net@8 3.368f
Ccap@2 gnd net@11 3.368f
Rres@0 net@14 a 5.307
Rres@1 net@11 net@14 10.615
Rres@2 b net@8 5.307
Rres@3 net@8 net@11 10.615
.ENDS wire-C_0_011f-918_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-918_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-918_6-R_34_667m
.ENDS wire90-918_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1177-R_34_667m a b
Ccap@0 gnd net@14 4.316f
Ccap@1 gnd net@8 4.316f
Ccap@2 gnd net@11 4.316f
Rres@0 net@14 a 6.8
Rres@1 net@11 net@14 13.601
Rres@2 b net@8 6.8
Rres@3 net@8 net@11 13.601
.ENDS wire-C_0_011f-1177-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1177-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1177-R_34_667m
.ENDS wire90-1177-layer_1-width_3

*** CELL: registersJ:data1in38scan{sch}
.SUBCKT data1in38scan ain[T] aout[T] fire in[10] in[11] in[12] in[13] in[14] 
+in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
+in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
+in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] p1p p2p rd 
+scanFromAddress scanToAddr sid[1] sid[2] sid[3] sid[4] sid[5] sid[6] sid[7] 
+sid[8] sid[9] sod[2] sod[3] sod[4] sod[5] wrA
XdataDriv@0 ain[T] fire net@120 dataDriver70
XdataDriv@1 net@115 net@137 wrD dataDriver70
XdataDriv@2 xin[1] wrr wrA dataDriver70
XlatchWsc@1 fire ain[T] aout[T] p1p p2p rd xin[38] scanToAddr wrA latchWscan
Xls[1] net@124 in[1] out[1] p1p p2p rd xin[1] xin[2] wrD latchWscan
Xls[2] net@124 in[2] out[2] p1p p2p rd xin[2] xin[3] wrD latchWscan
Xls[3] net@124 in[3] out[3] p1p p2p rd xin[3] xin[4] wrD latchWscan
Xls[4] net@124 in[4] out[4] p1p p2p rd xin[4] xin[5] wrD latchWscan
Xls[5] net@124 in[5] out[5] p1p p2p rd xin[5] xin[6] wrD latchWscan
Xls[6] net@124 in[6] out[6] p1p p2p rd xin[6] xin[7] wrD latchWscan
Xls[7] net@124 in[7] out[7] p1p p2p rd xin[7] xin[8] wrD latchWscan
Xls[8] net@124 in[8] out[8] p1p p2p rd xin[8] xin[9] wrD latchWscan
Xls[9] net@124 in[9] out[9] p1p p2p rd xin[9] xin[10] wrD latchWscan
Xls[10] net@124 in[10] out[10] p1p p2p rd xin[10] xin[11] wrD latchWscan
Xls[11] net@124 in[11] out[11] p1p p2p rd xin[11] xin[12] wrD latchWscan
Xls[12] net@124 in[12] out[12] p1p p2p rd xin[12] xin[13] wrD latchWscan
Xls[13] net@124 in[13] out[13] p1p p2p rd xin[13] xin[14] wrD latchWscan
Xls[14] net@124 in[14] out[14] p1p p2p rd xin[14] xin[15] wrD latchWscan
Xls[15] net@124 in[15] out[15] p1p p2p rd xin[15] xin[16] wrD latchWscan
Xls[16] net@124 in[16] out[16] p1p p2p rd xin[16] xin[17] wrD latchWscan
Xls[17] net@124 in[17] out[17] p1p p2p rd xin[17] xin[18] wrD latchWscan
Xls[18] net@124 in[18] out[18] p1p p2p rd xin[18] xin[19] wrD latchWscan
Xls[19] net@124 in[19] out[19] p1p p2p rd xin[19] xin[20] wrD latchWscan
Xls[20] net@124 in[20] out[20] p1p p2p rd xin[20] xin[21] wrD latchWscan
Xls[21] net@124 in[21] out[21] p1p p2p rd xin[21] xin[22] wrD latchWscan
Xls[22] net@124 in[22] out[22] p1p p2p rd xin[22] xin[23] wrD latchWscan
Xls[23] net@124 in[23] out[23] p1p p2p rd xin[23] xin[24] wrD latchWscan
Xls[24] net@124 in[24] out[24] p1p p2p rd xin[24] xin[25] wrD latchWscan
Xls[25] net@124 in[25] out[25] p1p p2p rd xin[25] xin[26] wrD latchWscan
Xls[26] net@124 in[26] out[26] p1p p2p rd xin[26] xin[27] wrD latchWscan
Xls[27] net@124 in[27] out[27] p1p p2p rd xin[27] xin[28] wrD latchWscan
Xls[28] net@124 in[28] out[28] p1p p2p rd xin[28] xin[29] wrD latchWscan
Xls[29] net@124 in[29] out[29] p1p p2p rd xin[29] xin[30] wrD latchWscan
Xls[30] net@124 in[30] out[30] p1p p2p rd xin[30] xin[31] wrD latchWscan
Xls[31] net@124 in[31] out[31] p1p p2p rd xin[31] xin[32] wrD latchWscan
Xls[32] net@124 in[32] out[32] p1p p2p rd xin[32] xin[33] wrD latchWscan
Xls[33] net@124 in[33] out[33] p1p p2p rd xin[33] xin[34] wrD latchWscan
Xls[34] net@124 in[34] out[34] p1p p2p rd xin[34] xin[35] wrD latchWscan
Xls[35] net@124 in[35] out[35] p1p p2p rd xin[35] xin[36] wrD latchWscan
Xls[36] net@124 in[36] out[36] p1p p2p rd xin[36] xin[37] wrD latchWscan
Xls[37] net@124 in[37] out[37] p1p p2p rd xin[37] xin[38] wrD latchWscan
Xsa[1] sid[2] sod[2] p2p scanTwinAmp
Xsa[2] sid[3] sod[3] p1p scanTwinAmp
Xsa[3] sid[4] sod[4] wrr scanTwinAmp
Xsa[4] sid[5] sod[5] rd scanTwinAmp
XscanCell@0 scanCell@0_dIn[1] p1p p2p rd sid[1] net@130 scanCellE
XscanCell@1 scanCell@1_dIn[1] p1p p2p rd net@115 xin[1] scanCellE
Xwire90@0 net@124 net@120 wire90-2534-layer_1-width_3
Xwire90@2 net@124 net@120 wire90-2534-layer_1-width_3
Xwire90@3 net@130 net@115 wire90-918_6-layer_1-width_3
Xwire90@5 net@137 wrr wire90-1177-layer_1-width_3
.ENDS data1in38scan

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2975_6-R_34_667m a b
Ccap@0 gnd net@14 10.911f
Ccap@1 gnd net@8 10.911f
Ccap@2 gnd net@11 10.911f
Rres@0 net@14 a 17.192
Rres@1 net@11 net@14 34.385
Rres@2 b net@8 17.192
Rres@3 net@8 net@11 34.385
.ENDS wire-C_0_011f-2975_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2975_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2975_6-R_34_667m
.ENDS wire90-2975_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2989_9-R_34_667m a b
Ccap@0 gnd net@14 10.963f
Ccap@1 gnd net@8 10.963f
Ccap@2 gnd net@11 10.963f
Rres@0 net@14 a 17.275
Rres@1 net@11 net@14 34.55
Rres@2 b net@8 17.275
Rres@3 net@8 net@11 34.55
.ENDS wire-C_0_011f-2989_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2989_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2989_9-R_34_667m
.ENDS wire90-2989_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-12168-R_34_667m a b
Ccap@0 gnd net@14 44.616f
Ccap@1 gnd net@8 44.616f
Ccap@2 gnd net@11 44.616f
Rres@0 net@14 a 70.304
Rres@1 net@11 net@14 140.608
Rres@2 b net@8 70.304
Rres@3 net@8 net@11 140.608
.ENDS wire-C_0_011f-12168-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-12168-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-12168-R_34_667m
.ENDS wire90-12168-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-12492-R_34_667m a b
Ccap@0 gnd net@14 45.804f
Ccap@1 gnd net@8 45.804f
Ccap@2 gnd net@11 45.804f
Rres@0 net@14 a 72.176
Rres@1 net@11 net@14 144.352
Rres@2 b net@8 72.176
Rres@3 net@8 net@11 144.352
.ENDS wire-C_0_011f-12492-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-12492-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-12492-R_34_667m
.ENDS wire90-12492-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3927_5-R_34_667m a b
Ccap@0 gnd net@14 14.401f
Ccap@1 gnd net@8 14.401f
Ccap@2 gnd net@11 14.401f
Rres@0 net@14 a 22.692
Rres@1 net@11 net@14 45.384
Rres@2 b net@8 22.692
Rres@3 net@8 net@11 45.384
.ENDS wire-C_0_011f-3927_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3927_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3927_5-R_34_667m
.ENDS wire90-3927_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-11401_6-R_34_667m a b
Ccap@0 gnd net@14 41.806f
Ccap@1 gnd net@8 41.806f
Ccap@2 gnd net@11 41.806f
Rres@0 net@14 a 65.876
Rres@1 net@11 net@14 131.752
Rres@2 b net@8 65.876
Rres@3 net@8 net@11 131.752
.ENDS wire-C_0_011f-11401_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-11401_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-11401_6-R_34_667m
.ENDS wire90-11401_6-layer_1-width_3

*** CELL: registersJ:all1in52scan{sch}
.SUBCKT all1in52scan ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] 
+aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] 
+aout[7] aout[8] aout[9] aout[T] fire in[10] in[11] in[12] in[13] in[14] 
+in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
+in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
+in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] sid[1] 
+sid[2] sid[3] sid[4] sid[5] sid[6] sid[7] sid[8] sid[9] sod[1] sod[2] sod[3] 
+sod[4] sod[5]
Xaddr1in1@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] 
+ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] aout[10] aout[11] aout[12] aout[13] 
+aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] aout[8] 
+aout[9] fire p1p p2p rd net@4 net@26 wrA addr1in14scan
Xdata1in3@0 ain[T] aout[T] fire in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] p1p p2p rd sod[1] 
+net@1 sid[1] sid[2] sid[3] sid[4] sid[5] sid[6] sid[7] sid[8] sid[9] sod[2] 
+sod[3] sod[4] sod[5] wrA data1in38scan
Xwire90@0 net@26 sod[1] wire90-2975_6-layer_1-width_3
Xwire90@1 net@4 net@1 wire90-2989_9-layer_1-width_3
Xwire90@2 wire90@2_a p2p wire90-12168-layer_1-width_3
Xwire90@3 wire90@3_a p1p wire90-12492-layer_1-width_3
Xwire90@4 wire90@4_a wrA wire90-3927_5-layer_1-width_3
Xwire90@5 wire90@5_a rd wire90-11401_6-layer_1-width_3
.ENDS all1in52scan

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_14 d g s
MNMOSf@0 d g s gnd nch W='42*(1+ABN/sqrt(42*2))' L='2' 
+DELVTO='AVT0N/sqrt(42*2)'
.ENDS NMOSx-X_14

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_42 d g s
MPMOSf@0 d g s vdd pch W='252*(1+ABP/sqrt(252*2))' L='2'  
+DELVTO='AVT0P/sqrt(252*2)'
.ENDS PMOSx-X_42

*** CELL: redFour:pms3{sch}
.SUBCKT pms3-X_14 d g g2 g3
XPMOS@0 d g3 net@2 PMOSx-X_42
XPMOS@1 net@2 g2 net@5 PMOSx-X_42
XPMOS@2 net@5 g vdd PMOSx-X_42
.ENDS pms3-X_14

*** CELL: gatesK:nor3in14{sch}
.SUBCKT nor3in14 inA inB inC out
XNMOSx@0 out inC gnd NMOSx-X_14
XNMOSx@1 out inA gnd NMOSx-X_14
XNMOSx@2 out inB gnd NMOSx-X_14
Xpms3@0 out inA inB inC pms3-X_14
.ENDS nor3in14

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-403-R_34_667m a b
Ccap@0 gnd net@14 1.478f
Ccap@1 gnd net@8 1.478f
Ccap@2 gnd net@11 1.478f
Rres@0 net@14 a 2.328
Rres@1 net@11 net@14 4.657
Rres@2 b net@8 2.328
Rres@3 net@8 net@11 4.657
.ENDS wire-C_0_011f-403-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-403-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-403-R_34_667m
.ENDS wire90-403-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-959-R_34_667m a b
Ccap@0 gnd net@14 3.516f
Ccap@1 gnd net@8 3.516f
Ccap@2 gnd net@11 3.516f
Rres@0 net@14 a 5.541
Rres@1 net@11 net@14 11.082
Rres@2 b net@8 5.541
Rres@3 net@8 net@11 11.082
.ENDS wire-C_0_011f-959-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-959-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-959-R_34_667m
.ENDS wire90-959-layer_1-width_3

*** CELL: centersJ:ctrAND3in100{sch}
.SUBCKT ctrAND3in100 inA inB inC out
Xinv@3 net@104 out inv-X_100
Xnand2@0 net@114 net@103 inv-X_40
Xnor3in14@0 inA inB inC net@124 nor3in14
Xwire90@0 net@124 net@114 wire90-403-layer_1-width_3
Xwire90@4 net@103 net@104 wire90-959-layer_1-width_3
.ENDS ctrAND3in100

*** CELL: scanJ:scanFx2vert{sch}
.SUBCKT scanFx2vert dout[1] dout[2] sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] 
+sic[7] sic[8] sic[9] soc[1]
XscanCell@1 dout[2] sic[9] sic[3] sic[2] sic[5] net@32 soc[1] sic[4] 
+scanCellF
XscanCell@2 dout[1] sic[9] sic[3] sic[2] sic[5] sic[1] net@30 sic[4] 
+scanCellF
Xwire90@0 net@30 net@32 wire90-297_6-layer_1-width_3
.ENDS scanFx2vert

*** CELL: redFour:pms2{sch}
.SUBCKT pms2-X_10 d g g2
XPMOS@0 net@2 g vdd PMOSx-X_20
XPMOS@1 d g2 net@2 PMOSx-X_20
.ENDS pms2-X_10

*** CELL: redFour:pms2_sy{sch}
.SUBCKT pms2_sy-X_20 d g g2
Xpms2@0 d g g2 pms2-X_10
Xpms2@1 d g2 g pms2-X_10
.ENDS pms2_sy-X_20

*** CELL: redFour:nor2_sy{sch}
.SUBCKT nor2_sy-X_20 ina inb out
XNMOS@0 out inb gnd NMOSx-X_20
XNMOS@1 out ina gnd NMOSx-X_20
Xpms2_sy@0 out ina inb pms2_sy-X_20
.ENDS nor2_sy-X_20

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1001_8-R_34_667m a b
Ccap@0 gnd net@14 3.673f
Ccap@1 gnd net@8 3.673f
Ccap@2 gnd net@11 3.673f
Rres@0 net@14 a 5.788
Rres@1 net@11 net@14 11.576
Rres@2 b net@8 5.788
Rres@3 net@8 net@11 11.576
.ENDS wire-C_0_011f-1001_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1001_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1001_8-R_34_667m
.ENDS wire90-1001_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-209-R_34_667m a b
Ccap@0 gnd net@14 0.766f
Ccap@1 gnd net@8 0.766f
Ccap@2 gnd net@11 0.766f
Rres@0 net@14 a 1.208
Rres@1 net@11 net@14 2.415
Rres@2 b net@8 1.208
Rres@3 net@8 net@11 2.415
.ENDS wire-C_0_011f-209-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-209-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-209-R_34_667m
.ENDS wire90-209-layer_1-width_3

*** CELL: driversJ:sucORdri60{sch}
.SUBCKT sucORdri60 inA inB succ
XPMOSx@0 succ net@51 vdd PMOSx-X_60
Xinv@0 succ net@71 inv-X_5
Xnms2@0 succ net@51 net@72 nms2-X_8
Xnor2_sy@0 inA inB net@67 nor2_sy-X_20
Xwire90@0 net@67 net@51 wire90-1001_8-layer_1-width_3
Xwire90@1 net@72 net@71 wire90-209-layer_1-width_3
.ENDS sucORdri60

*** CELL: gaspJ:gaspFill{sch}
.SUBCKT gaspFill fire pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] 
+sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] 
+soc[1] sor[1] succ
Xcenter3i@1 fire succ net@241 fire[B] ctrAND3in100
Xcenter3i@2 net@507 succ net@428 fire ctrAND3in100
Xinv@0 pred net@533 inv-X_10
Xinv@1 net@465 net@537 inv-X_10
XpredDri6@0 fire sir[9] pred predDri60wMC
XscanEx2v@2 pred net@465 sir[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] 
+sir[7] sir[8] sor[1] scanEx2vert
XscanFx2v@0 block fill sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] 
+sic[8] sic[9] soc[1] scanFx2vert
XsucORdri@1 fire net@320 succ sucORdri60
Xwire90@1 net@537 net@241 wire90-602_3-layer_1-width_3
Xwire90@10 net@465 fill wire90-602_3-layer_1-width_3
Xwire90@12 net@533 net@428 wire90-602_3-layer_1-width_3
Xwire90@14 net@507 block wire90-602_3-layer_1-width_3
Xwire90@15 fire[B] net@320 wire90-602_3-layer_1-width_3
.ENDS gaspFill

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-6034_2-R_34_667m a b
Ccap@0 gnd net@14 22.125f
Ccap@1 gnd net@8 22.125f
Ccap@2 gnd net@11 22.125f
Rres@0 net@14 a 34.864
Rres@1 net@11 net@14 69.729
Rres@2 b net@8 34.864
Rres@3 net@8 net@11 69.729
.ENDS wire-C_0_011f-6034_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-6034_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-6034_2-R_34_667m
.ENDS wire90-6034_2-layer_1-width_3

*** CELL: stagesJ:fillStage{sch}
.SUBCKT fillStage ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] 
+aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] 
+aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sic[1] sic[2] 
+sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] sid[1] sid[2] sid[3] sid[4] 
+sid[5] sid[6] sid[7] sid[8] sid[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] 
+sir[7] sir[8] sir[9] soc[1] sod[1] sod[2] sod[3] sod[4] sod[5] sor[1] succ
Xall1in52@1 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] 
+ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] 
+aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] 
+aout[8] aout[9] aout[T] net@2 in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] sid[1] sid[2] sid[3] 
+sid[4] sid[5] sid[6] sid[7] sid[8] sid[9] sod[1] sod[2] sod[3] sod[4] sod[5] 
+all1in52scan
XgaspPlai@0 net@0 pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] 
+sic[8] sic[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] 
+soc[1] sor[1] succ gaspFill
Xwire90@0 net@0 net@2 wire90-6034_2-layer_1-width_3
.ENDS fillStage

*** CELL: stageGroupsJ:properStopper{sch}
.SUBCKT properStopper ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] 
+aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] 
+aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sic[1] sic[2] 
+sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] sid[1] sid[2] sid[3] sid[4] 
+sid[5] sid[6] sid[7] sid[8] sid[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] 
+sir[7] sir[8] sir[9] soc[1] sod[1] sod[2] sod[3] sod[4] sod[5] sor[1] succ
XaDrainSt@0 net@1[4] net@1[3] net@1[2] net@1[1] net@1[0] net@1[13] net@1[12] 
+net@1[11] net@1[10] net@1[9] net@1[8] net@1[7] net@1[6] net@1[5] net@1[14] 
+aout[10] aout[11] aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] 
+aout[5] aout[6] aout[7] aout[8] aout[9] aout[T] net@1[42] net@1[41] net@1[40] 
+net@1[39] net@1[38] net@1[37] net@1[36] net@1[35] net@1[34] net@1[33] 
+net@1[51] net@1[32] net@1[31] net@1[30] net@1[29] net@1[28] net@1[27] 
+net@1[26] net@1[25] net@1[24] net@1[23] net@1[50] net@1[22] net@1[21] 
+net@1[20] net@1[19] net@1[18] net@1[17] net@1[16] net@1[15] net@1[49] 
+net@1[48] net@1[47] net@1[46] net@1[45] net@1[44] net@1[43] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@13 net@3[8] 
+sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] net@2[8] sir[2] 
+sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] soc[1] sor[1] succ 
+drainStage
XaFillSta@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] 
+ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] net@1[4] net@1[3] net@1[2] 
+net@1[1] net@1[0] net@1[13] net@1[12] net@1[11] net@1[10] net@1[9] net@1[8] 
+net@1[7] net@1[6] net@1[5] net@1[14] in[10] in[11] in[12] in[13] in[14] 
+in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
+in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
+in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] net@1[42] 
+net@1[41] net@1[40] net@1[39] net@1[38] net@1[37] net@1[36] net@1[35] 
+net@1[34] net@1[33] net@1[51] net@1[32] net@1[31] net@1[30] net@1[29] 
+net@1[28] net@1[27] net@1[26] net@1[25] net@1[24] net@1[23] net@1[50] 
+net@1[22] net@1[21] net@1[20] net@1[19] net@1[18] net@1[17] net@1[16] 
+net@1[15] net@1[49] net@1[48] net@1[47] net@1[46] net@1[45] net@1[44] 
+net@1[43] pred sic[1] sic[2] sic[3] sic[4] sic[5] sic[6] sic[7] sic[8] sic[9] 
+sid[1] sid[2] sid[3] sid[4] sid[5] sid[6] sid[7] sid[8] sid[9] sir[1] sir[2] 
+sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] net@3[8] sod[1] sod[2] 
+sod[3] sod[4] sod[5] net@2[8] net@13 fillStage
.ENDS properStopper

*** CELL: scanJ:scanEx1vertA{sch}
.SUBCKT scanEx1vertA dIn[1] mc sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] 
+sir[7] sir[8] sor[1]
XscanCell@1 dIn[1] sir[3] sir[2] sir[5] sir[1] sor[1] scanCellE
.ENDS scanEx1vertA

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-503_4-R_34_667m a b
Ccap@0 gnd net@14 1.846f
Ccap@1 gnd net@8 1.846f
Ccap@2 gnd net@11 1.846f
Rres@0 net@14 a 2.909
Rres@1 net@11 net@14 5.817
Rres@2 b net@8 2.909
Rres@3 net@8 net@11 5.817
.ENDS wire-C_0_011f-503_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-503_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-503_4-R_34_667m
.ENDS wire90-503_4-layer_1-width_3

*** CELL: driversJ:sucDri60{sch}
.SUBCKT sucDri60 in succ
XPMOSx@0 succ net@46 vdd PMOSx-X_60
Xinv@1 succ net@94 inv-X_5
Xinv@2 in net@110 inv-X_20
Xnms2@0 succ net@46 net@104 nms2-X_8
Xwire90@0 net@104 net@94 wire90-124_7-layer_1-width_3
Xwire90@1 net@110 net@46 wire90-503_4-layer_1-width_3
.ENDS sucDri60

*** CELL: gaspJ:gaspPlain{sch}
.SUBCKT gaspPlain fire pred sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] 
+sir[8] sir[9] sor[1] succ
Xcenter2i@0 net@16 succ fire ctrAND2in100
Xinv@1 pred net@9 inv-X_10
XpredDri6@0 fire net@25 pred predDri60wMC
XscanEx1v@0 pred sir[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] 
+sir[8] sor[1] scanEx1vertA
XsucDri60@0 fire succ sucDri60
Xwire90@1 net@9 net@16 wire90-602_3-layer_1-width_3
Xwire90@2 net@25 sir[9] wire90-602_3-layer_1-width_3
.ENDS gaspPlain

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1574-R_26m a b
Ccap@0 gnd net@14 5.771f
Ccap@1 gnd net@8 5.771f
Ccap@2 gnd net@11 5.771f
Rres@0 net@14 a 6.821
Rres@1 net@11 net@14 13.641
Rres@2 b net@8 6.821
Rres@3 net@8 net@11 13.641
.ENDS wire-C_0_011f-1574-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1574-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1574-R_26m
.ENDS wire90-1574-layer_1-width_4

*** CELL: stagesJ:plainStage{sch}
.SUBCKT plainStage ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] 
+aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] 
+aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sir[1] sir[2] 
+sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] sor[1] succ
Xall1in52@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] 
+ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] 
+aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] 
+aout[8] aout[9] aout[T] net@20 in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] all1in52
XgaspPlai@0 net@18 pred sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] 
+sir[8] sir[9] sor[1] succ gaspPlain
Xwire90@1 net@18 net@20 wire90-1574-layer_1-width_4
.ENDS plainStage

*** CELL: stageGroupsJ:plainStageFour{sch}
.SUBCKT plainStageFour ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] 
+aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] 
+aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rscanIn[1] 
+rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] rscanIn[6] rscanIn[7] rscanIn[8] 
+rscanIn[9] rscanOut[1] succ
Xstg[1] ain[11] ain[12] ain[13] ain[14] ain[T] ain[2] ain[3] ain[4] ain[5] 
+ain[6] ain[7] ain[8] ain[9] ain[10] ain[1] net@46[4] net@46[3] net@46[2] 
+net@46[1] net@46[0] net@46[13] net@46[12] net@46[11] net@46[10] net@46[9] 
+net@46[8] net@46[7] net@46[6] net@46[5] net@46[14] in[10] in[11] in[12] 
+in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] 
+in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] 
+in[33] in[34] in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] 
+net@46[42] net@46[41] net@46[40] net@46[39] net@46[38] net@46[37] net@46[36] 
+net@46[35] net@46[34] net@46[33] net@46[51] net@46[32] net@46[31] net@46[30] 
+net@46[29] net@46[28] net@46[27] net@46[26] net@46[25] net@46[24] net@46[23] 
+net@46[50] net@46[22] net@46[21] net@46[20] net@46[19] net@46[18] net@46[17] 
+net@46[16] net@46[15] net@46[49] net@46[48] net@46[47] net@46[46] net@46[45] 
+net@46[44] net@46[43] pred rscanIn[1] rscanIn[2] rscanIn[3] rscanIn[4] 
+rscanIn[5] rscanIn[6] rscanIn[7] rscanIn[8] rscanIn[9] net@52[8] net@55 
+plainStage
Xstg[2] net@46[4] net@46[3] net@46[2] net@46[1] net@46[0] net@46[13] 
+net@46[12] net@46[11] net@46[10] net@46[9] net@46[8] net@46[7] net@46[6] 
+net@46[5] net@46[14] net@47[4] net@47[3] net@47[2] net@47[1] net@47[0] 
+net@47[13] net@47[12] net@47[11] net@47[10] net@47[9] net@47[8] net@47[7] 
+net@47[6] net@47[5] net@47[14] net@46[42] net@46[41] net@46[40] net@46[39] 
+net@46[38] net@46[37] net@46[36] net@46[35] net@46[34] net@46[33] net@46[51] 
+net@46[32] net@46[31] net@46[30] net@46[29] net@46[28] net@46[27] net@46[26] 
+net@46[25] net@46[24] net@46[23] net@46[50] net@46[22] net@46[21] net@46[20] 
+net@46[19] net@46[18] net@46[17] net@46[16] net@46[15] net@46[49] net@46[48] 
+net@46[47] net@46[46] net@46[45] net@46[44] net@46[43] net@47[42] net@47[41] 
+net@47[40] net@47[39] net@47[38] net@47[37] net@47[36] net@47[35] net@47[34] 
+net@47[33] net@47[51] net@47[32] net@47[31] net@47[30] net@47[29] net@47[28] 
+net@47[27] net@47[26] net@47[25] net@47[24] net@47[23] net@47[50] net@47[22] 
+net@47[21] net@47[20] net@47[19] net@47[18] net@47[17] net@47[16] net@47[15] 
+net@47[49] net@47[48] net@47[47] net@47[46] net@47[45] net@47[44] net@47[43] 
+net@55 net@52[8] rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] rscanIn[6] 
+rscanIn[7] rscanIn[8] rscanIn[9] net@53[8] net@56 plainStage
Xstg[3] net@47[4] net@47[3] net@47[2] net@47[1] net@47[0] net@47[13] 
+net@47[12] net@47[11] net@47[10] net@47[9] net@47[8] net@47[7] net@47[6] 
+net@47[5] net@47[14] net@48[4] net@48[3] net@48[2] net@48[1] net@48[0] 
+net@48[13] net@48[12] net@48[11] net@48[10] net@48[9] net@48[8] net@48[7] 
+net@48[6] net@48[5] net@48[14] net@47[42] net@47[41] net@47[40] net@47[39] 
+net@47[38] net@47[37] net@47[36] net@47[35] net@47[34] net@47[33] net@47[51] 
+net@47[32] net@47[31] net@47[30] net@47[29] net@47[28] net@47[27] net@47[26] 
+net@47[25] net@47[24] net@47[23] net@47[50] net@47[22] net@47[21] net@47[20] 
+net@47[19] net@47[18] net@47[17] net@47[16] net@47[15] net@47[49] net@47[48] 
+net@47[47] net@47[46] net@47[45] net@47[44] net@47[43] net@48[42] net@48[41] 
+net@48[40] net@48[39] net@48[38] net@48[37] net@48[36] net@48[35] net@48[34] 
+net@48[33] net@48[51] net@48[32] net@48[31] net@48[30] net@48[29] net@48[28] 
+net@48[27] net@48[26] net@48[25] net@48[24] net@48[23] net@48[50] net@48[22] 
+net@48[21] net@48[20] net@48[19] net@48[18] net@48[17] net@48[16] net@48[15] 
+net@48[49] net@48[48] net@48[47] net@48[46] net@48[45] net@48[44] net@48[43] 
+net@56 net@53[8] rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] rscanIn[6] 
+rscanIn[7] rscanIn[8] rscanIn[9] net@54[8] net@57 plainStage
Xstg[4] net@48[4] net@48[3] net@48[2] net@48[1] net@48[0] net@48[13] 
+net@48[12] net@48[11] net@48[10] net@48[9] net@48[8] net@48[7] net@48[6] 
+net@48[5] net@48[14] aout[11] aout[12] aout[13] aout[14] aout[T] aout[2] 
+aout[3] aout[4] aout[5] aout[6] aout[7] aout[8] aout[9] aout[10] aout[1] 
+net@48[42] net@48[41] net@48[40] net@48[39] net@48[38] net@48[37] net@48[36] 
+net@48[35] net@48[34] net@48[33] net@48[51] net@48[32] net@48[31] net@48[30] 
+net@48[29] net@48[28] net@48[27] net@48[26] net@48[25] net@48[24] net@48[23] 
+net@48[50] net@48[22] net@48[21] net@48[20] net@48[19] net@48[18] net@48[17] 
+net@48[16] net@48[15] net@48[49] net@48[48] net@48[47] net@48[46] net@48[45] 
+net@48[44] net@48[43] out[10] out[11] out[12] out[13] out[14] out[15] out[16] 
+out[17] out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] 
+out[25] out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] 
+out[33] out[34] out[35] out[36] out[37] out[3] out[4] out[5] out[6] out[7] 
+out[8] out[9] net@57 net@54[8] rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] 
+rscanIn[6] rscanIn[7] rscanIn[8] rscanIn[9] rscanOut[1] succ plainStage
.ENDS plainStageFour

*** CELL: stageGroupsJ:plainStageEight{sch}
.SUBCKT plainStageEight ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] 
+aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] 
+aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rscanIn[1] 
+rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] rscanIn[6] rscanIn[7] rscanIn[8] 
+rscanIn[9] rscanOut[1] succ
Xgp[1] ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] ain[4] 
+ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] net@89[5] net@89[4] net@89[3] 
+net@89[2] net@89[1] net@89[14] net@89[13] net@89[12] net@89[11] net@89[10] 
+net@89[9] net@89[8] net@89[7] net@89[6] net@89[0] in[10] in[11] in[12] in[13] 
+in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
+in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
+in[34] in[35] in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] 
+net@89[42] net@89[41] net@89[40] net@89[39] net@89[38] net@89[37] net@89[36] 
+net@89[35] net@89[34] net@89[33] net@89[51] net@89[32] net@89[31] net@89[30] 
+net@89[29] net@89[28] net@89[27] net@89[26] net@89[25] net@89[24] net@89[23] 
+net@89[50] net@89[22] net@89[21] net@89[20] net@89[19] net@89[18] net@89[17] 
+net@89[16] net@89[15] net@89[49] net@89[48] net@89[47] net@89[46] net@89[45] 
+net@89[44] net@89[43] pred rscanIn[1] rscanIn[2] rscanIn[3] rscanIn[4] 
+rscanIn[5] rscanIn[6] rscanIn[7] rscanIn[8] rscanIn[9] net@76[8] net@71 
+plainStageFour
Xgp[2] net@89[5] net@89[4] net@89[3] net@89[2] net@89[1] net@89[14] 
+net@89[13] net@89[12] net@89[11] net@89[10] net@89[9] net@89[8] net@89[7] 
+net@89[6] net@89[0] aout[10] aout[11] aout[12] aout[13] aout[14] aout[1] 
+aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] aout[8] aout[9] aout[T] 
+net@89[42] net@89[41] net@89[40] net@89[39] net@89[38] net@89[37] net@89[36] 
+net@89[35] net@89[34] net@89[33] net@89[51] net@89[32] net@89[31] net@89[30] 
+net@89[29] net@89[28] net@89[27] net@89[26] net@89[25] net@89[24] net@89[23] 
+net@89[50] net@89[22] net@89[21] net@89[20] net@89[19] net@89[18] net@89[17] 
+net@89[16] net@89[15] net@89[49] net@89[48] net@89[47] net@89[46] net@89[45] 
+net@89[44] net@89[43] out[10] out[11] out[12] out[13] out[14] out[15] out[16] 
+out[17] out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] 
+out[25] out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] 
+out[33] out[34] out[35] out[36] out[37] out[3] out[4] out[5] out[6] out[7] 
+out[8] out[9] net@71 net@76[8] rscanIn[2] rscanIn[3] rscanIn[4] rscanIn[5] 
+rscanIn[6] rscanIn[7] rscanIn[8] rscanIn[9] rscanOut[1] succ plainStageFour
.ENDS plainStageEight

*** CELL: wiresL:bitAssignments{sch}
.SUBCKT bitAssignments
.ENDS bitAssignments

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_3 d g s
MPMOSf@0 d g s vdd pch W='18*(1+ABP/sqrt(18*2))' L='2'  
+DELVTO='AVT0P/sqrt(18*2)'
.ENDS PMOSx-X_3

*** CELL: redFour:pms3{sch}
.SUBCKT pms3-X_1 d g g2 g3
XPMOS@0 d g3 net@2 PMOSx-X_3
XPMOS@1 net@2 g2 net@5 PMOSx-X_3
XPMOS@2 net@5 g vdd PMOSx-X_3
.ENDS pms3-X_1

*** CELL: driversL:predCond20wMC{sch}
.SUBCKT predCond20wMC cond in mc pred
XNMOSx@1 pred mc gnd NMOSx-X_10
Xinv@0 pred net@145 inv-X_10
Xnms2@0 pred cond in nms2-X_20
Xpms3@0 pred mc in net@186 pms3-X_1
Xwire90@0 net@186 net@145 wire90-243_6-layer_1-width_3
.ENDS predCond20wMC

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_4 d g s
MNMOSf@0 d g s gnd nch W='12*(1+ABN/sqrt(12*2))' L='2' 
+DELVTO='AVT0N/sqrt(12*2)'
.ENDS NMOSx-X_4

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_2 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_4
XNMOS@1 net@0 g gnd NMOSx-X_4
.ENDS nms2-X_2

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_2 d g s
MPMOSf@0 d g s vdd pch W='12*(1+ABP/sqrt(12*2))' L='2'  
+DELVTO='AVT0P/sqrt(12*2)'
.ENDS PMOSx-X_2

*** CELL: redFour:pms2{sch}
.SUBCKT pms2-X_1 d g g2
XPMOS@0 net@2 g vdd PMOSx-X_2
XPMOS@1 d g2 net@2 PMOSx-X_2
.ENDS pms2-X_1

*** CELL: redFour:pms2{sch}
.SUBCKT pms2-X_2 d g g2
XPMOS@0 net@2 g vdd PMOSx-X_4
XPMOS@1 d g2 net@2 PMOSx-X_4
.ENDS pms2-X_2

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-185-R_34_667m a b
Ccap@0 gnd net@14 0.678f
Ccap@1 gnd net@8 0.678f
Ccap@2 gnd net@11 0.678f
Rres@0 net@14 a 1.069
Rres@1 net@11 net@14 2.138
Rres@2 b net@8 1.069
Rres@3 net@8 net@11 2.138
.ENDS wire-C_0_011f-185-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-185-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-185-R_34_667m
.ENDS wire90-185-layer_1-width_3

*** CELL: latchesK:mlat1in10{sch}
.SUBCKT mlat1in10 cl[F] cl[T] in[1] out[1]
Xinv@0 net@26 out[1] inv-X_10
Xnms2@0 net@4 out[1] cl[F] nms2-X_2
Xnms2@1 net@4 in[1] cl[T] nms2-X_2
Xpms2@0 net@4 out[1] cl[T] pms2-X_1
Xpms2@1 net@4 in[1] cl[F] pms2-X_2
Xwire90@0 net@4 net@26 wire90-185-layer_1-width_3
.ENDS mlat1in10

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_3 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_6
XNMOS@1 net@0 g gnd NMOSx-X_6
.ENDS nms2-X_3

*** CELL: redFour:nms3{sch}
.SUBCKT nms3-X_2 d g g2 g3
XNMOS@0 d g3 net@6 NMOSx-X_6
XNMOS@1 net@7 g gnd NMOSx-X_6
XNMOS@2 net@6 g2 net@7 NMOSx-X_6
.ENDS nms3-X_2

*** CELL: redFour:pms2{sch}
.SUBCKT pms2-X_2_5 d g g2
XPMOS@0 net@2 g vdd PMOSx-X_5
XPMOS@1 d g2 net@2 PMOSx-X_5
.ENDS pms2-X_2_5

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-339_3-R_34_667m a b
Ccap@0 gnd net@14 1.244f
Ccap@1 gnd net@8 1.244f
Ccap@2 gnd net@11 1.244f
Rres@0 net@14 a 1.96
Rres@1 net@11 net@14 3.921
Rres@2 b net@8 1.96
Rres@3 net@8 net@11 3.921
.ENDS wire-C_0_011f-339_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-339_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-339_3-R_34_667m
.ENDS wire90-339_3-layer_1-width_3

*** CELL: latchesK:mlat2in10{sch}
.SUBCKT mlat2in10 clA[F] clA[T] clB[F] clB[T] inA inB out[1]
Xinv@0 net@26 out[1] inv-X_10
Xnms2@0 net@4 inB clB[T] nms2-X_3
Xnms2@1 net@4 inA clA[T] nms2-X_3
Xnms3@0 net@4 clA[F] out[1] clB[F] nms3-X_2
Xpms2@0 net@4 inB clB[F] pms2-X_2_5
Xpms2@1 net@4 inA clA[F] pms2-X_2_5
Xpms3@0 net@4 clA[T] out[1] clB[T] pms3-X_1
Xwire90@0 net@4 net@26 wire90-339_3-layer_1-width_3
.ENDS mlat2in10

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-271_1-R_34_667m a b
Ccap@0 gnd net@14 0.994f
Ccap@1 gnd net@8 0.994f
Ccap@2 gnd net@11 0.994f
Rres@0 net@14 a 1.566
Rres@1 net@11 net@14 3.133
Rres@2 b net@8 1.566
Rres@3 net@8 net@11 3.133
.ENDS wire-C_0_011f-271_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-271_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-271_1-R_34_667m
.ENDS wire90-271_1-layer_1-width_3

*** CELL: scanK:scanCellKh{sch}
.SUBCKT scanCellKh clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin sout
Xmlat1in1@1 cl[F] cl[T] sin net@58 mlat1in10
Xmlat2in1@2 clS[F] clS[T] rd[F] rd[T] net@69 din[1] sout mlat2in10
Xwire90@0 net@58 net@69 wire90-271_1-layer_1-width_3
.ENDS scanCellKh

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-297_9-R_34_667m a b
Ccap@0 gnd net@14 1.092f
Ccap@1 gnd net@8 1.092f
Ccap@2 gnd net@11 1.092f
Rres@0 net@14 a 1.721
Rres@1 net@11 net@14 3.442
Rres@2 b net@8 1.721
Rres@3 net@8 net@11 3.442
.ENDS wire-C_0_011f-297_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-297_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-297_9-R_34_667m
.ENDS wire90-297_9-layer_1-width_3

*** CELL: scanK:scanKhx5{sch}
.SUBCKT scanKhx5 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] din[4] din[5] 
+mc rd[F] rd[T] sin sout
XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
+scanCellKh
XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
+scanCellKh
XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 net@24 
+scanCellKh
XscanCell@7 clS[F] clS[T] cl[F] cl[T] din[4] rd[F] rd[T] net@33 net@51 
+scanCellKh
XscanCell@8 clS[F] clS[T] cl[F] cl[T] din[5] rd[F] rd[T] net@50 sout 
+scanCellKh
Xwire90@0 net@18 net@31 wire90-297_9-layer_1-width_3
Xwire90@1 net@20 net@32 wire90-297_9-layer_1-width_3
Xwire90@2 net@24 net@33 wire90-297_9-layer_1-width_3
Xwire90@3 net@51 net@50 wire90-297_9-layer_1-width_3
.ENDS scanKhx5

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_4 in out
XNMOS@0 out in gnd NMOSx-X_4
XPMOS@0 out in vdd PMOSx-X_4
.ENDS inv-X_4

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_2_5 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_5
XNMOS@1 net@0 g gnd NMOSx-X_5
.ENDS nms2-X_2_5

*** CELL: redFour:nms2_sy{sch}
.SUBCKT nms2_sy-X_5 d g g2
Xnms2@0 d g g2 nms2-X_2_5
Xnms2@1 d g2 g nms2-X_2_5
.ENDS nms2_sy-X_5

*** CELL: redFour:nand2_sy{sch}
.SUBCKT nand2_sy-X_5 ina inb out
XPMOS@0 out inb vdd PMOSx-X_5
XPMOS@1 out ina vdd PMOSx-X_5
Xnms2_sy@0 out ina inb nms2_sy-X_5
.ENDS nand2_sy-X_5

*** CELL: driversL:sucANDdri20{sch}
.SUBCKT sucANDdri20 inA inB succ
XPMOSx@0 succ net@51 vdd PMOSx-X_20
Xinv@0 succ net@71 inv-X_4
Xnms2@0 succ net@75 net@51 nms2-X_2
Xnor2_sy@0 inA inB net@67 nand2_sy-X_5
Xwire90@0 net@67 net@51 wire90-627_9-layer_1-width_3
Xwire90@1 net@75 net@71 wire90-124_7-layer_1-width_3
.ENDS sucANDdri20

*** CELL: dockPartsK:moveD{sch}
.SUBCKT moveD clS[F] clS[T] cl[F] cl[T] fire[M] mc od[15] od[16] od[18] 
+od[19] pred[D] pred[T] rd[F] rd[T] s[1] s[2] s[3] sin sout succ[D] succ[T]
XpredCond@3 od[18] fire[M] mc pred[D] predCond20wMC
XpredCond@4 od[19] fire[M] mc pred[T] predCond20wMC
XscanKhx5@2 clS[F] clS[T] cl[F] cl[T] s[1] s[2] pred[D] pred[T] s[3] mc rd[F] 
+rd[T] sin sout scanKhx5
XsucANDdr@3 od[16] fire[M] succ[D] sucANDdri20
XsucANDdr@4 od[15] fire[M] succ[T] sucANDdri20
.ENDS moveD

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_30 in out
XNMOS@0 out in gnd NMOSx-X_30
XPMOS@0 out in vdd PMOSx-X_30
.ENDS inv-X_30

*** CELL: redFour:nms2{sch}
.SUBCKT nms2-X_5 d g g2
XNMOS@0 d g2 net@0 NMOSx-X_10
XNMOS@1 net@0 g gnd NMOSx-X_10
.ENDS nms2-X_5

*** CELL: redFour:nms2_sy{sch}
.SUBCKT nms2_sy-X_10 d g g2
Xnms2@0 d g g2 nms2-X_5
Xnms2@1 d g2 g nms2-X_5
.ENDS nms2_sy-X_10

*** CELL: redFour:nand2LT_sy{sch}
.SUBCKT nand2LT_sy-X_10 ina inb out
XPMOS@0 out ina vdd PMOSx-X_5
XPMOS@1 out inb vdd PMOSx-X_5
Xnms2_sy@0 out ina inb nms2_sy-X_10
.ENDS nand2LT_sy-X_10

*** CELL: redFour:pms2_sy{sch}
.SUBCKT pms2_sy-X_5 d g g2
Xpms2@0 d g g2 pms2-X_2_5
Xpms2@1 d g2 g pms2-X_2_5
.ENDS pms2_sy-X_5

*** CELL: redFour:nor2_sy{sch}
.SUBCKT nor2_sy-X_5 ina inb out
XNMOS@0 out inb gnd NMOSx-X_5
XNMOS@1 out ina gnd NMOSx-X_5
Xpms2_sy@0 out ina inb pms2_sy-X_5
.ENDS nor2_sy-X_5

*** CELL: redFour:nor2n_sy{sch}
.SUBCKT nor2n_sy-X_5 ina inb out
Xnor2@0 ina inb out nor2_sy-X_5
.ENDS nor2n_sy-X_5

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-252_6-R_34_667m a b
Ccap@0 gnd net@14 0.926f
Ccap@1 gnd net@8 0.926f
Ccap@2 gnd net@11 0.926f
Rres@0 net@14 a 1.459
Rres@1 net@11 net@14 2.919
Rres@2 b net@8 1.459
Rres@3 net@8 net@11 2.919
.ENDS wire-C_0_011f-252_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-252_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-252_6-R_34_667m
.ENDS wire90-252_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-366_8-R_34_667m a b
Ccap@0 gnd net@14 1.345f
Ccap@1 gnd net@8 1.345f
Ccap@2 gnd net@11 1.345f
Rres@0 net@14 a 2.119
Rres@1 net@11 net@14 4.239
Rres@2 b net@8 2.119
Rres@3 net@8 net@11 4.239
.ENDS wire-C_0_011f-366_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-366_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-366_8-R_34_667m
.ENDS wire90-366_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-176_4-R_34_667m a b
Ccap@0 gnd net@14 0.647f
Ccap@1 gnd net@8 0.647f
Ccap@2 gnd net@11 0.647f
Rres@0 net@14 a 1.019
Rres@1 net@11 net@14 2.038
Rres@2 b net@8 1.019
Rres@3 net@8 net@11 2.038
.ENDS wire-C_0_011f-176_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-176_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-176_4-R_34_667m
.ENDS wire90-176_4-layer_1-width_3

*** CELL: centersJ:ctrAND3in30B{sch}
.SUBCKT ctrAND3in30B inA inB inC out
Xinv@4 inC net@30 inv-X_5
Xinv@5 net@9 out inv-X_30
Xnand2LT_@0 net@15 net@19 net@27 nand2LT_sy-X_10
Xnor2n_sy@0 inA inB net@6 nor2n_sy-X_5
Xwire90@0 net@6 net@15 wire90-252_6-layer_1-width_3
Xwire90@1 net@27 net@9 wire90-366_8-layer_1-width_3
Xwire90@2 net@30 net@19 wire90-176_4-layer_1-width_3
.ENDS ctrAND3in30B

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_3_999 d g s
MPMOSf@0 d g s vdd pch W='23.994*(1+ABP/sqrt(23.994*2))' L='2'  
+DELVTO='AVT0P/sqrt(23.994*2)'
.ENDS PMOSx-X_3_999

*** CELL: redFour:pms3{sch}
.SUBCKT pms3-X_1_333 d g g2 g3
XPMOS@0 d g3 net@2 PMOSx-X_3_999
XPMOS@1 net@2 g2 net@5 PMOSx-X_3_999
XPMOS@2 net@5 g vdd PMOSx-X_3_999
.ENDS pms3-X_1_333

*** CELL: driversL:predDri20wMC{sch}
.SUBCKT predDri20wMC in mc pred
XNMOSx@0 pred in gnd NMOSx-X_20
XNMOSx@1 pred mc gnd NMOSx-X_4
Xinv@0 pred net@145 inv-X_4
Xpms3@0 pred net@177 in mc pms3-X_1_333
Xwire90@0 net@177 net@145 wire90-243_6-layer_1-width_3
.ENDS predDri20wMC

*** CELL: fifoL:litStage{sch}
.SUBCKT litStage do[L] fire[L] mc s[1] succ[D] succ[T]
XctrAND3i@0 succ[T] succ[D] net@54 fire[L] ctrAND3in30B
Xinv@0 net@54 s[1] inv-X_10
Xinv@1 do[L] net@190 inv-X_5
XpredDri2@1 fire[L] mc do[L] predDri20wMC
Xwire90@1 net@190 net@54 wire90-414-layer_1-width_3
.ENDS litStage

*** CELL: redFour:nand2{sch}
.SUBCKT nand2-X_10 ina inb out
XPMOS@0 out ina vdd PMOSx-X_10
XPMOS@1 out inb vdd PMOSx-X_10
Xnms2@0 out ina inb nms2-X_10
.ENDS nand2-X_10

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_2 d g s
MNMOSf@0 d g s gnd nch W='6*(1+ABN/sqrt(6*2))' L='2' DELVTO='AVT0N/sqrt(6*2)'
.ENDS NMOSx-X_2

*** CELL: redFour:pms2_sy{sch}
.SUBCKT pms2_sy-X_4 d g g2
Xpms2@0 d g g2 pms2-X_2
Xpms2@1 d g2 g pms2-X_2
.ENDS pms2_sy-X_4

*** CELL: redFour:nor2HT_sy{sch}
.SUBCKT nor2HT_sy-X_4 ina inb out
XNMOS@0 out inb gnd NMOSx-X_2
XNMOS@1 out ina gnd NMOSx-X_2
Xpms2_sy@0 out ina inb pms2_sy-X_4
.ENDS nor2HT_sy-X_4

*** CELL: redFour:pms2{sch}
.SUBCKT pms2-X_5 d g g2
XPMOS@0 net@2 g vdd PMOSx-X_10
XPMOS@1 d g2 net@2 PMOSx-X_10
.ENDS pms2-X_5

*** CELL: redFour:nor2{sch}
.SUBCKT nor2-X_5 ina inb out
XNMOS@0 out ina gnd NMOSx-X_5
XNMOS@1 out inb gnd NMOSx-X_5
Xpms2@0 out ina inb pms2-X_5
.ENDS nor2-X_5

*** CELL: redFour:nor2n{sch}
.SUBCKT nor2n-X_5 ina inb out
Xnor2@0 ina inb out nor2-X_5
.ENDS nor2n-X_5

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-238_2-R_34_667m a b
Ccap@0 gnd net@14 0.873f
Ccap@1 gnd net@8 0.873f
Ccap@2 gnd net@11 0.873f
Rres@0 net@14 a 1.376
Rres@1 net@11 net@14 2.753
Rres@2 b net@8 1.376
Rres@3 net@8 net@11 2.753
.ENDS wire-C_0_011f-238_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-238_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-238_2-R_34_667m
.ENDS wire90-238_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-520-R_34_667m a b
Ccap@0 gnd net@14 1.907f
Ccap@1 gnd net@8 1.907f
Ccap@2 gnd net@11 1.907f
Rres@0 net@14 a 3.004
Rres@1 net@11 net@14 6.009
Rres@2 b net@8 3.004
Rres@3 net@8 net@11 6.009
.ENDS wire-C_0_011f-520-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-520-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-520-R_34_667m
.ENDS wire90-520-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-222_3-R_34_667m a b
Ccap@0 gnd net@14 0.815f
Ccap@1 gnd net@8 0.815f
Ccap@2 gnd net@11 0.815f
Rres@0 net@14 a 1.284
Rres@1 net@11 net@14 2.569
Rres@2 b net@8 1.284
Rres@3 net@8 net@11 2.569
.ENDS wire-C_0_011f-222_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-222_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-222_3-R_34_667m
.ENDS wire90-222_3-layer_1-width_3

*** CELL: centersJ:ctrAND4in30{sch}
.SUBCKT ctrAND4in30 inA inB inC inD out
Xinv@1 net@3 out inv-X_30
Xnand2@1 net@43 net@58 net@67 nand2-X_10
Xnor2HT_s@1 inA inB net@61 nor2HT_sy-X_4
Xnor2n@0 inD inC net@64 nor2n-X_5
Xwire90@0 net@64 net@43 wire90-238_2-layer_1-width_3
Xwire90@1 net@67 net@3 wire90-520-layer_1-width_3
Xwire90@2 net@61 net@58 wire90-222_3-layer_1-width_3
.ENDS ctrAND4in30

*** CELL: redFour:invLT{sch}
.SUBCKT invLT-X_2 in out
XNMOS@0 out in gnd NMOSx-X_4
XPMOS@0 out in vdd PMOSx-X_2
.ENDS invLT-X_2

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-190_2-R_34_667m a b
Ccap@0 gnd net@14 0.697f
Ccap@1 gnd net@8 0.697f
Ccap@2 gnd net@11 0.697f
Rres@0 net@14 a 1.099
Rres@1 net@11 net@14 2.198
Rres@2 b net@8 1.099
Rres@3 net@8 net@11 2.198
.ENDS wire-C_0_011f-190_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-190_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-190_2-R_34_667m
.ENDS wire90-190_2-layer_1-width_3

*** CELL: latchesK:mlat1in10i{sch}
.SUBCKT mlat1in10i cl[F] cl[T] in[1] out[1]
XinvLT@0 out[1] net@33 invLT-X_2
Xnms2@0 out[1] cl[F] net@33 nms2-X_2
Xnms2@1 out[1] in[1] cl[T] nms2-X_10
Xpms2@0 out[1] cl[T] net@138 pms2-X_2
Xpms2@1 out[1] in[1] cl[F] pms2-X_10
Xwire90@2 net@138 net@33 wire90-190_2-layer_1-width_3
.ENDS mlat1in10i

*** CELL: redFour:nand2n{sch}
.SUBCKT nand2n-X_10 ina inb out
Xnand2@0 ina inb out nand2-X_10
.ENDS nand2n-X_10

*** CELL: redFour:pms2{sch}
.SUBCKT pms2-X_20 d g g2
XPMOS@0 net@2 g vdd PMOSx-X_40
XPMOS@1 d g2 net@2 PMOSx-X_40
.ENDS pms2-X_20

*** CELL: redFour:nor2{sch}
.SUBCKT nor2-X_20 ina inb out
XNMOS@0 out ina gnd NMOSx-X_20
XNMOS@1 out inb gnd NMOSx-X_20
Xpms2@0 out ina inb pms2-X_20
.ENDS nor2-X_20

*** CELL: redFour:nor2n{sch}
.SUBCKT nor2n-X_20 ina inb out
Xnor2@0 ina inb out nor2-X_20
.ENDS nor2n-X_20

*** CELL: redFour:nor2{sch}
.SUBCKT nor2-X_10 ina inb out
XNMOS@0 out ina gnd NMOSx-X_10
XNMOS@1 out inb gnd NMOSx-X_10
Xpms2@0 out ina inb pms2-X_10
.ENDS nor2-X_10

*** CELL: redFour:nor2n{sch}
.SUBCKT nor2n-X_10 ina inb out
Xnor2@0 ina inb out nor2-X_10
.ENDS nor2n-X_10

*** CELL: redFour:pms2_sy{sch}
.SUBCKT pms2_sy-X_10 d g g2
Xpms2@0 d g g2 pms2-X_5
Xpms2@1 d g2 g pms2-X_5
.ENDS pms2_sy-X_10

*** CELL: redFour:nor2_sy{sch}
.SUBCKT nor2_sy-X_10 ina inb out
XNMOS@0 out inb gnd NMOSx-X_10
XNMOS@1 out ina gnd NMOSx-X_10
Xpms2_sy@0 out ina inb pms2_sy-X_10
.ENDS nor2_sy-X_10

*** CELL: redFour:nor2n_sy{sch}
.SUBCKT nor2n_sy-X_10 ina inb out
Xnor2@0 ina inb out nor2_sy-X_10
.ENDS nor2n_sy-X_10

*** CELL: redFour:pms2{sch}
.SUBCKT pms2-X_15 d g g2
XPMOS@0 net@2 g vdd PMOSx-X_30
XPMOS@1 d g2 net@2 PMOSx-X_30
.ENDS pms2-X_15

*** CELL: redFour:pms2_sy{sch}
.SUBCKT pms2_sy-X_30 d g g2
Xpms2@0 d g g2 pms2-X_15
Xpms2@1 d g2 g pms2-X_15
.ENDS pms2_sy-X_30

*** CELL: redFour:nor2_sy{sch}
.SUBCKT nor2_sy-X_30 ina inb out
XNMOS@0 out inb gnd NMOSx-X_30
XNMOS@1 out ina gnd NMOSx-X_30
Xpms2_sy@0 out ina inb pms2_sy-X_30
.ENDS nor2_sy-X_30

*** CELL: redFour:nor2n_sy{sch}
.SUBCKT nor2n_sy-X_30 ina inb out
Xnor2@0 ina inb out nor2_sy-X_30
.ENDS nor2n_sy-X_30

*** CELL: driversL:predORdri20wMC{sch}
.SUBCKT predORdri20wMC inA inB mc pred
XNMOSx@0 pred inA gnd NMOSx-X_20
XNMOSx@1 pred mc gnd NMOSx-X_4
XNMOSx@2 pred inB gnd NMOSx-X_20
XPMOSx@1 pred net@217 net@203 PMOSx-X_4
XPMOSx@2 net@203 inB net@204 PMOSx-X_4
XPMOSx@3 net@204 inA net@205 PMOSx-X_4
XPMOSx@4 net@205 mc vdd PMOSx-X_4
Xinv@0 pred net@145 inv-X_4
Xwire90@0 net@217 net@145 wire90-243_6-layer_1-width_3
.ENDS predORdri20wMC

*** CELL: redFour:pms2{sch}
.SUBCKT pms2-X_1_5 d g g2
XPMOS@0 net@2 g vdd PMOSx-X_3
XPMOS@1 d g2 net@2 PMOSx-X_3
.ENDS pms2-X_1_5

*** CELL: redFour:pms2_sy{sch}
.SUBCKT pms2_sy-X_3 d g g2
Xpms2@0 d g g2 pms2-X_1_5
Xpms2@1 d g2 g pms2-X_1_5
.ENDS pms2_sy-X_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-218_6-R_34_667m a b
Ccap@0 gnd net@14 0.802f
Ccap@1 gnd net@8 0.802f
Ccap@2 gnd net@11 0.802f
Rres@0 net@14 a 1.263
Rres@1 net@11 net@14 2.526
Rres@2 b net@8 1.263
Rres@3 net@8 net@11 2.526
.ENDS wire-C_0_011f-218_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-218_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-218_6-R_34_667m
.ENDS wire90-218_6-layer_1-width_3

*** CELL: dockPartsK:predWait{sch}
.SUBCKT predWait ign[2] ign[3] out pred[1] pred[2] pred[3]
XNMOSx@6 net@108 ign[3] out NMOSx-X_10
XNMOSx@8 net@87 pred[2] net@108 NMOSx-X_20
XNMOSx@9 net@87 ign[2] net@86 NMOSx-X_10
XNMOSx@10 net@86 pred[3] out NMOSx-X_20
XNMOSx@11 gnd pred[1] net@87 NMOSx-X_20
XPMOSx@0 vdd pred[1] out PMOSx-X_10
Xpms2_sy@2 out pred[2] ign[2] pms2_sy-X_3
Xpms2_sy@3 out pred[3] ign[3] pms2_sy-X_3
Xwire90@0 net@108 net@86 wire90-218_6-layer_1-width_3
.ENDS predWait

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-795_4-R_34_667m a b
Ccap@0 gnd net@14 2.916f
Ccap@1 gnd net@8 2.916f
Ccap@2 gnd net@11 2.916f
Rres@0 net@14 a 4.596
Rres@1 net@11 net@14 9.191
Rres@2 b net@8 4.596
Rres@3 net@8 net@11 9.191
.ENDS wire-C_0_011f-795_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-795_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-795_4-R_34_667m
.ENDS wire90-795_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-459_9-R_34_667m a b
Ccap@0 gnd net@14 1.686f
Ccap@1 gnd net@8 1.686f
Ccap@2 gnd net@11 1.686f
Rres@0 net@14 a 2.657
Rres@1 net@11 net@14 5.314
Rres@2 b net@8 2.657
Rres@3 net@8 net@11 5.314
.ENDS wire-C_0_011f-459_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-459_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-459_9-R_34_667m
.ENDS wire90-459_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-361_8-R_34_667m a b
Ccap@0 gnd net@14 1.327f
Ccap@1 gnd net@8 1.327f
Ccap@2 gnd net@11 1.327f
Rres@0 net@14 a 2.09
Rres@1 net@11 net@14 4.181
Rres@2 b net@8 2.09
Rres@3 net@8 net@11 4.181
.ENDS wire-C_0_011f-361_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-361_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-361_8-R_34_667m
.ENDS wire90-361_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-307-R_34_667m a b
Ccap@0 gnd net@14 1.126f
Ccap@1 gnd net@8 1.126f
Ccap@2 gnd net@11 1.126f
Rres@0 net@14 a 1.774
Rres@1 net@11 net@14 3.548
Rres@2 b net@8 1.774
Rres@3 net@8 net@11 3.548
.ENDS wire-C_0_011f-307-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-307-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-307-R_34_667m
.ENDS wire90-307-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-258_6-R_34_667m a b
Ccap@0 gnd net@14 0.948f
Ccap@1 gnd net@8 0.948f
Ccap@2 gnd net@11 0.948f
Rres@0 net@14 a 1.494
Rres@1 net@11 net@14 2.988
Rres@2 b net@8 1.494
Rres@3 net@8 net@11 2.988
.ENDS wire-C_0_011f-258_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-258_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-258_6-R_34_667m
.ENDS wire90-258_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-386_2-R_34_667m a b
Ccap@0 gnd net@14 1.416f
Ccap@1 gnd net@8 1.416f
Ccap@2 gnd net@11 1.416f
Rres@0 net@14 a 2.231
Rres@1 net@11 net@14 4.463
Rres@2 b net@8 2.231
Rres@3 net@8 net@11 4.463
.ENDS wire-C_0_011f-386_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-386_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-386_2-R_34_667m
.ENDS wire90-386_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1409_3-R_34_667m a b
Ccap@0 gnd net@14 5.167f
Ccap@1 gnd net@8 5.167f
Ccap@2 gnd net@11 5.167f
Rres@0 net@14 a 8.143
Rres@1 net@11 net@14 16.285
Rres@2 b net@8 8.143
Rres@3 net@8 net@11 16.285
.ENDS wire-C_0_011f-1409_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1409_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1409_3-R_34_667m
.ENDS wire90-1409_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-316-R_34_667m a b
Ccap@0 gnd net@14 1.159f
Ccap@1 gnd net@8 1.159f
Ccap@2 gnd net@11 1.159f
Rres@0 net@14 a 1.826
Rres@1 net@11 net@14 3.652
Rres@2 b net@8 1.826
Rres@3 net@8 net@11 3.652
.ENDS wire-C_0_011f-316-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-316-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-316-R_34_667m
.ENDS wire90-316-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-324_9-R_34_667m a b
Ccap@0 gnd net@14 1.191f
Ccap@1 gnd net@8 1.191f
Ccap@2 gnd net@11 1.191f
Rres@0 net@14 a 1.877
Rres@1 net@11 net@14 3.754
Rres@2 b net@8 1.877
Rres@3 net@8 net@11 3.754
.ENDS wire-C_0_011f-324_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-324_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-324_9-R_34_667m
.ENDS wire90-324_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-340_7-R_34_667m a b
Ccap@0 gnd net@14 1.249f
Ccap@1 gnd net@8 1.249f
Ccap@2 gnd net@11 1.249f
Rres@0 net@14 a 1.968
Rres@1 net@11 net@14 3.937
Rres@2 b net@8 1.968
Rres@3 net@8 net@11 3.937
.ENDS wire-C_0_011f-340_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-340_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-340_7-R_34_667m
.ENDS wire90-340_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1083_5-R_34_667m a b
Ccap@0 gnd net@14 3.973f
Ccap@1 gnd net@8 3.973f
Ccap@2 gnd net@11 3.973f
Rres@0 net@14 a 6.26
Rres@1 net@11 net@14 12.52
Rres@2 b net@8 6.26
Rres@3 net@8 net@11 12.52
.ENDS wire-C_0_011f-1083_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1083_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1083_5-R_34_667m
.ENDS wire90-1083_5-layer_1-width_3

*** CELL: dockPartsK:moveC{sch}
.SUBCKT moveC do[M] fire[M] fire[T] ilc[done] mc od[18] od[19] od[20] pred[D] 
+pred[T] succ[D] succ[T] torp
Xarbiter2@0 net@1653 net@1652 torp net@860 arbiter2
XctrAND4i@1 net@1475 net@1481 net@1498 od[20] fire[T] ctrAND4in30
Xinv@39 do[M] net@1494 inv-X_10
Xinv@43 fire[T] net@1388 inv-X_10
Xinv@47 net@1415 net@1589 inv-X_10
Xinv@49 fire[AE] net@1593 inv-X_10
Xinv@50 exitLO net@1556 inv-X_10
Xinv@51 od[18] ign[D] inv-X_10
Xinv@52 od[19] ign[T] inv-X_10
Xmlat1in1@0 fire[A] fire[AE] ilc[done] net@1561 mlat1in10i
Xnand2@3 od[20] net@860 net@925 nand2-X_10
Xnand2_sy@0 net@1612 net@1335 net@1574 nand2_sy-X_20
Xnand2n@1 net@877 net@926 net@1334 nand2n-X_10
Xnor2n@5 fire[A] okLO net@652 nor2n-X_20
Xnor2n@8 exitLO fire[AE] net@1101 nor2n-X_10
Xnor2n_sy@0 succ[D] succ[T] net@1619 nor2n_sy-X_10
Xnor2n_sy@1 fire[AE] doLO fire[M] nor2n_sy-X_30
XpredDri2@1 net@1401 mc torp predDri20wMC
XpredORdr@0 fire[T] net@1650 mc do[M] predORdri20wMC
XpredWait@0 ign[D] ign[T] net@1530 do[M] pred[D] pred[T] predWait
Xwire90@18 net@860 net@652 wire90-795_4-layer_1-width_3
Xwire90@19 net@1498 net@1494 wire90-459_9-layer_1-width_3
Xwire90@21 net@1652 net@877 wire90-361_8-layer_1-width_3
Xwire90@22 net@1653 net@1475 wire90-307-layer_1-width_3
Xwire90@25 net@925 net@926 wire90-258_6-layer_1-width_3
Xwire90@33 net@1101 net@1650 wire90-386_2-layer_1-width_3
Xwire90@38 net@1401 fire[T] wire90-1409_3-layer_1-width_3
Xwire90@42 net@1388 net@1415 wire90-316-layer_1-width_3
Xwire90@43 net@1334 net@1335 wire90-324_9-layer_1-width_3
Xwire90@49 okLO net@1530 wire90-795_4-layer_1-width_3
Xwire90@51 net@1561 exitLO wire90-340_7-layer_1-width_3
Xwire90@52 net@1556 doLO wire90-340_7-layer_1-width_3
Xwire90@53 net@1574 fire[AE] wire90-1083_5-layer_1-width_3
Xwire90@55 net@1481 net@1589 wire90-316-layer_1-width_3
Xwire90@56 net@1593 fire[A] wire90-795_4-layer_1-width_3
Xwire90@57 net@1612 net@1619 wire90-324_9-layer_1-width_3
.ENDS moveC

*** CELL: dockPartsK:moveLit{sch}
.SUBCKT moveLit clS[F] clS[T] cl[F] cl[T] do[L] do[M] fire[L] fire[M] fire[T] 
+ilc[done] mc od[15] od[16] od[18] od[19] od[20] pred[D] pred[T] rd[F] rd[T] 
+sin sout succ[D] succ[T] torp
XdStates@0 clS[F] clS[T] cl[F] cl[T] fire[M] mc od[15] od[16] od[18] od[19] 
+pred[D] pred[T] rd[F] rd[T] s[1] do[M] torp sin sout succ[D] succ[T] moveD
XlitStage@0 do[L] fire[L] mc s[1] succ[D] succ[T] litStage
XmoveC@0 do[M] fire[M] fire[T] ilc[done] mc od[18] od[19] od[20] pred[D] 
+pred[T] succ[D] succ[T] torp moveC
.ENDS moveLit

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_15 d g s
MPMOSf@0 d g s vdd pch W='90*(1+ABP/sqrt(90*2))' L='2'  
+DELVTO='AVT0P/sqrt(90*2)'
.ENDS PMOSx-X_15

*** CELL: redFour:nand2LT_sy{sch}
.SUBCKT nand2LT_sy-X_30 ina inb out
XPMOS@0 out ina vdd PMOSx-X_15
XPMOS@1 out inb vdd PMOSx-X_15
Xnms2_sy@0 out ina inb nms2_sy-X_30
.ENDS nand2LT_sy-X_30

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-399_2-R_34_667m a b
Ccap@0 gnd net@14 1.464f
Ccap@1 gnd net@8 1.464f
Ccap@2 gnd net@11 1.464f
Rres@0 net@14 a 2.306
Rres@1 net@11 net@14 4.613
Rres@2 b net@8 2.306
Rres@3 net@8 net@11 4.613
.ENDS wire-C_0_011f-399_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-399_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-399_2-R_34_667m
.ENDS wire90-399_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1013_8-R_34_667m a b
Ccap@0 gnd net@14 3.717f
Ccap@1 gnd net@8 3.717f
Ccap@2 gnd net@11 3.717f
Rres@0 net@14 a 5.858
Rres@1 net@11 net@14 11.715
Rres@2 b net@8 5.858
Rres@3 net@8 net@11 11.715
.ENDS wire-C_0_011f-1013_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1013_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1013_8-R_34_667m
.ENDS wire90-1013_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-468_3-R_34_667m a b
Ccap@0 gnd net@14 1.717f
Ccap@1 gnd net@8 1.717f
Ccap@2 gnd net@11 1.717f
Rres@0 net@14 a 2.706
Rres@1 net@11 net@14 5.411
Rres@2 b net@8 2.706
Rres@3 net@8 net@11 5.411
.ENDS wire-C_0_011f-468_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-468_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-468_3-R_34_667m
.ENDS wire90-468_3-layer_1-width_3

*** CELL: centersJ:ctrAND2in100LT{sch}
.SUBCKT ctrAND2in100LT inA inB out
Xinv@8 inB net@135 inv-X_10
Xinv@9 inA net@139 inv-X_10
Xinv@10 net@146 out inv-X_100
Xnand2LT_@0 net@140 net@136 net@144 nand2LT_sy-X_30
Xwire90@4 net@135 net@136 wire90-399_2-layer_1-width_3
Xwire90@5 net@144 net@146 wire90-1013_8-layer_1-width_3
Xwire90@6 net@139 net@140 wire90-468_3-layer_1-width_3
.ENDS ctrAND2in100LT

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_6 d g s
MPMOSf@0 d g s vdd pch W='36*(1+ABP/sqrt(36*2))' L='2'  
+DELVTO='AVT0P/sqrt(36*2)'
.ENDS PMOSx-X_6

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_6 in out
XNMOS@0 out in gnd NMOSx-X_6
XPMOS@0 out in vdd PMOSx-X_6
.ENDS inv-X_6

*** CELL: driversL:sucDri20{sch}
.SUBCKT sucDri20 in succ
XPMOSx@0 succ net@46 vdd PMOSx-X_20
Xinv@1 succ net@94 inv-X_4
Xinv@2 in net@110 inv-X_6
Xnms2@0 succ net@117 net@46 nms2-X_2
Xwire90@0 net@117 net@94 wire90-124_7-layer_1-width_3
Xwire90@1 net@110 net@46 wire90-503_4-layer_1-width_3
.ENDS sucDri20

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-247_2-R_34_667m a b
Ccap@0 gnd net@14 0.906f
Ccap@1 gnd net@8 0.906f
Ccap@2 gnd net@11 0.906f
Rres@0 net@14 a 1.428
Rres@1 net@11 net@14 2.857
Rres@2 b net@8 1.428
Rres@3 net@8 net@11 2.857
.ENDS wire-C_0_011f-247_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-247_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-247_2-R_34_667m
.ENDS wire90-247_2-layer_1-width_3

*** CELL: gaspL:aStageB{sch}
.SUBCKT aStageB fire mc pred s[1] succ
XctrAND2i@7 succ net@986 fire ctrAND2in100LT
Xinv@4 net@987 s[1] inv-X_10
Xinv@5 pred net@987 inv-X_5
XpredDri2@1 fire mc pred predDri20wMC
XsucDri20@1 fire succ sucDri20
Xwire90@0 net@987 net@986 wire90-247_2-layer_1-width_3
.ENDS aStageB

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-123_7-R_34_667m a b
Ccap@0 gnd net@14 0.454f
Ccap@1 gnd net@8 0.454f
Ccap@2 gnd net@11 0.454f
Rres@0 net@14 a 0.715
Rres@1 net@11 net@14 1.429
Rres@2 b net@8 0.715
Rres@3 net@8 net@11 1.429
.ENDS wire-C_0_011f-123_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-123_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-123_7-R_34_667m
.ENDS wire90-123_7-layer_1-width_3

*** CELL: latchPartsK:latchPointT{sch}
.SUBCKT latchPointT hcl in[1] x[F] x[T]
XPMOSx@0 in[1] hcl x[T] NMOSx-X_6
XPMOSx@1 net@8 hcl x[F] NMOSx-X_3
Xinv@0 in[1] net@105 invLT-X_5
Xwire90@0 net@105 net@8 wire90-123_7-layer_1-width_3
.ENDS latchPointT

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-180_9-R_34_667m a b
Ccap@0 gnd net@14 0.663f
Ccap@1 gnd net@8 0.663f
Ccap@2 gnd net@11 0.663f
Rres@0 net@14 a 1.045
Rres@1 net@11 net@14 2.09
Rres@2 b net@8 1.045
Rres@3 net@8 net@11 2.09
.ENDS wire-C_0_011f-180_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-180_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-180_9-R_34_667m
.ENDS wire90-180_9-layer_1-width_3

*** CELL: latchesK:raw1inLatchT{sch}
.SUBCKT raw1inLatchT hcl[A] inA[1] out[T]
XlatchFlo@0 out[T] net@29 latchKeep
XlatchPoi@0 hcl[A] inA[1] net@7 out[T] latchPointT
Xwire90@0 net@7 net@29 wire90-180_9-layer_1-width_3
.ENDS raw1inLatchT

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-250_9-R_34_667m a b
Ccap@0 gnd net@14 0.92f
Ccap@1 gnd net@8 0.92f
Ccap@2 gnd net@11 0.92f
Rres@0 net@14 a 1.45
Rres@1 net@11 net@14 2.899
Rres@2 b net@8 1.45
Rres@3 net@8 net@11 2.899
.ENDS wire-C_0_011f-250_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-250_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-250_9-R_34_667m
.ENDS wire90-250_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-214_6-R_34_667m a b
Ccap@0 gnd net@14 0.787f
Ccap@1 gnd net@8 0.787f
Ccap@2 gnd net@11 0.787f
Rres@0 net@14 a 1.24
Rres@1 net@11 net@14 2.48
Rres@2 b net@8 1.24
Rres@3 net@8 net@11 2.48
.ENDS wire-C_0_011f-214_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-214_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-214_6-R_34_667m
.ENDS wire90-214_6-layer_1-width_3

*** CELL: latchesK:latch1in20B{sch}
.SUBCKT latch1in20B hcl in[1] out[1]
Xhi2inLat@0 hcl in[1] net@19 raw1inLatchT
Xinv@0 net@23 out[1] inv-X_20
XinvLT@0 net@18 net@25 inv-X_5
Xwire90@0 net@19 net@18 wire90-250_9-layer_1-width_3
Xwire90@1 net@25 net@23 wire90-214_6-layer_1-width_3
.ENDS latch1in20B

*** CELL: registersL:ins20Bx18{sch}
.SUBCKT ins20Bx18 hcl[1] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
+in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[1] out[2] 
+out[3] out[4] out[5] out[6] out[7] out[8] out[9]
Xlx[1] hcl[1] in[1] out[1] latch1in20B
Xlx[2] hcl[1] in[2] out[2] latch1in20B
Xlx[3] hcl[1] in[3] out[3] latch1in20B
Xlx[4] hcl[1] in[4] out[4] latch1in20B
Xlx[5] hcl[1] in[5] out[5] latch1in20B
Xlx[6] hcl[1] in[6] out[6] latch1in20B
Xlx[7] hcl[1] in[7] out[7] latch1in20B
Xlx[8] hcl[1] in[8] out[8] latch1in20B
Xlx[9] hcl[1] in[9] out[9] latch1in20B
Xlx[10] hcl[1] in[10] out[10] latch1in20B
Xlx[11] hcl[1] in[11] out[11] latch1in20B
Xlx[12] hcl[1] in[12] out[12] latch1in20B
Xlx[13] hcl[1] in[13] out[13] latch1in20B
Xlx[14] hcl[1] in[14] out[14] latch1in20B
Xlx[15] hcl[1] in[15] out[15] latch1in20B
Xlx[16] hcl[1] in[16] out[16] latch1in20B
Xlx[17] hcl[1] in[17] out[17] latch1in20B
Xlx[18] hcl[1] in[18] out[18] latch1in20B
.ENDS ins20Bx18

*** CELL: registersL:ins20Bx36{sch}
.SUBCKT ins20Bx36 hcl[1] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
+in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] 
+in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] 
+in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] 
+out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] 
+out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] 
+out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] 
+out[6] out[7] out[8] out[9]
Xins20Bx1@0 hcl[1] in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[1] out[2] out[3] 
+out[4] out[5] out[6] out[7] out[8] out[9] ins20Bx18
Xins20Bx1@1 hcl[1] in[28] in[29] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[19] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] out[28] 
+out[29] out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[19] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] ins20Bx18
.ENDS ins20Bx36

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-544_2-R_34_667m a b
Ccap@0 gnd net@14 1.995f
Ccap@1 gnd net@8 1.995f
Ccap@2 gnd net@11 1.995f
Rres@0 net@14 a 3.144
Rres@1 net@11 net@14 6.289
Rres@2 b net@8 3.144
Rres@3 net@8 net@11 6.289
.ENDS wire-C_0_011f-544_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-544_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-544_2-R_34_667m
.ENDS wire90-544_2-layer_1-width_3

*** CELL: driversJ:latchDriver60{sch}
.SUBCKT latchDriver60 in out
Xinv@0 net@8 out inv-X_60
Xinv@1 in net@16 inv-X_20
Xwire90@0 net@16 net@8 wire90-544_2-layer_1-width_3
.ENDS latchDriver60

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-302_4-R_34_667m a b
Ccap@0 gnd net@14 1.109f
Ccap@1 gnd net@8 1.109f
Ccap@2 gnd net@11 1.109f
Rres@0 net@14 a 1.747
Rres@1 net@11 net@14 3.494
Rres@2 b net@8 1.747
Rres@3 net@8 net@11 3.494
.ENDS wire-C_0_011f-302_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-302_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-302_4-R_34_667m
.ENDS wire90-302_4-layer_1-width_3

*** CELL: scanK:scanKhx2{sch}
.SUBCKT scanKhx2 clS[F] clS[T] cl[F] cl[T] din[1] din[2] mc rd[F] rd[T] sin 
+sout
XscanCell@1 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@20 
+scanCellKh
XscanCell@2 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@19 sout 
+scanCellKh
Xwire90@0 net@20 net@19 wire90-302_4-layer_1-width_3
.ENDS scanKhx2

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3715_9-R_34_667m a b
Ccap@0 gnd net@14 13.625f
Ccap@1 gnd net@8 13.625f
Ccap@2 gnd net@11 13.625f
Rres@0 net@14 a 21.47
Rres@1 net@11 net@14 42.939
Rres@2 b net@8 21.47
Rres@3 net@8 net@11 42.939
.ENDS wire-C_0_011f-3715_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3715_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3715_9-R_34_667m
.ENDS wire90-3715_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-447_1-R_34_667m a b
Ccap@0 gnd net@14 1.639f
Ccap@1 gnd net@8 1.639f
Ccap@2 gnd net@11 1.639f
Rres@0 net@14 a 2.583
Rres@1 net@11 net@14 5.166
Rres@2 b net@8 2.583
Rres@3 net@8 net@11 5.166
.ENDS wire-C_0_011f-447_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-447_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-447_1-R_34_667m
.ENDS wire90-447_1-layer_1-width_3

*** CELL: fifoL:m1stageD{sch}
.SUBCKT m1stageD clS[F] clS[T] cl[F] cl[T] fire[1] in[10] in[11] in[12] 
+in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] 
+in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] 
+in[33] in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc 
+out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
+out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
+out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
+out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] 
+rd[T] s[m2] sin sout succ
XaStageB@0 fire[1] mc pred net@39 succ aStageB
Xins20Bx3@0 net@6 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
+in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
+in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
+out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
+out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
+out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
+out[7] out[8] out[9] ins20Bx36
XlatchDri@0 fire[1] take[1] latchDriver60
XscanKhx2@0 clS[F] clS[T] cl[F] cl[T] s[m2] s[m1] mc rd[F] rd[T] sin sout 
+scanKhx2
Xwire90@1 net@6 take[1] wire90-3715_9-layer_1-width_3
Xwire90@2 net@39 s[m1] wire90-447_1-layer_1-width_3
.ENDS m1stageD

*** CELL: fifoL:m2stageD{sch}
.SUBCKT m2stageD fire[1] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
+in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] 
+in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] 
+in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] out[11] out[12] out[13] 
+out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] 
+out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] 
+out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] 
+out[6] out[7] out[8] out[9] pred s[m2] succ
XaStageB@0 fire[1] mc pred s[m2] succ aStageB
Xins20Bx3@0 net@6 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
+in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
+in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
+out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
+out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
+out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
+out[7] out[8] out[9] ins20Bx36
XlatchDri@0 fire[1] take[1] latchDriver60
Xwire90@1 net@6 take[1] wire90-3715_9-layer_1-width_3
.ENDS m2stageD

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1239_6-R_26m a b
Ccap@0 gnd net@14 4.545f
Ccap@1 gnd net@8 4.545f
Ccap@2 gnd net@11 4.545f
Rres@0 net@14 a 5.372
Rres@1 net@11 net@14 10.743
Rres@2 b net@8 5.372
Rres@3 net@8 net@11 10.743
.ENDS wire-C_0_011f-1239_6-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1239_6-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1239_6-R_26m
.ENDS wire90-1239_6-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-631_3-R_26m a b
Ccap@0 gnd net@14 2.315f
Ccap@1 gnd net@8 2.315f
Ccap@2 gnd net@11 2.315f
Rres@0 net@14 a 2.736
Rres@1 net@11 net@14 5.471
Rres@2 b net@8 2.736
Rres@3 net@8 net@11 5.471
.ENDS wire-C_0_011f-631_3-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-631_3-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-631_3-R_26m
.ENDS wire90-631_3-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-605_4-R_26m a b
Ccap@0 gnd net@14 2.22f
Ccap@1 gnd net@8 2.22f
Ccap@2 gnd net@11 2.22f
Rres@0 net@14 a 2.623
Rres@1 net@11 net@14 5.247
Rres@2 b net@8 2.623
Rres@3 net@8 net@11 5.247
.ENDS wire-C_0_011f-605_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-605_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-605_4-R_26m
.ENDS wire90-605_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-613_4-R_26m a b
Ccap@0 gnd net@14 2.249f
Ccap@1 gnd net@8 2.249f
Ccap@2 gnd net@11 2.249f
Rres@0 net@14 a 2.658
Rres@1 net@11 net@14 5.316
Rres@2 b net@8 2.658
Rres@3 net@8 net@11 5.316
.ENDS wire-C_0_011f-613_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-613_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-613_4-R_26m
.ENDS wire90-613_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-623_9-R_26m a b
Ccap@0 gnd net@14 2.288f
Ccap@1 gnd net@8 2.288f
Ccap@2 gnd net@11 2.288f
Rres@0 net@14 a 2.704
Rres@1 net@11 net@14 5.407
Rres@2 b net@8 2.704
Rres@3 net@8 net@11 5.407
.ENDS wire-C_0_011f-623_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-623_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-623_9-R_26m
.ENDS wire90-623_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-625_9-R_26m a b
Ccap@0 gnd net@14 2.295f
Ccap@1 gnd net@8 2.295f
Ccap@2 gnd net@11 2.295f
Rres@0 net@14 a 2.712
Rres@1 net@11 net@14 5.424
Rres@2 b net@8 2.712
Rres@3 net@8 net@11 5.424
.ENDS wire-C_0_011f-625_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-625_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-625_9-R_26m
.ENDS wire90-625_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-607_8-R_26m a b
Ccap@0 gnd net@14 2.229f
Ccap@1 gnd net@8 2.229f
Ccap@2 gnd net@11 2.229f
Rres@0 net@14 a 2.634
Rres@1 net@11 net@14 5.268
Rres@2 b net@8 2.634
Rres@3 net@8 net@11 5.268
.ENDS wire-C_0_011f-607_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-607_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-607_8-R_26m
.ENDS wire90-607_8-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-620_9-R_26m a b
Ccap@0 gnd net@14 2.277f
Ccap@1 gnd net@8 2.277f
Ccap@2 gnd net@11 2.277f
Rres@0 net@14 a 2.691
Rres@1 net@11 net@14 5.381
Rres@2 b net@8 2.691
Rres@3 net@8 net@11 5.381
.ENDS wire-C_0_011f-620_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-620_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-620_9-R_26m
.ENDS wire90-620_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-612_5-R_26m a b
Ccap@0 gnd net@14 2.246f
Ccap@1 gnd net@8 2.246f
Ccap@2 gnd net@11 2.246f
Rres@0 net@14 a 2.654
Rres@1 net@11 net@14 5.308
Rres@2 b net@8 2.654
Rres@3 net@8 net@11 5.308
.ENDS wire-C_0_011f-612_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-612_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-612_5-R_26m
.ENDS wire90-612_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-602_4-R_26m a b
Ccap@0 gnd net@14 2.209f
Ccap@1 gnd net@8 2.209f
Ccap@2 gnd net@11 2.209f
Rres@0 net@14 a 2.61
Rres@1 net@11 net@14 5.221
Rres@2 b net@8 2.61
Rres@3 net@8 net@11 5.221
.ENDS wire-C_0_011f-602_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-602_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-602_4-R_26m
.ENDS wire90-602_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-607-R_26m a b
Ccap@0 gnd net@14 2.226f
Ccap@1 gnd net@8 2.226f
Ccap@2 gnd net@11 2.226f
Rres@0 net@14 a 2.63
Rres@1 net@11 net@14 5.261
Rres@2 b net@8 2.63
Rres@3 net@8 net@11 5.261
.ENDS wire-C_0_011f-607-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-607-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-607-R_26m
.ENDS wire90-607-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-620_5-R_26m a b
Ccap@0 gnd net@14 2.275f
Ccap@1 gnd net@8 2.275f
Ccap@2 gnd net@11 2.275f
Rres@0 net@14 a 2.689
Rres@1 net@11 net@14 5.378
Rres@2 b net@8 2.689
Rres@3 net@8 net@11 5.378
.ENDS wire-C_0_011f-620_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-620_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-620_5-R_26m
.ENDS wire90-620_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-624_5-R_26m a b
Ccap@0 gnd net@14 2.29f
Ccap@1 gnd net@8 2.29f
Ccap@2 gnd net@11 2.29f
Rres@0 net@14 a 2.706
Rres@1 net@11 net@14 5.412
Rres@2 b net@8 2.706
Rres@3 net@8 net@11 5.412
.ENDS wire-C_0_011f-624_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-624_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-624_5-R_26m
.ENDS wire90-624_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-618-R_26m a b
Ccap@0 gnd net@14 2.266f
Ccap@1 gnd net@8 2.266f
Ccap@2 gnd net@11 2.266f
Rres@0 net@14 a 2.678
Rres@1 net@11 net@14 5.356
Rres@2 b net@8 2.678
Rres@3 net@8 net@11 5.356
.ENDS wire-C_0_011f-618-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-618-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-618-R_26m
.ENDS wire90-618-layer_1-width_4

*** CELL: fifoL:m12stageD{sch}
.SUBCKT m12stageD clS[F] clS[T] cl[F] cl[T] fire[m1] fire[m2] in[10] in[11] 
+in[12] in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] 
+in[22] in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] 
+in[32] in[33] in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] 
+mc out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
+out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
+out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
+out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pout[13] 
+pout[14] pout[15] pout[16] pout[17] pout[18] pred rd[F] rd[T] sin sout succ
Xinv[1] in[31] pout[13] inv-X_10
Xinv[2] in[32] pout[14] inv-X_10
Xinv[3] in[33] pout[15] inv-X_10
Xinv[4] in[34] pout[16] inv-X_10
Xinv[5] in[35] pout[17] inv-X_10
Xinv[6] in[36] pout[18] inv-X_10
Xm1stageD@1 clS[F] clS[T] cl[F] cl[T] fire[m1] m2[10] m2[11] m2[12] m2[13] 
+m2[14] m2[15] m2[16] m2[17] m2[18] m2[19] m2[1] m2[20] m2[21] m2[22] m2[23] 
+m2[24] m2[25] m2[26] m2[27] m2[28] m2[29] m2[2] m2[30] m2[31] m2[32] m2[33] 
+m2[34] m2[35] m2[36] m2[3] m2[4] m2[5] m2[6] m2[7] m2[8] m2[9] mc out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@53 rd[F] rd[T] 
+net@36 sin sout succ m1stageD
Xm2stageD@2 fire[m2] in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
+in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
+in[4] in[5] in[6] in[7] in[8] in[9] mc m2[10] m2[11] m2[12] m2[13] m2[14] 
+m2[15] m2[16] m2[17] m2[18] m2[19] m2[1] m2[20] m2[21] m2[22] m2[23] m2[24] 
+m2[25] m2[26] m2[27] m2[28] m2[29] m2[2] m2[30] m2[31] m2[32] m2[33] m2[34] 
+m2[35] m2[36] m2[3] m2[4] m2[5] m2[6] m2[7] m2[8] m2[9] pred s[m2] net@52 
+m2stageD
Xwire90@0 net@52 net@53 wire90-1239_6-layer_1-width_4
Xwire90@1 s[m2] net@36 wire90-631_3-layer_1-width_4
Xwire90@2 m2[1] wire90@2_b wire90-605_4-layer_1-width_4
Xwire90@3 m2[2] wire90@3_b wire90-613_4-layer_1-width_4
Xwire90@4 m2[3] wire90@4_b wire90-605_4-layer_1-width_4
Xwire90@5 m2[4] wire90@5_b wire90-623_9-layer_1-width_4
Xwire90@6 m2[5] wire90@6_b wire90-605_4-layer_1-width_4
Xwire90@7 m2[6] wire90@7_b wire90-625_9-layer_1-width_4
Xwire90@8 m2[7] wire90@8_b wire90-607_8-layer_1-width_4
Xwire90@9 m2[8] wire90@9_b wire90-620_9-layer_1-width_4
Xwire90@10 m2[9] wire90@10_b wire90-605_4-layer_1-width_4
Xwire90@11 m2[10] wire90@11_b wire90-612_5-layer_1-width_4
Xwire90@12 m2[11] wire90@12_b wire90-602_4-layer_1-width_4
Xwire90@13 m2[12] wire90@13_b wire90-607-layer_1-width_4
Xwire90@14 m2[13] wire90@14_b wire90-602_4-layer_1-width_4
Xwire90@15 m2[14] wire90@15_b wire90-620_5-layer_1-width_4
Xwire90@16 m2[15] wire90@16_b wire90-602_4-layer_1-width_4
Xwire90@17 m2[16] wire90@17_b wire90-624_5-layer_1-width_4
Xwire90@18 m2[17] wire90@18_b wire90-602_4-layer_1-width_4
Xwire90@19 m2[18] wire90@19_b wire90-618-layer_1-width_4
Xwire90@20 m2[19] wire90@20_b wire90-605_4-layer_1-width_4
Xwire90@21 m2[20] wire90@21_b wire90-613_4-layer_1-width_4
Xwire90@22 m2[21] wire90@22_b wire90-605_4-layer_1-width_4
Xwire90@23 m2[22] wire90@23_b wire90-623_9-layer_1-width_4
Xwire90@24 m2[23] wire90@24_b wire90-605_4-layer_1-width_4
Xwire90@25 m2[24] wire90@25_b wire90-625_9-layer_1-width_4
Xwire90@26 m2[25] wire90@26_b wire90-607_8-layer_1-width_4
Xwire90@27 m2[26] wire90@27_b wire90-620_9-layer_1-width_4
Xwire90@28 m2[27] wire90@28_b wire90-605_4-layer_1-width_4
Xwire90@29 m2[28] wire90@29_b wire90-612_5-layer_1-width_4
Xwire90@30 m2[29] wire90@30_b wire90-602_4-layer_1-width_4
Xwire90@31 m2[30] wire90@31_b wire90-607-layer_1-width_4
Xwire90@32 m2[31] wire90@32_b wire90-602_4-layer_1-width_4
Xwire90@33 m2[32] wire90@33_b wire90-620_5-layer_1-width_4
Xwire90@34 m2[33] wire90@34_b wire90-602_4-layer_1-width_4
Xwire90@35 m2[34] wire90@35_b wire90-624_5-layer_1-width_4
Xwire90@36 m2[35] wire90@36_b wire90-602_4-layer_1-width_4
Xwire90@37 m2[36] wire90@37_b wire90-618-layer_1-width_4
.ENDS m12stageD

*** CELL: redFour:nand2_sy{sch}
.SUBCKT nand2_sy-X_40 ina inb out
XPMOS@0 out inb vdd PMOSx-X_40
XPMOS@1 out ina vdd PMOSx-X_40
Xnms2_sy@0 out ina inb nms2_sy-X_40
.ENDS nand2_sy-X_40

*** CELL: redFour:nor2HT_sy{sch}
.SUBCKT nor2HT_sy-X_10 ina inb out
XNMOS@0 out inb gnd NMOSx-X_5
XNMOS@1 out ina gnd NMOSx-X_5
Xpms2_sy@0 out ina inb pms2_sy-X_10
.ENDS nor2HT_sy-X_10

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-521_7-R_34_667m a b
Ccap@0 gnd net@14 1.913f
Ccap@1 gnd net@8 1.913f
Ccap@2 gnd net@11 1.913f
Rres@0 net@14 a 3.014
Rres@1 net@11 net@14 6.029
Rres@2 b net@8 3.014
Rres@3 net@8 net@11 6.029
.ENDS wire-C_0_011f-521_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-521_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-521_7-R_34_667m
.ENDS wire90-521_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-509_8-R_34_667m a b
Ccap@0 gnd net@14 1.869f
Ccap@1 gnd net@8 1.869f
Ccap@2 gnd net@11 1.869f
Rres@0 net@14 a 2.946
Rres@1 net@11 net@14 5.891
Rres@2 b net@8 2.946
Rres@3 net@8 net@11 5.891
.ENDS wire-C_0_011f-509_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-509_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-509_8-R_34_667m
.ENDS wire90-509_8-layer_1-width_3

*** CELL: centersJ:ctrAND4in40{sch}
.SUBCKT ctrAND4in40 inA inB inC inD out
Xnand2_sy@0 net@58 net@43 out nand2_sy-X_40
Xnor2HT_s@1 inA inB net@61 nor2HT_sy-X_10
Xnor2n_sy@0 inD inC net@64 nor2n_sy-X_10
Xwire90@0 net@64 net@43 wire90-521_7-layer_1-width_3
Xwire90@2 net@61 net@58 wire90-509_8-layer_1-width_3
.ENDS ctrAND4in40

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-413_4-R_34_667m a b
Ccap@0 gnd net@14 1.516f
Ccap@1 gnd net@8 1.516f
Ccap@2 gnd net@11 1.516f
Rres@0 net@14 a 2.389
Rres@1 net@11 net@14 4.777
Rres@2 b net@8 2.389
Rres@3 net@8 net@11 4.777
.ENDS wire-C_0_011f-413_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-413_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-413_4-R_34_667m
.ENDS wire90-413_4-layer_1-width_3

*** CELL: gaspL:odStage{sch}
.SUBCKT odStage do[L] do[M] do[RQ] fire[ODE] fire[OD] mc pred s[1]
XctrAND4i@0 net@863 do[RQ] do[L] do[M] fire[ODE] ctrAND4in40
Xinv@0 net@863 s[1] inv-X_10
Xinv@5 pred net@664 inv-X_5
Xinv@16 fire[ODE] fire[OD] inv-X_60
XpredDri2@0 fire[OD] mc pred predDri20wMC
XsucDri20@3 fire[OD] do[RQ] sucDri20
Xwire90@15 net@664 net@863 wire90-413_4-layer_1-width_3
.ENDS odStage

*** CELL: fifoL:odStageD{sch}
.SUBCKT odStageD do[L] do[M] do[RQ] fire[ODE] in[10] in[11] in[12] in[13] 
+in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
+in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
+in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred s[1]
Xins20Bx3@0 net@6 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
+in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
+in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
+out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
+out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
+out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
+out[7] out[8] out[9] ins20Bx36
XlatchDri@0 net@3 take[1] latchDriver60
XodStage@0 do[L] do[M] do[RQ] fire[ODE] net@3 mc pred s[1] odStage
Xwire90@1 net@6 take[1] wire90-3715_9-layer_1-width_3
.ENDS odStageD

*** CELL: latchesK:latch2in20A{sch}
.SUBCKT latch2in20A hcl[A] hcl[B] inA[1] inB[1] out[1]
Xhi2inLat@0 hcl[A] hcl[B] inA[1] inB[1] net@36 raw2inLatchF
XinvLT@1 net@16 out[1] inv-X_20
Xwire90@1 net@36 net@16 wire90-242_1-layer_1-width_3
.ENDS latch2in20A

*** CELL: registersL:ins2in20Ax36{sch}
.SUBCKT ins2in20Ax36 hcl[A][1] hcl[B][1] inA[10] inA[11] inA[12] inA[13] 
+inA[14] inA[15] inA[16] inA[17] inA[18] inA[19] inA[1] inA[20] inA[21] 
+inA[22] inA[23] inA[24] inA[25] inA[26] inA[27] inA[28] inA[29] inA[2] 
+inA[30] inA[31] inA[32] inA[33] inA[34] inA[35] inA[36] inA[3] inA[4] inA[5] 
+inA[6] inA[7] inA[8] inA[9] inB[10] inB[11] inB[12] inB[13] inB[14] inB[15] 
+inB[16] inB[17] inB[18] inB[19] inB[1] inB[20] inB[21] inB[22] inB[23] 
+inB[24] inB[25] inB[26] inB[27] inB[28] inB[29] inB[2] inB[30] inB[31] 
+inB[32] inB[33] inB[34] inB[35] inB[36] inB[3] inB[4] inB[5] inB[6] inB[7] 
+inB[8] inB[9] out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] 
+out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] 
+out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] 
+out[34] out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9]
Xlx[1] hcl[A][1] hcl[B][1] inA[1] inB[1] out[1] latch2in20A
Xlx[2] hcl[A][1] hcl[B][1] inA[2] inB[2] out[2] latch2in20A
Xlx[3] hcl[A][1] hcl[B][1] inA[3] inB[3] out[3] latch2in20A
Xlx[4] hcl[A][1] hcl[B][1] inA[4] inB[4] out[4] latch2in20A
Xlx[5] hcl[A][1] hcl[B][1] inA[5] inB[5] out[5] latch2in20A
Xlx[6] hcl[A][1] hcl[B][1] inA[6] inB[6] out[6] latch2in20A
Xlx[7] hcl[A][1] hcl[B][1] inA[7] inB[7] out[7] latch2in20A
Xlx[8] hcl[A][1] hcl[B][1] inA[8] inB[8] out[8] latch2in20A
Xlx[9] hcl[A][1] hcl[B][1] inA[9] inB[9] out[9] latch2in20A
Xlx[10] hcl[A][1] hcl[B][1] inA[10] inB[10] out[10] latch2in20A
Xlx[11] hcl[A][1] hcl[B][1] inA[11] inB[11] out[11] latch2in20A
Xlx[12] hcl[A][1] hcl[B][1] inA[12] inB[12] out[12] latch2in20A
Xlx[13] hcl[A][1] hcl[B][1] inA[13] inB[13] out[13] latch2in20A
Xlx[14] hcl[A][1] hcl[B][1] inA[14] inB[14] out[14] latch2in20A
Xlx[15] hcl[A][1] hcl[B][1] inA[15] inB[15] out[15] latch2in20A
Xlx[16] hcl[A][1] hcl[B][1] inA[16] inB[16] out[16] latch2in20A
Xlx[17] hcl[A][1] hcl[B][1] inA[17] inB[17] out[17] latch2in20A
Xlx[18] hcl[A][1] hcl[B][1] inA[18] inB[18] out[18] latch2in20A
Xlx[19] hcl[A][1] hcl[B][1] inA[19] inB[19] out[19] latch2in20A
Xlx[20] hcl[A][1] hcl[B][1] inA[20] inB[20] out[20] latch2in20A
Xlx[21] hcl[A][1] hcl[B][1] inA[21] inB[21] out[21] latch2in20A
Xlx[22] hcl[A][1] hcl[B][1] inA[22] inB[22] out[22] latch2in20A
Xlx[23] hcl[A][1] hcl[B][1] inA[23] inB[23] out[23] latch2in20A
Xlx[24] hcl[A][1] hcl[B][1] inA[24] inB[24] out[24] latch2in20A
Xlx[25] hcl[A][1] hcl[B][1] inA[25] inB[25] out[25] latch2in20A
Xlx[26] hcl[A][1] hcl[B][1] inA[26] inB[26] out[26] latch2in20A
Xlx[27] hcl[A][1] hcl[B][1] inA[27] inB[27] out[27] latch2in20A
Xlx[28] hcl[A][1] hcl[B][1] inA[28] inB[28] out[28] latch2in20A
Xlx[29] hcl[A][1] hcl[B][1] inA[29] inB[29] out[29] latch2in20A
Xlx[30] hcl[A][1] hcl[B][1] inA[30] inB[30] out[30] latch2in20A
Xlx[31] hcl[A][1] hcl[B][1] inA[31] inB[31] out[31] latch2in20A
Xlx[32] hcl[A][1] hcl[B][1] inA[32] inB[32] out[32] latch2in20A
Xlx[33] hcl[A][1] hcl[B][1] inA[33] inB[33] out[33] latch2in20A
Xlx[34] hcl[A][1] hcl[B][1] inA[34] inB[34] out[34] latch2in20A
Xlx[35] hcl[A][1] hcl[B][1] inA[35] inB[35] out[35] latch2in20A
Xlx[36] hcl[A][1] hcl[B][1] inA[36] inB[36] out[36] latch2in20A
.ENDS ins2in20Ax36

*** CELL: gatesK:andOrInv5{sch}
.SUBCKT andOrInv5 inA inB inC inD out
XPMOSx@0 out inA net@42 PMOSx-X_5
XPMOSx@1 out inB net@42 PMOSx-X_5
XPMOSx@2 out inC net@39 PMOSx-X_5
XPMOSx@3 out inD net@39 PMOSx-X_5
XPMOSx@4 net@39 inA vdd PMOSx-X_5
XPMOSx@5 net@39 inB vdd PMOSx-X_5
XPMOSx@6 net@42 inC vdd PMOSx-X_5
XPMOSx@7 net@42 inD vdd PMOSx-X_5
Xnms2@0 out inA inB nms2-X_5
Xnms2@2 out inD inC nms2-X_5
.ENDS andOrInv5

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-249_5-R_34_667m a b
Ccap@0 gnd net@14 0.915f
Ccap@1 gnd net@8 0.915f
Ccap@2 gnd net@11 0.915f
Rres@0 net@14 a 1.442
Rres@1 net@11 net@14 2.883
Rres@2 b net@8 1.442
Rres@3 net@8 net@11 2.883
.ENDS wire-C_0_011f-249_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-249_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-249_5-R_34_667m
.ENDS wire90-249_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-355_8-R_34_667m a b
Ccap@0 gnd net@14 1.305f
Ccap@1 gnd net@8 1.305f
Ccap@2 gnd net@11 1.305f
Rres@0 net@14 a 2.056
Rres@1 net@11 net@14 4.111
Rres@2 b net@8 2.056
Rres@3 net@8 net@11 4.111
.ENDS wire-C_0_011f-355_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-355_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-355_8-R_34_667m
.ENDS wire90-355_8-layer_1-width_3

*** CELL: centersJ:ctrAND2in30{sch}
.SUBCKT ctrAND2in30 inA inB out
Xinv@0 net@7 net@8 inv-X_10
Xinv@1 net@9 out inv-X_30
Xnor2HT_s@1 inA inB net@6 nor2HT_sy-X_4
Xwire90@0 net@6 net@7 wire90-249_5-layer_1-width_3
Xwire90@1 net@8 net@9 wire90-355_8-layer_1-width_3
.ENDS ctrAND2in30

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_2_5 d g s
MNMOSf@0 d g s gnd nch W='7.5*(1+ABN/sqrt(7.5*2))' L='2' 
+DELVTO='AVT0N/sqrt(7.5*2)'
.ENDS NMOSx-X_2_5

*** CELL: redFour:nor2HT_sy{sch}
.SUBCKT nor2HT_sy-X_5 ina inb out
XNMOS@0 out inb gnd NMOSx-X_2_5
XNMOS@1 out ina gnd NMOSx-X_2_5
Xpms2_sy@0 out ina inb pms2_sy-X_5
.ENDS nor2HT_sy-X_5

*** CELL: centersJ:ctrAND3in30{sch}
.SUBCKT ctrAND3in30 inA inB inC out
Xinv@4 inC net@30 inv-X_4
Xinv@5 net@9 out inv-X_30
Xnand2@0 net@19 net@15 net@27 nand2-X_10
Xnor2HT_s@0 inA inB net@6 nor2HT_sy-X_5
Xwire90@0 net@6 net@15 wire90-252_6-layer_1-width_3
Xwire90@1 net@27 net@9 wire90-366_8-layer_1-width_3
Xwire90@2 net@30 net@19 wire90-176_4-layer_1-width_3
.ENDS ctrAND3in30

*** CELL: redFour:nms2_sy{sch}
.SUBCKT nms2_sy-X_4 d g g2
Xnms2@0 d g g2 nms2-X_2
Xnms2@1 d g2 g nms2-X_2
.ENDS nms2_sy-X_4

*** CELL: redFour:nand2_sy{sch}
.SUBCKT nand2_sy-X_4 ina inb out
XPMOS@0 out inb vdd PMOSx-X_4
XPMOS@1 out ina vdd PMOSx-X_4
Xnms2_sy@0 out ina inb nms2_sy-X_4
.ENDS nand2_sy-X_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-210_3-R_34_667m a b
Ccap@0 gnd net@14 0.771f
Ccap@1 gnd net@8 0.771f
Ccap@2 gnd net@11 0.771f
Rres@0 net@14 a 1.215
Rres@1 net@11 net@14 2.43
Rres@2 b net@8 1.215
Rres@3 net@8 net@11 2.43
.ENDS wire-C_0_011f-210_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-210_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-210_3-R_34_667m
.ENDS wire90-210_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-353_2-R_34_667m a b
Ccap@0 gnd net@14 1.295f
Ccap@1 gnd net@8 1.295f
Ccap@2 gnd net@11 1.295f
Rres@0 net@14 a 2.041
Rres@1 net@11 net@14 4.081
Rres@2 b net@8 2.041
Rres@3 net@8 net@11 4.081
.ENDS wire-C_0_011f-353_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-353_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-353_2-R_34_667m
.ENDS wire90-353_2-layer_1-width_3

*** CELL: latchesK:rsLatchC{sch}
.SUBCKT rsLatchC mc out outBar resetA resetB setA setB
XNMOSx@1 net@188 mc gnd NMOSx-X_4
XPMOSx@3 net@188 net@177 vdd PMOSx-X_10
XPMOSx@4 net@274 resetA vdd PMOSx-X_5
XPMOSx@5 net@274 resetB vdd PMOSx-X_5
XPMOSx@6 net@226 outBar net@273 PMOSx-X_5
XPMOSx@7 net@273 mc net@274 PMOSx-X_5
Xinv@0 net@226 outBar inv-X_20
Xinv@2 outBar out inv-X_20
Xnand2_sy@0 setA setB net@267 nand2_sy-X_4
Xnms2@1 net@188 outBar net@177 nms2-X_2
Xnms2_sy@0 net@226 resetB resetA nms2_sy-X_10
Xwire90@0 net@267 net@177 wire90-210_3-layer_1-width_3
Xwire90@1 net@188 net@226 wire90-353_2-layer_1-width_3
.ENDS rsLatchC

*** CELL: driversL:sucDri20plain{sch}
.SUBCKT sucDri20plain in succ
XPMOSx@0 succ in vdd PMOSx-X_20
Xinv@1 succ net@94 inv-X_4
Xnms2@0 succ net@127 in nms2-X_2
Xwire90@0 net@127 net@94 wire90-124_7-layer_1-width_3
.ENDS sucDri20plain

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-314_7-R_34_667m a b
Ccap@0 gnd net@14 1.154f
Ccap@1 gnd net@8 1.154f
Ccap@2 gnd net@11 1.154f
Rres@0 net@14 a 1.818
Rres@1 net@11 net@14 3.637
Rres@2 b net@8 1.818
Rres@3 net@8 net@11 3.637
.ENDS wire-C_0_011f-314_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-314_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-314_7-R_34_667m
.ENDS wire90-314_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1526_5-R_34_667m a b
Ccap@0 gnd net@14 5.597f
Ccap@1 gnd net@8 5.597f
Ccap@2 gnd net@11 5.597f
Rres@0 net@14 a 8.82
Rres@1 net@11 net@14 17.64
Rres@2 b net@8 8.82
Rres@3 net@8 net@11 17.64
.ENDS wire-C_0_011f-1526_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1526_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1526_5-R_34_667m
.ENDS wire90-1526_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1328_7-R_34_667m a b
Ccap@0 gnd net@14 4.872f
Ccap@1 gnd net@8 4.872f
Ccap@2 gnd net@11 4.872f
Rres@0 net@14 a 7.677
Rres@1 net@11 net@14 15.354
Rres@2 b net@8 7.677
Rres@3 net@8 net@11 15.354
.ENDS wire-C_0_011f-1328_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1328_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1328_7-R_34_667m
.ENDS wire90-1328_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-234_9-R_34_667m a b
Ccap@0 gnd net@14 0.861f
Ccap@1 gnd net@8 0.861f
Ccap@2 gnd net@11 0.861f
Rres@0 net@14 a 1.357
Rres@1 net@11 net@14 2.714
Rres@2 b net@8 1.357
Rres@3 net@8 net@11 2.714
.ENDS wire-C_0_011f-234_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-234_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-234_9-R_34_667m
.ENDS wire90-234_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1122_1-R_34_667m a b
Ccap@0 gnd net@14 4.114f
Ccap@1 gnd net@8 4.114f
Ccap@2 gnd net@11 4.114f
Rres@0 net@14 a 6.483
Rres@1 net@11 net@14 12.966
Rres@2 b net@8 6.483
Rres@3 net@8 net@11 12.966
.ENDS wire-C_0_011f-1122_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1122_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1122_1-R_34_667m
.ENDS wire90-1122_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-820_7-R_34_667m a b
Ccap@0 gnd net@14 3.009f
Ccap@1 gnd net@8 3.009f
Ccap@2 gnd net@11 3.009f
Rres@0 net@14 a 4.742
Rres@1 net@11 net@14 9.484
Rres@2 b net@8 4.742
Rres@3 net@8 net@11 9.484
.ENDS wire-C_0_011f-820_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-820_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-820_7-R_34_667m
.ENDS wire90-820_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-228_4-R_34_667m a b
Ccap@0 gnd net@14 0.837f
Ccap@1 gnd net@8 0.837f
Ccap@2 gnd net@11 0.837f
Rres@0 net@14 a 1.32
Rres@1 net@11 net@14 2.639
Rres@2 b net@8 1.32
Rres@3 net@8 net@11 2.639
.ENDS wire-C_0_011f-228_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-228_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-228_4-R_34_667m
.ENDS wire90-228_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-707_6-R_34_667m a b
Ccap@0 gnd net@14 2.595f
Ccap@1 gnd net@8 2.595f
Ccap@2 gnd net@11 2.595f
Rres@0 net@14 a 4.088
Rres@1 net@11 net@14 8.177
Rres@2 b net@8 4.088
Rres@3 net@8 net@11 8.177
.ENDS wire-C_0_011f-707_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-707_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-707_6-R_34_667m
.ENDS wire90-707_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-812_8-R_34_667m a b
Ccap@0 gnd net@14 2.98f
Ccap@1 gnd net@8 2.98f
Ccap@2 gnd net@11 2.98f
Rres@0 net@14 a 4.696
Rres@1 net@11 net@14 9.392
Rres@2 b net@8 4.696
Rres@3 net@8 net@11 9.392
.ENDS wire-C_0_011f-812_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-812_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-812_8-R_34_667m
.ENDS wire90-812_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-428_6-R_34_667m a b
Ccap@0 gnd net@14 1.572f
Ccap@1 gnd net@8 1.572f
Ccap@2 gnd net@11 1.572f
Rres@0 net@14 a 2.476
Rres@1 net@11 net@14 4.953
Rres@2 b net@8 2.476
Rres@3 net@8 net@11 4.953
.ENDS wire-C_0_011f-428_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-428_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-428_6-R_34_667m
.ENDS wire90-428_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-672_2-R_34_667m a b
Ccap@0 gnd net@14 2.465f
Ccap@1 gnd net@8 2.465f
Ccap@2 gnd net@11 2.465f
Rres@0 net@14 a 3.884
Rres@1 net@11 net@14 7.768
Rres@2 b net@8 3.884
Rres@3 net@8 net@11 7.768
.ENDS wire-C_0_011f-672_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-672_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-672_2-R_34_667m
.ENDS wire90-672_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-495_5-R_34_667m a b
Ccap@0 gnd net@14 1.817f
Ccap@1 gnd net@8 1.817f
Ccap@2 gnd net@11 1.817f
Rres@0 net@14 a 2.863
Rres@1 net@11 net@14 5.726
Rres@2 b net@8 2.863
Rres@3 net@8 net@11 5.726
.ENDS wire-C_0_011f-495_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-495_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-495_5-R_34_667m
.ENDS wire90-495_5-layer_1-width_3

*** CELL: gaspL:rqStage{sch}
.SUBCKT rqStage do[RQ] do[epi] do[ring] in[RQ] in[Z] mc s[1] s[2] s[3] s[4] 
+tail take[E] take[R]
XandOrInv@0 nzrq fire[R] fire[E] tailBAR net@239 andOrInv5
XctrAND2i@0 net@324 net@129 fireB ctrAND2in30
XctrAND3i@0 net@8 do[ring] net@124 fire[E] ctrAND3in30
XctrAND4i@1 do[ring] net@205 net@193 net@197 fire[R] ctrAND4in30
Xinv@12 do[epi] net@7 inv-X_5
Xinv@13 net@8 s[1] inv-X_5
Xinv@14 net@197 s[2] inv-X_5
Xinv@15 net@193 s[4] inv-X_5
Xinv@16 net@205 s[3] inv-X_5
Xinv@17 do[RQ] net@324 inv-X_10
Xinv@18 tail net@305 inv-X_10
XlatchDri@0 fire[R] take[R] latchDriver60
XlatchDri@1 fire[E] take[E] latchDriver60
Xnor2n_sy@2 in[Z] in[RQ] net@287 nor2n_sy-X_10
XpredDri2@0 net@121 mc do[epi] predDri20wMC
XpredORdr@0 net@142 net@139 mc do[RQ] predORdri20wMC
XrsLatchC@0 mc net@105 filling fire[R] in[Z] fire[E] tail rsLatchC
XrsLatchC@1 mc net@40 draining fire[R] in[Z] fireB nzrq rsLatchC
XsucDri20@1 net@240 do[ring] sucDri20plain
Xwire90@0 net@7 net@8 wire90-314_7-layer_1-width_3
Xwire90@2 net@142 fire[R] wire90-1526_5-layer_1-width_3
Xwire90@3 net@121 fire[E] wire90-1328_7-layer_1-width_3
Xwire90@4 net@124 net@105 wire90-234_9-layer_1-width_3
Xwire90@5 filling net@197 wire90-1122_1-layer_1-width_3
Xwire90@6 draining net@193 wire90-820_7-layer_1-width_3
Xwire90@7 net@129 net@40 wire90-228_4-layer_1-width_3
Xwire90@8 net@324 net@205 wire90-707_6-layer_1-width_3
Xwire90@9 net@139 fireB wire90-812_8-layer_1-width_3
Xwire90@14 net@239 net@240 wire90-428_6-layer_1-width_3
Xwire90@17 nzrq net@287 wire90-672_2-layer_1-width_3
Xwire90@18 net@305 tailBAR wire90-495_5-layer_1-width_3
.ENDS rqStage

*** CELL: fifoL:rqStageD{sch}
.SUBCKT rqStageD do[RQ] do[epi] do[ring] inE[10] inE[11] inE[12] inE[13] 
+inE[14] inE[15] inE[16] inE[17] inE[18] inE[19] inE[1] inE[20] inE[21] 
+inE[22] inE[23] inE[24] inE[25] inE[26] inE[27] inE[28] inE[29] inE[2] 
+inE[30] inE[31] inE[32] inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] 
+inE[6] inE[7] inE[8] inE[9] inR[10] inR[11] inR[12] inR[13] inR[14] inR[15] 
+inR[16] inR[17] inR[18] inR[19] inR[1] inR[20] inR[21] inR[22] inR[23] 
+inR[24] inR[25] inR[26] inR[27] inR[28] inR[29] inR[2] inR[30] inR[31] 
+inR[32] inR[33] inR[34] inR[35] inR[36] inR[3] inR[4] inR[5] inR[6] inR[7] 
+inR[8] inR[9] mc olcNZ out[10] out[11] out[12] out[13] out[14] out[15] 
+out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] out[23] 
+out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] out[31] 
+out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] out[7] 
+out[8] out[9] s[1] s[2] s[3] s[4]
XbitAssig@0 bitAssignments
Xins2in20@1 net@49 net@47 inR[10] inR[11] inR[12] inR[13] inR[14] inR[15] 
+inR[16] inR[17] inR[18] inR[19] inR[1] inR[20] inR[21] inR[22] inR[23] 
+inR[24] inR[25] inR[26] inR[27] inR[28] inR[29] inR[2] inR[30] inR[31] 
+inR[32] inR[33] inR[34] inR[35] inR[36] inR[3] inR[4] inR[5] inR[6] inR[7] 
+inR[8] inR[9] inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] inE[17] 
+inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] inE[25] 
+inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] inE[33] 
+inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] inE[9] 
+out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
+out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
+out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
+out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] ins2in20Ax36
Xinv@0 olcNZ in[Z] inv-X_5
XrqStage@0 do[RQ] do[epi] do[ring] inR[30] in[Z] mc s[1] s[2] s[3] s[4] 
+inE[21] take[E] take[R] rqStage
Xwire90@2 take[R] net@49 wire90-242_1-layer_1-width_3
Xwire90@3 take[E] net@47 wire90-242_1-layer_1-width_3
.ENDS rqStageD

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1358_4-R_26m a b
Ccap@0 gnd net@14 4.981f
Ccap@1 gnd net@8 4.981f
Ccap@2 gnd net@11 4.981f
Rres@0 net@14 a 5.886
Rres@1 net@11 net@14 11.773
Rres@2 b net@8 5.886
Rres@3 net@8 net@11 11.773
.ENDS wire-C_0_011f-1358_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1358_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1358_4-R_26m
.ENDS wire90-1358_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-641-R_26m a b
Ccap@0 gnd net@14 2.35f
Ccap@1 gnd net@8 2.35f
Ccap@2 gnd net@11 2.35f
Rres@0 net@14 a 2.778
Rres@1 net@11 net@14 5.555
Rres@2 b net@8 2.778
Rres@3 net@8 net@11 5.555
.ENDS wire-C_0_011f-641-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-641-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-641-R_26m
.ENDS wire90-641-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-644-R_26m a b
Ccap@0 gnd net@14 2.361f
Ccap@1 gnd net@8 2.361f
Ccap@2 gnd net@11 2.361f
Rres@0 net@14 a 2.791
Rres@1 net@11 net@14 5.581
Rres@2 b net@8 2.791
Rres@3 net@8 net@11 5.581
.ENDS wire-C_0_011f-644-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-644-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-644-R_26m
.ENDS wire90-644-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-647-R_26m a b
Ccap@0 gnd net@14 2.372f
Ccap@1 gnd net@8 2.372f
Ccap@2 gnd net@11 2.372f
Rres@0 net@14 a 2.804
Rres@1 net@11 net@14 5.607
Rres@2 b net@8 2.804
Rres@3 net@8 net@11 5.607
.ENDS wire-C_0_011f-647-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-647-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-647-R_26m
.ENDS wire90-647-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-638-R_26m a b
Ccap@0 gnd net@14 2.339f
Ccap@1 gnd net@8 2.339f
Ccap@2 gnd net@11 2.339f
Rres@0 net@14 a 2.765
Rres@1 net@11 net@14 5.529
Rres@2 b net@8 2.765
Rres@3 net@8 net@11 5.529
.ENDS wire-C_0_011f-638-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-638-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-638-R_26m
.ENDS wire90-638-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-654-R_26m a b
Ccap@0 gnd net@14 2.398f
Ccap@1 gnd net@8 2.398f
Ccap@2 gnd net@11 2.398f
Rres@0 net@14 a 2.834
Rres@1 net@11 net@14 5.668
Rres@2 b net@8 2.834
Rres@3 net@8 net@11 5.668
.ENDS wire-C_0_011f-654-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-654-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-654-R_26m
.ENDS wire90-654-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-636_5-R_26m a b
Ccap@0 gnd net@14 2.334f
Ccap@1 gnd net@8 2.334f
Ccap@2 gnd net@11 2.334f
Rres@0 net@14 a 2.758
Rres@1 net@11 net@14 5.516
Rres@2 b net@8 2.758
Rres@3 net@8 net@11 5.516
.ENDS wire-C_0_011f-636_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-636_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-636_5-R_26m
.ENDS wire90-636_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-645_5-R_26m a b
Ccap@0 gnd net@14 2.367f
Ccap@1 gnd net@8 2.367f
Ccap@2 gnd net@11 2.367f
Rres@0 net@14 a 2.797
Rres@1 net@11 net@14 5.594
Rres@2 b net@8 2.797
Rres@3 net@8 net@11 5.594
.ENDS wire-C_0_011f-645_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-645_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-645_5-R_26m
.ENDS wire90-645_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-639_5-R_26m a b
Ccap@0 gnd net@14 2.345f
Ccap@1 gnd net@8 2.345f
Ccap@2 gnd net@11 2.345f
Rres@0 net@14 a 2.771
Rres@1 net@11 net@14 5.542
Rres@2 b net@8 2.771
Rres@3 net@8 net@11 5.542
.ENDS wire-C_0_011f-639_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-639_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-639_5-R_26m
.ENDS wire90-639_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-604_5-R_26m a b
Ccap@0 gnd net@14 2.216f
Ccap@1 gnd net@8 2.216f
Ccap@2 gnd net@11 2.216f
Rres@0 net@14 a 2.619
Rres@1 net@11 net@14 5.239
Rres@2 b net@8 2.619
Rres@3 net@8 net@11 5.239
.ENDS wire-C_0_011f-604_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-604_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-604_5-R_26m
.ENDS wire90-604_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-625-R_26m a b
Ccap@0 gnd net@14 2.292f
Ccap@1 gnd net@8 2.292f
Ccap@2 gnd net@11 2.292f
Rres@0 net@14 a 2.708
Rres@1 net@11 net@14 5.417
Rres@2 b net@8 2.708
Rres@3 net@8 net@11 5.417
.ENDS wire-C_0_011f-625-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-625-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-625-R_26m
.ENDS wire90-625-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-604_6-R_26m a b
Ccap@0 gnd net@14 2.217f
Ccap@1 gnd net@8 2.217f
Ccap@2 gnd net@11 2.217f
Rres@0 net@14 a 2.62
Rres@1 net@11 net@14 5.24
Rres@2 b net@8 2.62
Rres@3 net@8 net@11 5.24
.ENDS wire-C_0_011f-604_6-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-604_6-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-604_6-R_26m
.ENDS wire90-604_6-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-623-R_26m a b
Ccap@0 gnd net@14 2.284f
Ccap@1 gnd net@8 2.284f
Ccap@2 gnd net@11 2.284f
Rres@0 net@14 a 2.7
Rres@1 net@11 net@14 5.399
Rres@2 b net@8 2.7
Rres@3 net@8 net@11 5.399
.ENDS wire-C_0_011f-623-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-623-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-623-R_26m
.ENDS wire90-623-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-597_9-R_26m a b
Ccap@0 gnd net@14 2.192f
Ccap@1 gnd net@8 2.192f
Ccap@2 gnd net@11 2.192f
Rres@0 net@14 a 2.591
Rres@1 net@11 net@14 5.182
Rres@2 b net@8 2.591
Rres@3 net@8 net@11 5.182
.ENDS wire-C_0_011f-597_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-597_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-597_9-R_26m
.ENDS wire90-597_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2012_6-R_26m a b
Ccap@0 gnd net@14 7.38f
Ccap@1 gnd net@8 7.38f
Ccap@2 gnd net@11 7.38f
Rres@0 net@14 a 8.721
Rres@1 net@11 net@14 17.443
Rres@2 b net@8 8.721
Rres@3 net@8 net@11 17.443
.ENDS wire-C_0_011f-2012_6-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2012_6-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2012_6-R_26m
.ENDS wire90-2012_6-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1745_9-R_26m a b
Ccap@0 gnd net@14 6.402f
Ccap@1 gnd net@8 6.402f
Ccap@2 gnd net@11 6.402f
Rres@0 net@14 a 7.566
Rres@1 net@11 net@14 15.131
Rres@2 b net@8 7.566
Rres@3 net@8 net@11 15.131
.ENDS wire-C_0_011f-1745_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1745_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1745_9-R_26m
.ENDS wire90-1745_9-layer_1-width_4

*** CELL: fifoL:odRQstageD{sch}
.SUBCKT odRQstageD clS[F] clS[T] cl[F] cl[T] do[L] do[M] do[epi] do[ring] 
+fire[ODE] inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] inE[17] 
+inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] inE[25] 
+inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] inE[33] 
+inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] inE[9] 
+in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] in[18] in[19] in[1] 
+in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] in[28] in[29] in[2] 
+in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] in[4] in[5] in[6] 
+in[7] in[8] in[9] mc od[15] od[16] od[17] od[18] od[19] od[20] olcNZ out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] rd[T] sin 
+sout
XodStageD@1 do[L] do[M] net@17 fire[ODE] in[10] in[11] in[12] in[13] in[14] 
+in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
+in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
+in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc od[10] od[11] 
+od[12] od[13] od[14] od[15] od[16] od[17] od[18] od[19] od[1] od[20] od[21] 
+od[22] od[23] od[24] od[25] od[26] od[27] od[28] od[29] od[2] od[30] od[31] 
+od[32] od[33] od[34] od[35] od[36] od[3] od[4] od[5] od[6] od[7] od[8] od[9] 
+pred s[1] odStageD
XrqStageD@0 net@63 do[epi] do[ring] inE[10] inE[11] inE[12] inE[13] inE[14] 
+inE[15] inE[16] inE[17] inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] 
+inE[23] inE[24] inE[25] inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] 
+inE[31] inE[32] inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] 
+inE[7] inE[8] inE[9] od[10] od[11] od[12] od[13] od[14] od[15] od[16] od[17] 
+od[18] od[19] od[1] od[20] od[21] od[22] od[23] od[24] od[25] od[26] od[27] 
+od[28] od[29] od[2] od[30] od[31] od[32] od[33] od[34] od[35] od[36] od[3] 
+od[4] od[5] od[6] od[7] od[8] od[9] mc olcNZ out[10] out[11] out[12] out[13] 
+out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] 
+out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] 
+out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] 
+out[6] out[7] out[8] out[9] s[2] s[3] s[4] s[5] rqStageD
XscanKhx5@0 clS[F] clS[T] cl[F] cl[T] s[1] s[2] s[3] s[4] s[5] mc rd[F] rd[T] 
+sin sout scanKhx5
Xwire90@0 net@17 net@63 wire90-1358_4-layer_1-width_4
Xwire90@1 od[1] wire90@1_b wire90-641-layer_1-width_4
Xwire90@2 od[2] wire90@2_b wire90-641-layer_1-width_4
Xwire90@3 od[3] wire90@3_b wire90-644-layer_1-width_4
Xwire90@4 od[4] wire90@4_b wire90-647-layer_1-width_4
Xwire90@5 od[5] wire90@5_b wire90-638-layer_1-width_4
Xwire90@6 od[6] wire90@6_b wire90-654-layer_1-width_4
Xwire90@7 od[7] wire90@7_b wire90-636_5-layer_1-width_4
Xwire90@8 od[8] wire90@8_b wire90-645_5-layer_1-width_4
Xwire90@9 od[9] wire90@9_b wire90-639_5-layer_1-width_4
Xwire90@10 od[10] wire90@10_b wire90-612_5-layer_1-width_4
Xwire90@11 od[11] wire90@11_b wire90-602_4-layer_1-width_4
Xwire90@12 od[12] wire90@12_b wire90-604_5-layer_1-width_4
Xwire90@13 od[13] wire90@13_b wire90-605_4-layer_1-width_4
Xwire90@14 od[14] wire90@14_b wire90-625-layer_1-width_4
Xwire90@15 od[15] wire90@15_b wire90-604_6-layer_1-width_4
Xwire90@16 od[16] wire90@16_b wire90-623-layer_1-width_4
Xwire90@17 od[17] wire90@17_b wire90-597_9-layer_1-width_4
Xwire90@18 od[18] wire90@18_b wire90-618-layer_1-width_4
Xwire90@19 od[19] wire90@19_b wire90-641-layer_1-width_4
Xwire90@20 od[20] wire90@20_b wire90-641-layer_1-width_4
Xwire90@21 od[21] wire90@21_b wire90-2012_6-layer_1-width_4
Xwire90@22 od[22] wire90@22_b wire90-647-layer_1-width_4
Xwire90@23 od[23] wire90@23_b wire90-638-layer_1-width_4
Xwire90@24 od[24] wire90@24_b wire90-654-layer_1-width_4
Xwire90@25 od[25] wire90@25_b wire90-636_5-layer_1-width_4
Xwire90@26 od[26] wire90@26_b wire90-645_5-layer_1-width_4
Xwire90@27 od[27] wire90@27_b wire90-639_5-layer_1-width_4
Xwire90@28 od[28] wire90@28_b wire90-612_5-layer_1-width_4
Xwire90@29 od[29] wire90@29_b wire90-602_4-layer_1-width_4
Xwire90@30 od[30] wire90@30_b wire90-1745_9-layer_1-width_4
Xwire90@31 od[31] wire90@31_b wire90-605_4-layer_1-width_4
Xwire90@32 od[32] wire90@32_b wire90-625-layer_1-width_4
Xwire90@33 od[33] wire90@33_b wire90-604_6-layer_1-width_4
Xwire90@34 od[34] wire90@34_b wire90-623-layer_1-width_4
Xwire90@35 od[35] wire90@35_b wire90-597_9-layer_1-width_4
Xwire90@36 od[36] wire90@36_b wire90-618-layer_1-width_4
.ENDS odRQstageD

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-162_4-R_34_667m a b
Ccap@0 gnd net@14 0.595f
Ccap@1 gnd net@8 0.595f
Ccap@2 gnd net@11 0.595f
Rres@0 net@14 a 0.938
Rres@1 net@11 net@14 1.877
Rres@2 b net@8 0.938
Rres@3 net@8 net@11 1.877
.ENDS wire-C_0_011f-162_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-162_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-162_4-R_34_667m
.ENDS wire90-162_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-228_5-R_34_667m a b
Ccap@0 gnd net@14 0.838f
Ccap@1 gnd net@8 0.838f
Ccap@2 gnd net@11 0.838f
Rres@0 net@14 a 1.32
Rres@1 net@11 net@14 2.64
Rres@2 b net@8 1.32
Rres@3 net@8 net@11 2.64
.ENDS wire-C_0_011f-228_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-228_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-228_5-R_34_667m
.ENDS wire90-228_5-layer_1-width_3

*** CELL: latchesK:rsLatchA{sch}
.SUBCKT rsLatchA mc out outBar reset set
XNMOSx@0 net@193 reset gnd NMOSx-X_10
XNMOSx@1 net@188 mc gnd NMOSx-X_4
XPMOSx@3 net@188 net@177 vdd PMOSx-X_10
Xinv@0 net@193 outBar inv-X_10
Xinv@1 set net@213 inv-X_4
Xinv@2 outBar out inv-X_10
Xnms2@0 net@188 outBar net@177 nms2-X_2
Xpms3@0 net@193 mc outBar reset pms3-X_1
Xwire90@0 net@213 net@177 wire90-162_4-layer_1-width_3
Xwire90@1 net@188 net@193 wire90-228_5-layer_1-width_3
.ENDS rsLatchA

*** CELL: driversL:sucORdri20{sch}
.SUBCKT sucORdri20 inA inB succ
XPMOSx@0 succ net@51 vdd PMOSx-X_20
Xinv@0 succ net@71 inv-X_4
Xnms2@0 succ net@73 net@51 nms2-X_2
Xnor2_sy@0 inA inB net@67 nor2_sy-X_5
Xwire90@0 net@67 net@51 wire90-1001_8-layer_1-width_3
Xwire90@1 net@73 net@71 wire90-209-layer_1-width_3
.ENDS sucORdri20

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-345_1-R_34_667m a b
Ccap@0 gnd net@14 1.265f
Ccap@1 gnd net@8 1.265f
Ccap@2 gnd net@11 1.265f
Rres@0 net@14 a 1.994
Rres@1 net@11 net@14 3.988
Rres@2 b net@8 1.994
Rres@3 net@8 net@11 3.988
.ENDS wire-C_0_011f-345_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-345_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-345_1-R_34_667m
.ENDS wire90-345_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-537-R_34_667m a b
Ccap@0 gnd net@14 1.969f
Ccap@1 gnd net@8 1.969f
Ccap@2 gnd net@11 1.969f
Rres@0 net@14 a 3.103
Rres@1 net@11 net@14 6.205
Rres@2 b net@8 3.103
Rres@3 net@8 net@11 6.205
.ENDS wire-C_0_011f-537-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-537-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-537-R_34_667m
.ENDS wire90-537-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-470_7-R_34_667m a b
Ccap@0 gnd net@14 1.726f
Ccap@1 gnd net@8 1.726f
Ccap@2 gnd net@11 1.726f
Rres@0 net@14 a 2.72
Rres@1 net@11 net@14 5.439
Rres@2 b net@8 2.72
Rres@3 net@8 net@11 5.439
.ENDS wire-C_0_011f-470_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-470_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-470_7-R_34_667m
.ENDS wire90-470_7-layer_1-width_3

*** CELL: gaspL:anAltEnd{sch}
.SUBCKT anAltEnd fire[A] fire[B] mc predA predB s[1] s[2] s[3] succ
XctrAND4i@2 net@1013 succ fire[B] s[2] fire[A] ctrAND4in30
XctrAND4i@3 net@1007 succ net@1127 fire[A] fire[B] ctrAND4in30
Xinv@3 net@822 s[1] inv-X_10
Xinv@4 net@824 s[3] inv-X_10
Xinv@5 predA net@822 inv-X_5
Xinv@6 predB net@824 inv-X_5
XpredDri2@0 fire[A] mc predA predDri20wMC
XpredDri2@1 fire[B] mc predB predDri20wMC
XrsLatchA@1 mc net@1040 net@1082 fire[B] fire[A] rsLatchA
XsucORdri@0 fire[A] fire[B] succ sucORdri20
Xwire90@34 net@824 net@1007 wire90-345_1-layer_1-width_3
Xwire90@35 net@822 net@1013 wire90-345_1-layer_1-width_3
Xwire90@36 net@1127 net@1082 wire90-537-layer_1-width_3
Xwire90@37 s[2] net@1040 wire90-470_7-layer_1-width_3
.ENDS anAltEnd

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-293_4-R_34_667m a b
Ccap@0 gnd net@14 1.076f
Ccap@1 gnd net@8 1.076f
Ccap@2 gnd net@11 1.076f
Rres@0 net@14 a 1.695
Rres@1 net@11 net@14 3.39
Rres@2 b net@8 1.695
Rres@3 net@8 net@11 3.39
.ENDS wire-C_0_011f-293_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-293_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-293_4-R_34_667m
.ENDS wire90-293_4-layer_1-width_3

*** CELL: scanK:scanKhx3{sch}
.SUBCKT scanKhx3 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] mc rd[F] 
+rd[T] sin sout
XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
+scanCellKh
XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
+scanCellKh
XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 sout 
+scanCellKh
Xwire90@0 net@18 net@31 wire90-293_4-layer_1-width_3
Xwire90@1 net@20 net@32 wire90-293_4-layer_1-width_3
.ENDS scanKhx3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1336_2-R_34_667m a b
Ccap@0 gnd net@14 4.899f
Ccap@1 gnd net@8 4.899f
Ccap@2 gnd net@11 4.899f
Rres@0 net@14 a 7.72
Rres@1 net@11 net@14 15.441
Rres@2 b net@8 7.72
Rres@3 net@8 net@11 15.441
.ENDS wire-C_0_011f-1336_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1336_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1336_2-R_34_667m
.ENDS wire90-1336_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1307-R_34_667m a b
Ccap@0 gnd net@14 4.792f
Ccap@1 gnd net@8 4.792f
Ccap@2 gnd net@11 4.792f
Rres@0 net@14 a 7.552
Rres@1 net@11 net@14 15.103
Rres@2 b net@8 7.552
Rres@3 net@8 net@11 15.103
.ENDS wire-C_0_011f-1307-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1307-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1307-R_34_667m
.ENDS wire90-1307-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-403_1-R_34_667m a b
Ccap@0 gnd net@14 1.478f
Ccap@1 gnd net@8 1.478f
Ccap@2 gnd net@11 1.478f
Rres@0 net@14 a 2.329
Rres@1 net@11 net@14 4.658
Rres@2 b net@8 2.329
Rres@3 net@8 net@11 4.658
.ENDS wire-C_0_011f-403_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-403_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-403_1-R_34_667m
.ENDS wire90-403_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-600_8-R_34_667m a b
Ccap@0 gnd net@14 2.203f
Ccap@1 gnd net@8 2.203f
Ccap@2 gnd net@11 2.203f
Rres@0 net@14 a 3.471
Rres@1 net@11 net@14 6.943
Rres@2 b net@8 3.471
Rres@3 net@8 net@11 6.943
.ENDS wire-C_0_011f-600_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-600_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-600_8-R_34_667m
.ENDS wire90-600_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-274_5-R_34_667m a b
Ccap@0 gnd net@14 1.006f
Ccap@1 gnd net@8 1.006f
Ccap@2 gnd net@11 1.006f
Rres@0 net@14 a 1.586
Rres@1 net@11 net@14 3.172
Rres@2 b net@8 1.586
Rres@3 net@8 net@11 3.172
.ENDS wire-C_0_011f-274_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-274_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-274_5-R_34_667m
.ENDS wire90-274_5-layer_1-width_3

*** CELL: gaspL:anAltEndS{sch}
.SUBCKT anAltEndS clS[F] clS[T] cl[F] cl[T] mc predA predB rd[F] rd[T] sin 
+sout succ take[A] take[B]
XanAltEnd@1 fire[A] fire[B] mc predA predB ss[1] ss[2] ss[3] succ anAltEnd
XlatchDri@2 net@942 take[A] latchDriver60
XlatchDri@5 net@946 take[B] latchDriver60
XscanKhx3@0 clS[F] clS[T] cl[F] cl[T] ss[1] ss[2] ss[3] mc rd[F] rd[T] sin 
+sout scanKhx3
Xwire90@0 net@946 fire[B] wire90-1336_2-layer_1-width_3
Xwire90@1 net@942 fire[A] wire90-1307-layer_1-width_3
Xwire90@2 wire90@2_a ss[1] wire90-403_1-layer_1-width_3
Xwire90@3 wire90@3_a ss[2] wire90-600_8-layer_1-width_3
Xwire90@4 wire90@4_a ss[3] wire90-274_5-layer_1-width_3
.ENDS anAltEndS

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3929_3-R_34_667m a b
Ccap@0 gnd net@14 14.407f
Ccap@1 gnd net@8 14.407f
Ccap@2 gnd net@11 14.407f
Rres@0 net@14 a 22.703
Rres@1 net@11 net@14 45.405
Rres@2 b net@8 22.703
Rres@3 net@8 net@11 45.405
.ENDS wire-C_0_011f-3929_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3929_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3929_3-R_34_667m
.ENDS wire90-3929_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3970_7-R_34_667m a b
Ccap@0 gnd net@14 14.559f
Ccap@1 gnd net@8 14.559f
Ccap@2 gnd net@11 14.559f
Rres@0 net@14 a 22.942
Rres@1 net@11 net@14 45.884
Rres@2 b net@8 22.942
Rres@3 net@8 net@11 45.884
.ENDS wire-C_0_011f-3970_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3970_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3970_7-R_34_667m
.ENDS wire90-3970_7-layer_1-width_3

*** CELL: fifoL:splitEnd{sch}
.SUBCKT splitEnd clS[F] clS[T] cl[F] cl[T] inA[10] inA[11] inA[12] inA[13] 
+inA[14] inA[15] inA[16] inA[17] inA[18] inA[19] inA[1] inA[20] inA[21] 
+inA[22] inA[23] inA[24] inA[25] inA[26] inA[27] inA[28] inA[29] inA[2] 
+inA[30] inA[31] inA[32] inA[33] inA[34] inA[35] inA[36] inA[3] inA[4] inA[5] 
+inA[6] inA[7] inA[8] inA[9] inB[10] inB[11] inB[12] inB[13] inB[14] inB[15] 
+inB[16] inB[17] inB[18] inB[19] inB[1] inB[20] inB[21] inB[22] inB[23] 
+inB[24] inB[25] inB[26] inB[27] inB[28] inB[29] inB[2] inB[30] inB[31] 
+inB[32] inB[33] inB[34] inB[35] inB[36] inB[3] inB[4] inB[5] inB[6] inB[7] 
+inB[8] inB[9] mc out[10] out[11] out[12] out[13] out[14] out[15] out[16] 
+out[17] out[18] out[19] out[1] out[20] out[21] out[22] out[23] out[24] 
+out[25] out[26] out[27] out[28] out[29] out[2] out[30] out[31] out[32] 
+out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] 
+out[9] predA predB rd[F] rd[T] sin sout succ
XanAltEnd@1 clS[F] clS[T] cl[F] cl[T] mc predA predB rd[F] rd[T] sin sout 
+succ take[A] take[B] anAltEndS
Xins2in20@0 net@38 net@34 inA[10] inA[11] inA[12] inA[13] inA[14] inA[15] 
+inA[16] inA[17] inA[18] inA[19] inA[1] inA[20] inA[21] inA[22] inA[23] 
+inA[24] inA[25] inA[26] inA[27] inA[28] inA[29] inA[2] inA[30] inA[31] 
+inA[32] inA[33] inA[34] inA[35] inA[36] inA[3] inA[4] inA[5] inA[6] inA[7] 
+inA[8] inA[9] inB[10] inB[11] inB[12] inB[13] inB[14] inB[15] inB[16] inB[17] 
+inB[18] inB[19] inB[1] inB[20] inB[21] inB[22] inB[23] inB[24] inB[25] 
+inB[26] inB[27] inB[28] inB[29] inB[2] inB[30] inB[31] inB[32] inB[33] 
+inB[34] inB[35] inB[36] inB[3] inB[4] inB[5] inB[6] inB[7] inB[8] inB[9] 
+out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
+out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
+out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
+out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] ins2in20Ax36
Xwire90@0 net@34 take[B] wire90-3929_3-layer_1-width_3
Xwire90@1 net@38 take[A] wire90-3970_7-layer_1-width_3
.ENDS splitEnd

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-237_2-R_34_667m a b
Ccap@0 gnd net@14 0.87f
Ccap@1 gnd net@8 0.87f
Ccap@2 gnd net@11 0.87f
Rres@0 net@14 a 1.37
Rres@1 net@11 net@14 2.741
Rres@2 b net@8 1.37
Rres@3 net@8 net@11 2.741
.ENDS wire-C_0_011f-237_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-237_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-237_2-R_34_667m
.ENDS wire90-237_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-221_8-R_34_667m a b
Ccap@0 gnd net@14 0.813f
Ccap@1 gnd net@8 0.813f
Ccap@2 gnd net@11 0.813f
Rres@0 net@14 a 1.282
Rres@1 net@11 net@14 2.563
Rres@2 b net@8 1.282
Rres@3 net@8 net@11 2.563
.ENDS wire-C_0_011f-221_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-221_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-221_8-R_34_667m
.ENDS wire90-221_8-layer_1-width_3

*** CELL: centersJ:ctrAND4in30M{sch}
.SUBCKT ctrAND4in30M inA inB inC inD out outM
Xinv@1 outM out inv-X_30
Xnand2@1 net@43 net@58 outM nand2-X_10
Xnor2HT_s@1 inA inB net@61 nor2HT_sy-X_4
Xnor2n@0 inD inC net@64 nor2n-X_5
Xwire90@0 net@64 net@43 wire90-237_2-layer_1-width_3
Xwire90@2 net@61 net@58 wire90-221_8-layer_1-width_3
.ENDS ctrAND4in30M

*** CELL: redFour:nand2_sy{sch}
.SUBCKT nand2_sy-X_10 ina inb out
XPMOS@0 out inb vdd PMOSx-X_10
XPMOS@1 out ina vdd PMOSx-X_10
Xnms2_sy@0 out ina inb nms2_sy-X_10
.ENDS nand2_sy-X_10

*** CELL: redFour:nand2n_sy{sch}
.SUBCKT nand2n_sy-X_10 ina inb out
Xnand2_sy@0 ina inb out nand2_sy-X_10
.ENDS nand2n_sy-X_10

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-700-R_34_667m a b
Ccap@0 gnd net@14 2.567f
Ccap@1 gnd net@8 2.567f
Ccap@2 gnd net@11 2.567f
Rres@0 net@14 a 4.044
Rres@1 net@11 net@14 8.089
Rres@2 b net@8 4.044
Rres@3 net@8 net@11 8.089
.ENDS wire-C_0_011f-700-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-700-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-700-R_34_667m
.ENDS wire90-700-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-839_6-R_34_667m a b
Ccap@0 gnd net@14 3.079f
Ccap@1 gnd net@8 3.079f
Ccap@2 gnd net@11 3.079f
Rres@0 net@14 a 4.851
Rres@1 net@11 net@14 9.702
Rres@2 b net@8 4.851
Rres@3 net@8 net@11 9.702
.ENDS wire-C_0_011f-839_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-839_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-839_6-R_34_667m
.ENDS wire90-839_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-438_2-R_34_667m a b
Ccap@0 gnd net@14 1.607f
Ccap@1 gnd net@8 1.607f
Ccap@2 gnd net@11 1.607f
Rres@0 net@14 a 2.532
Rres@1 net@11 net@14 5.064
Rres@2 b net@8 2.532
Rres@3 net@8 net@11 5.064
.ENDS wire-C_0_011f-438_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-438_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-438_2-R_34_667m
.ENDS wire90-438_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-257_4-R_34_667m a b
Ccap@0 gnd net@14 0.944f
Ccap@1 gnd net@8 0.944f
Ccap@2 gnd net@11 0.944f
Rres@0 net@14 a 1.487
Rres@1 net@11 net@14 2.974
Rres@2 b net@8 1.487
Rres@3 net@8 net@11 2.974
.ENDS wire-C_0_011f-257_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-257_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-257_4-R_34_667m
.ENDS wire90-257_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-458_8-R_34_667m a b
Ccap@0 gnd net@14 1.682f
Ccap@1 gnd net@8 1.682f
Ccap@2 gnd net@11 1.682f
Rres@0 net@14 a 2.651
Rres@1 net@11 net@14 5.302
Rres@2 b net@8 2.651
Rres@3 net@8 net@11 5.302
.ENDS wire-C_0_011f-458_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-458_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-458_8-R_34_667m
.ENDS wire90-458_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-744_5-R_34_667m a b
Ccap@0 gnd net@14 2.73f
Ccap@1 gnd net@8 2.73f
Ccap@2 gnd net@11 2.73f
Rres@0 net@14 a 4.302
Rres@1 net@11 net@14 8.603
Rres@2 b net@8 4.302
Rres@3 net@8 net@11 8.603
.ENDS wire-C_0_011f-744_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-744_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-744_5-R_34_667m
.ENDS wire90-744_5-layer_1-width_3

*** CELL: gaspL:anAltStart{sch}
.SUBCKT anAltStart fire[A] fire[B] mc pred s[1] s[2] succA succB
XctrAND4i@1 net@634 succA fire[B] s[2] fire[A] net@866 ctrAND4in30M
XctrAND4i@3 net@634 succB net@909 fire[A] fire[B] net@885 ctrAND4in30M
Xinv@3 net@634 s[1] inv-X_10
Xinv@4 pred net@787 inv-X_10
Xnand2n_s@0 net@143 net@410 net@422 nand2n_sy-X_10
XpredDri2@0 net@815 mc pred predDri20wMC
XrsLatchA@1 mc net@905 net@911 fire[B] fire[A] rsLatchA
XsucDri20@0 fire[A] succA sucDri20
XsucDri20@1 fire[B] succB sucDri20
Xwire90@16 net@410 net@866 wire90-700-layer_1-width_3
Xwire90@17 net@143 net@885 wire90-839_6-layer_1-width_3
Xwire90@19 s[2] net@905 wire90-438_2-layer_1-width_3
Xwire90@20 net@815 net@422 wire90-257_4-layer_1-width_3
Xwire90@27 net@909 net@911 wire90-458_8-layer_1-width_3
Xwire90@28 net@787 net@634 wire90-744_5-layer_1-width_3
.ENDS anAltStart

*** CELL: driversJ:latchOrDriver60{sch}
.SUBCKT latchOrDriver60 inA inB out
Xinv@0 net@8 out inv-X_60
Xnor2_sy@0 inA inB net@31 nor2_sy-X_20
Xwire90@0 net@31 net@8 wire90-544_2-layer_1-width_3
.ENDS latchOrDriver60

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1300-R_34_667m a b
Ccap@0 gnd net@14 4.767f
Ccap@1 gnd net@8 4.767f
Ccap@2 gnd net@11 4.767f
Rres@0 net@14 a 7.511
Rres@1 net@11 net@14 15.022
Rres@2 b net@8 7.511
Rres@3 net@8 net@11 15.022
.ENDS wire-C_0_011f-1300-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1300-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1300-R_34_667m
.ENDS wire90-1300-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1301_9-R_34_667m a b
Ccap@0 gnd net@14 4.774f
Ccap@1 gnd net@8 4.774f
Ccap@2 gnd net@11 4.774f
Rres@0 net@14 a 7.522
Rres@1 net@11 net@14 15.044
Rres@2 b net@8 7.522
Rres@3 net@8 net@11 15.044
.ENDS wire-C_0_011f-1301_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1301_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1301_9-R_34_667m
.ENDS wire90-1301_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-292_5-R_34_667m a b
Ccap@0 gnd net@14 1.072f
Ccap@1 gnd net@8 1.072f
Ccap@2 gnd net@11 1.072f
Rres@0 net@14 a 1.69
Rres@1 net@11 net@14 3.38
Rres@2 b net@8 1.69
Rres@3 net@8 net@11 3.38
.ENDS wire-C_0_011f-292_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-292_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-292_5-R_34_667m
.ENDS wire90-292_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-559_6-R_34_667m a b
Ccap@0 gnd net@14 2.052f
Ccap@1 gnd net@8 2.052f
Ccap@2 gnd net@11 2.052f
Rres@0 net@14 a 3.233
Rres@1 net@11 net@14 6.466
Rres@2 b net@8 3.233
Rres@3 net@8 net@11 6.466
.ENDS wire-C_0_011f-559_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-559_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-559_6-R_34_667m
.ENDS wire90-559_6-layer_1-width_3

*** CELL: gaspL:anAltStartS{sch}
.SUBCKT anAltStartS clS[F] clS[T] cl[F] cl[T] mc pred rd[F] rd[T] sin sout 
+succA succB take
XanAltSta@1 fire[A] fire[B] mc pred s[1] s[2] succA succB anAltStart
XlatchOrD@0 net@789 net@792 take latchOrDriver60
XscanKhx2@0 clS[F] clS[T] cl[F] cl[T] s[1] s[2] mc rd[F] rd[T] sin sout 
+scanKhx2
Xwire90@0 fire[A] net@789 wire90-1300-layer_1-width_3
Xwire90@1 fire[B] net@792 wire90-1301_9-layer_1-width_3
Xwire90@2 wire90@2_a s[1] wire90-292_5-layer_1-width_3
Xwire90@3 wire90@3_a s[2] wire90-559_6-layer_1-width_3
.ENDS anAltStartS

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3692_5-R_34_667m a b
Ccap@0 gnd net@14 13.539f
Ccap@1 gnd net@8 13.539f
Ccap@2 gnd net@11 13.539f
Rres@0 net@14 a 21.334
Rres@1 net@11 net@14 42.669
Rres@2 b net@8 21.334
Rres@3 net@8 net@11 42.669
.ENDS wire-C_0_011f-3692_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3692_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3692_5-R_34_667m
.ENDS wire90-3692_5-layer_1-width_3

*** CELL: fifoL:splitStart{sch}
.SUBCKT splitStart clS[F] clS[T] cl[F] cl[T] in[10] in[11] in[12] in[13] 
+in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
+in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
+in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] rd[T] sin 
+sout succA succB
XanAltSta@0 clS[F] clS[T] cl[F] cl[T] mc pred rd[F] rd[T] sin sout succA 
+succB net@2 anAltStartS
Xins20Bx3@0 net@3 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
+in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
+in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
+out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
+out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
+out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
+out[7] out[8] out[9] ins20Bx36
Xwire90@0 net@3 net@2 wire90-3692_5-layer_1-width_3
.ENDS splitStart

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-291_8-R_34_667m a b
Ccap@0 gnd net@14 1.07f
Ccap@1 gnd net@8 1.07f
Ccap@2 gnd net@11 1.07f
Rres@0 net@14 a 1.686
Rres@1 net@11 net@14 3.372
Rres@2 b net@8 1.686
Rres@3 net@8 net@11 3.372
.ENDS wire-C_0_011f-291_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-291_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-291_8-R_34_667m
.ENDS wire90-291_8-layer_1-width_3

*** CELL: gaspL:aStage{sch}
.SUBCKT aStage fire mc pred s[1] succ
XctrAND2i@4 net@494 succ fire ctrAND2in30
Xinv@4 net@987 s[1] inv-X_10
Xinv@5 pred net@987 inv-X_5
XpredDri2@1 fire mc pred predDri20wMC
XsucDri20@1 fire succ sucDri20
Xwire90@0 net@987 net@494 wire90-291_8-layer_1-width_3
.ENDS aStage

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3704_051-R_34_667m a b
Ccap@0 gnd net@14 13.582f
Ccap@1 gnd net@8 13.582f
Ccap@2 gnd net@11 13.582f
Rres@0 net@14 a 21.401
Rres@1 net@11 net@14 42.802
Rres@2 b net@8 21.401
Rres@3 net@8 net@11 42.802
.ENDS wire-C_0_011f-3704_051-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3704_051-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3704_051-R_34_667m
.ENDS wire90-3704_051-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-809_6-R_34_667m a b
Ccap@0 gnd net@14 2.969f
Ccap@1 gnd net@8 2.969f
Ccap@2 gnd net@11 2.969f
Rres@0 net@14 a 4.678
Rres@1 net@11 net@14 9.355
Rres@2 b net@8 4.678
Rres@3 net@8 net@11 9.355
.ENDS wire-C_0_011f-809_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-809_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-809_6-R_34_667m
.ENDS wire90-809_6-layer_1-width_3

*** CELL: fifoL:splitStageD{sch}
.SUBCKT splitStageD in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
+in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
+in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] out[11] out[12] out[13] 
+out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] 
+out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] 
+out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] 
+out[6] out[7] out[8] out[9] pred s[1] succ
XaStage@0 net@104 mc pred s[1] succ aStage
Xins20Bx3@0 net@120 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] 
+in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] 
+in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] 
+in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] out[12] out[13] out[14] 
+out[15] out[16] out[17] out[18] out[19] out[1] out[20] out[21] out[22] 
+out[23] out[24] out[25] out[26] out[27] out[28] out[29] out[2] out[30] 
+out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] out[5] out[6] 
+out[7] out[8] out[9] ins20Bx36
XlatchDri@0 fire[1] take[1] latchDriver60
Xwire90@1 net@120 take[1] wire90-3704_051-layer_1-width_3
Xwire90@2 net@104 fire[1] wire90-809_6-layer_1-width_3
.ENDS splitStageD

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-982_1-R_34_667m a b
Ccap@0 gnd net@14 3.601f
Ccap@1 gnd net@8 3.601f
Ccap@2 gnd net@11 3.601f
Rres@0 net@14 a 5.674
Rres@1 net@11 net@14 11.349
Rres@2 b net@8 5.674
Rres@3 net@8 net@11 11.349
.ENDS wire-C_0_011f-982_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-982_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-982_1-R_34_667m
.ENDS wire90-982_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-605_4-R_34_667m a b
Ccap@0 gnd net@14 2.22f
Ccap@1 gnd net@8 2.22f
Ccap@2 gnd net@11 2.22f
Rres@0 net@14 a 3.498
Rres@1 net@11 net@14 6.996
Rres@2 b net@8 3.498
Rres@3 net@8 net@11 6.996
.ENDS wire-C_0_011f-605_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-605_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-605_4-R_34_667m
.ENDS wire90-605_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-613_4-R_34_667m a b
Ccap@0 gnd net@14 2.249f
Ccap@1 gnd net@8 2.249f
Ccap@2 gnd net@11 2.249f
Rres@0 net@14 a 3.544
Rres@1 net@11 net@14 7.088
Rres@2 b net@8 3.544
Rres@3 net@8 net@11 7.088
.ENDS wire-C_0_011f-613_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-613_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-613_4-R_34_667m
.ENDS wire90-613_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-623_9-R_34_667m a b
Ccap@0 gnd net@14 2.288f
Ccap@1 gnd net@8 2.288f
Ccap@2 gnd net@11 2.288f
Rres@0 net@14 a 3.605
Rres@1 net@11 net@14 7.21
Rres@2 b net@8 3.605
Rres@3 net@8 net@11 7.21
.ENDS wire-C_0_011f-623_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-623_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-623_9-R_34_667m
.ENDS wire90-623_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-625_9-R_34_667m a b
Ccap@0 gnd net@14 2.295f
Ccap@1 gnd net@8 2.295f
Ccap@2 gnd net@11 2.295f
Rres@0 net@14 a 3.616
Rres@1 net@11 net@14 7.233
Rres@2 b net@8 3.616
Rres@3 net@8 net@11 7.233
.ENDS wire-C_0_011f-625_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-625_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-625_9-R_34_667m
.ENDS wire90-625_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-607_8-R_34_667m a b
Ccap@0 gnd net@14 2.229f
Ccap@1 gnd net@8 2.229f
Ccap@2 gnd net@11 2.229f
Rres@0 net@14 a 3.512
Rres@1 net@11 net@14 7.023
Rres@2 b net@8 3.512
Rres@3 net@8 net@11 7.023
.ENDS wire-C_0_011f-607_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-607_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-607_8-R_34_667m
.ENDS wire90-607_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-620_9-R_34_667m a b
Ccap@0 gnd net@14 2.277f
Ccap@1 gnd net@8 2.277f
Ccap@2 gnd net@11 2.277f
Rres@0 net@14 a 3.587
Rres@1 net@11 net@14 7.175
Rres@2 b net@8 3.587
Rres@3 net@8 net@11 7.175
.ENDS wire-C_0_011f-620_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-620_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-620_9-R_34_667m
.ENDS wire90-620_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-612_5-R_34_667m a b
Ccap@0 gnd net@14 2.246f
Ccap@1 gnd net@8 2.246f
Ccap@2 gnd net@11 2.246f
Rres@0 net@14 a 3.539
Rres@1 net@11 net@14 7.078
Rres@2 b net@8 3.539
Rres@3 net@8 net@11 7.078
.ENDS wire-C_0_011f-612_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-612_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-612_5-R_34_667m
.ENDS wire90-612_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-602_4-R_34_667m a b
Ccap@0 gnd net@14 2.209f
Ccap@1 gnd net@8 2.209f
Ccap@2 gnd net@11 2.209f
Rres@0 net@14 a 3.481
Rres@1 net@11 net@14 6.961
Rres@2 b net@8 3.481
Rres@3 net@8 net@11 6.961
.ENDS wire-C_0_011f-602_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-602_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-602_4-R_34_667m
.ENDS wire90-602_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-607-R_34_667m a b
Ccap@0 gnd net@14 2.226f
Ccap@1 gnd net@8 2.226f
Ccap@2 gnd net@11 2.226f
Rres@0 net@14 a 3.507
Rres@1 net@11 net@14 7.014
Rres@2 b net@8 3.507
Rres@3 net@8 net@11 7.014
.ENDS wire-C_0_011f-607-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-607-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-607-R_34_667m
.ENDS wire90-607-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-620_5-R_34_667m a b
Ccap@0 gnd net@14 2.275f
Ccap@1 gnd net@8 2.275f
Ccap@2 gnd net@11 2.275f
Rres@0 net@14 a 3.585
Rres@1 net@11 net@14 7.17
Rres@2 b net@8 3.585
Rres@3 net@8 net@11 7.17
.ENDS wire-C_0_011f-620_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-620_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-620_5-R_34_667m
.ENDS wire90-620_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-624_5-R_34_667m a b
Ccap@0 gnd net@14 2.29f
Ccap@1 gnd net@8 2.29f
Ccap@2 gnd net@11 2.29f
Rres@0 net@14 a 3.608
Rres@1 net@11 net@14 7.216
Rres@2 b net@8 3.608
Rres@3 net@8 net@11 7.216
.ENDS wire-C_0_011f-624_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-624_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-624_5-R_34_667m
.ENDS wire90-624_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-618-R_34_667m a b
Ccap@0 gnd net@14 2.266f
Ccap@1 gnd net@8 2.266f
Ccap@2 gnd net@11 2.266f
Rres@0 net@14 a 3.571
Rres@1 net@11 net@14 7.141
Rres@2 b net@8 3.571
Rres@3 net@8 net@11 7.141
.ENDS wire-C_0_011f-618-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-618-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-618-R_34_667m
.ENDS wire90-618-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-532-R_34_667m a b
Ccap@0 gnd net@14 1.951f
Ccap@1 gnd net@8 1.951f
Ccap@2 gnd net@11 1.951f
Rres@0 net@14 a 3.074
Rres@1 net@11 net@14 6.148
Rres@2 b net@8 3.074
Rres@3 net@8 net@11 6.148
.ENDS wire-C_0_011f-532-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-532-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-532-R_34_667m
.ENDS wire90-532-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-238-R_34_667m a b
Ccap@0 gnd net@14 0.873f
Ccap@1 gnd net@8 0.873f
Ccap@2 gnd net@11 0.873f
Rres@0 net@14 a 1.375
Rres@1 net@11 net@14 2.75
Rres@2 b net@8 1.375
Rres@3 net@8 net@11 2.75
.ENDS wire-C_0_011f-238-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-238-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-238-R_34_667m
.ENDS wire90-238-layer_1-width_3

*** CELL: fifoL:splitStageDx2{sch}
.SUBCKT splitStageDx2 clS[F] clS[T] cl[F] cl[T] in[10] in[11] in[12] in[13] 
+in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
+in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
+in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] rd[T] sin 
+sout succ
XscanKhx2@0 clS[F] clS[T] cl[F] cl[T] s[1] s[2] mc rd[F] rd[T] sin sout 
+scanKhx2
XsplitSta@1 in[10] in[11] in[12] in[13] in[14] in[15] in[16] in[17] in[18] 
+in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] in[27] in[28] 
+in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] in[3] in[4] 
+in[5] in[6] in[7] in[8] in[9] mc x[10] x[11] x[12] x[13] x[14] x[15] x[16] 
+x[17] x[18] x[19] x[1] x[20] x[21] x[22] x[23] x[24] x[25] x[26] x[27] x[28] 
+x[29] x[2] x[30] x[31] x[32] x[33] x[34] x[35] x[36] x[3] x[4] x[5] x[6] x[7] 
+x[8] x[9] pred s[1] net@155 splitStageD
XsplitSta@2 x[10] x[11] x[12] x[13] x[14] x[15] x[16] x[17] x[18] x[19] x[1] 
+x[20] x[21] x[22] x[23] x[24] x[25] x[26] x[27] x[28] x[29] x[2] x[30] x[31] 
+x[32] x[33] x[34] x[35] x[36] x[3] x[4] x[5] x[6] x[7] x[8] x[9] mc out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@154 s[2] succ 
+splitStageD
Xwire90@3 net@155 net@154 wire90-982_1-layer_1-width_3
Xwire90@4 x[1] wire90@4_b wire90-605_4-layer_1-width_3
Xwire90@5 x[2] wire90@5_b wire90-613_4-layer_1-width_3
Xwire90@6 x[3] wire90@6_b wire90-605_4-layer_1-width_3
Xwire90@7 x[4] wire90@7_b wire90-623_9-layer_1-width_3
Xwire90@8 x[5] wire90@8_b wire90-605_4-layer_1-width_3
Xwire90@9 x[6] wire90@9_b wire90-625_9-layer_1-width_3
Xwire90@10 x[7] wire90@10_b wire90-607_8-layer_1-width_3
Xwire90@11 x[8] wire90@11_b wire90-620_9-layer_1-width_3
Xwire90@12 x[9] wire90@12_b wire90-605_4-layer_1-width_3
Xwire90@13 x[10] wire90@13_b wire90-612_5-layer_1-width_3
Xwire90@14 x[11] wire90@14_b wire90-602_4-layer_1-width_3
Xwire90@15 x[12] wire90@15_b wire90-607-layer_1-width_3
Xwire90@16 x[13] wire90@16_b wire90-602_4-layer_1-width_3
Xwire90@17 x[14] wire90@17_b wire90-620_5-layer_1-width_3
Xwire90@18 x[15] wire90@18_b wire90-602_4-layer_1-width_3
Xwire90@19 x[16] wire90@19_b wire90-624_5-layer_1-width_3
Xwire90@20 x[17] wire90@20_b wire90-602_4-layer_1-width_3
Xwire90@21 x[18] wire90@21_b wire90-618-layer_1-width_3
Xwire90@22 x[19] wire90@22_b wire90-605_4-layer_1-width_3
Xwire90@23 x[20] wire90@23_b wire90-613_4-layer_1-width_3
Xwire90@24 x[21] wire90@24_b wire90-605_4-layer_1-width_3
Xwire90@25 x[22] wire90@25_b wire90-623_9-layer_1-width_3
Xwire90@26 x[23] wire90@26_b wire90-605_4-layer_1-width_3
Xwire90@27 x[24] wire90@27_b wire90-625_9-layer_1-width_3
Xwire90@28 x[25] wire90@28_b wire90-607_8-layer_1-width_3
Xwire90@29 x[26] wire90@29_b wire90-620_9-layer_1-width_3
Xwire90@30 x[27] wire90@30_b wire90-605_4-layer_1-width_3
Xwire90@31 x[28] wire90@31_b wire90-612_5-layer_1-width_3
Xwire90@32 x[29] wire90@32_b wire90-602_4-layer_1-width_3
Xwire90@33 x[30] wire90@33_b wire90-607-layer_1-width_3
Xwire90@34 x[31] wire90@34_b wire90-602_4-layer_1-width_3
Xwire90@35 x[32] wire90@35_b wire90-620_5-layer_1-width_3
Xwire90@36 x[33] wire90@36_b wire90-602_4-layer_1-width_3
Xwire90@37 x[34] wire90@37_b wire90-624_5-layer_1-width_3
Xwire90@38 x[35] wire90@38_b wire90-602_4-layer_1-width_3
Xwire90@39 x[36] wire90@39_b wire90-618-layer_1-width_3
Xwire90@40 wire90@40_a s[2] wire90-532-layer_1-width_3
Xwire90@41 wire90@41_a s[1] wire90-238-layer_1-width_3
.ENDS splitStageDx2

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2777_3-R_34_667m a b
Ccap@0 gnd net@14 10.183f
Ccap@1 gnd net@8 10.183f
Ccap@2 gnd net@11 10.183f
Rres@0 net@14 a 16.047
Rres@1 net@11 net@14 32.093
Rres@2 b net@8 16.047
Rres@3 net@8 net@11 32.093
.ENDS wire-C_0_011f-2777_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2777_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2777_3-R_34_667m
.ENDS wire90-2777_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2581_1-R_34_667m a b
Ccap@0 gnd net@14 9.464f
Ccap@1 gnd net@8 9.464f
Ccap@2 gnd net@11 9.464f
Rres@0 net@14 a 14.913
Rres@1 net@11 net@14 29.826
Rres@2 b net@8 14.913
Rres@3 net@8 net@11 29.826
.ENDS wire-C_0_011f-2581_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2581_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2581_1-R_34_667m
.ENDS wire90-2581_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2599_6-R_34_667m a b
Ccap@0 gnd net@14 9.532f
Ccap@1 gnd net@8 9.532f
Ccap@2 gnd net@11 9.532f
Rres@0 net@14 a 15.02
Rres@1 net@11 net@14 30.04
Rres@2 b net@8 15.02
Rres@3 net@8 net@11 30.04
.ENDS wire-C_0_011f-2599_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2599_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2599_6-R_34_667m
.ENDS wire90-2599_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2611_1-R_34_667m a b
Ccap@0 gnd net@14 9.574f
Ccap@1 gnd net@8 9.574f
Ccap@2 gnd net@11 9.574f
Rres@0 net@14 a 15.086
Rres@1 net@11 net@14 30.173
Rres@2 b net@8 15.086
Rres@3 net@8 net@11 30.173
.ENDS wire-C_0_011f-2611_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2611_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2611_1-R_34_667m
.ENDS wire90-2611_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2654_1-R_34_667m a b
Ccap@0 gnd net@14 9.732f
Ccap@1 gnd net@8 9.732f
Ccap@2 gnd net@11 9.732f
Rres@0 net@14 a 15.335
Rres@1 net@11 net@14 30.67
Rres@2 b net@8 15.335
Rres@3 net@8 net@11 30.67
.ENDS wire-C_0_011f-2654_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2654_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2654_1-R_34_667m
.ENDS wire90-2654_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2637_1-R_34_667m a b
Ccap@0 gnd net@14 9.669f
Ccap@1 gnd net@8 9.669f
Ccap@2 gnd net@11 9.669f
Rres@0 net@14 a 15.237
Rres@1 net@11 net@14 30.473
Rres@2 b net@8 15.237
Rres@3 net@8 net@11 30.473
.ENDS wire-C_0_011f-2637_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2637_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2637_1-R_34_667m
.ENDS wire90-2637_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2690_6-R_34_667m a b
Ccap@0 gnd net@14 9.866f
Ccap@1 gnd net@8 9.866f
Ccap@2 gnd net@11 9.866f
Rres@0 net@14 a 15.546
Rres@1 net@11 net@14 31.091
Rres@2 b net@8 15.546
Rres@3 net@8 net@11 31.091
.ENDS wire-C_0_011f-2690_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2690_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2690_6-R_34_667m
.ENDS wire90-2690_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2675_5-R_34_667m a b
Ccap@0 gnd net@14 9.81f
Ccap@1 gnd net@8 9.81f
Ccap@2 gnd net@11 9.81f
Rres@0 net@14 a 15.458
Rres@1 net@11 net@14 30.917
Rres@2 b net@8 15.458
Rres@3 net@8 net@11 30.917
.ENDS wire-C_0_011f-2675_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2675_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2675_5-R_34_667m
.ENDS wire90-2675_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2737_6-R_34_667m a b
Ccap@0 gnd net@14 10.038f
Ccap@1 gnd net@8 10.038f
Ccap@2 gnd net@11 10.038f
Rres@0 net@14 a 15.817
Rres@1 net@11 net@14 31.634
Rres@2 b net@8 15.817
Rres@3 net@8 net@11 31.634
.ENDS wire-C_0_011f-2737_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2737_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2737_6-R_34_667m
.ENDS wire90-2737_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2725_1-R_34_667m a b
Ccap@0 gnd net@14 9.992f
Ccap@1 gnd net@8 9.992f
Ccap@2 gnd net@11 9.992f
Rres@0 net@14 a 15.745
Rres@1 net@11 net@14 31.49
Rres@2 b net@8 15.745
Rres@3 net@8 net@11 31.49
.ENDS wire-C_0_011f-2725_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2725_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2725_1-R_34_667m
.ENDS wire90-2725_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2582_2-R_34_667m a b
Ccap@0 gnd net@14 9.468f
Ccap@1 gnd net@8 9.468f
Ccap@2 gnd net@11 9.468f
Rres@0 net@14 a 14.919
Rres@1 net@11 net@14 29.839
Rres@2 b net@8 14.919
Rres@3 net@8 net@11 29.839
.ENDS wire-C_0_011f-2582_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2582_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2582_2-R_34_667m
.ENDS wire90-2582_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2584_1-R_34_667m a b
Ccap@0 gnd net@14 9.475f
Ccap@1 gnd net@8 9.475f
Ccap@2 gnd net@11 9.475f
Rres@0 net@14 a 14.93
Rres@1 net@11 net@14 29.861
Rres@2 b net@8 14.93
Rres@3 net@8 net@11 29.861
.ENDS wire-C_0_011f-2584_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2584_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2584_1-R_34_667m
.ENDS wire90-2584_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2620_2-R_34_667m a b
Ccap@0 gnd net@14 9.607f
Ccap@1 gnd net@8 9.607f
Ccap@2 gnd net@11 9.607f
Rres@0 net@14 a 15.139
Rres@1 net@11 net@14 30.278
Rres@2 b net@8 15.139
Rres@3 net@8 net@11 30.278
.ENDS wire-C_0_011f-2620_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2620_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2620_2-R_34_667m
.ENDS wire90-2620_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2660_1-R_34_667m a b
Ccap@0 gnd net@14 9.754f
Ccap@1 gnd net@8 9.754f
Ccap@2 gnd net@11 9.754f
Rres@0 net@14 a 15.369
Rres@1 net@11 net@14 30.739
Rres@2 b net@8 15.369
Rres@3 net@8 net@11 30.739
.ENDS wire-C_0_011f-2660_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2660_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2660_1-R_34_667m
.ENDS wire90-2660_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2681_2-R_34_667m a b
Ccap@0 gnd net@14 9.831f
Ccap@1 gnd net@8 9.831f
Ccap@2 gnd net@11 9.831f
Rres@0 net@14 a 15.491
Rres@1 net@11 net@14 30.983
Rres@2 b net@8 15.491
Rres@3 net@8 net@11 30.983
.ENDS wire-C_0_011f-2681_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2681_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2681_2-R_34_667m
.ENDS wire90-2681_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2708_1-R_34_667m a b
Ccap@0 gnd net@14 9.93f
Ccap@1 gnd net@8 9.93f
Ccap@2 gnd net@11 9.93f
Rres@0 net@14 a 15.647
Rres@1 net@11 net@14 31.294
Rres@2 b net@8 15.647
Rres@3 net@8 net@11 31.294
.ENDS wire-C_0_011f-2708_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2708_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2708_1-R_34_667m
.ENDS wire90-2708_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2733_2-R_34_667m a b
Ccap@0 gnd net@14 10.022f
Ccap@1 gnd net@8 10.022f
Ccap@2 gnd net@11 10.022f
Rres@0 net@14 a 15.792
Rres@1 net@11 net@14 31.584
Rres@2 b net@8 15.792
Rres@3 net@8 net@11 31.584
.ENDS wire-C_0_011f-2733_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2733_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2733_2-R_34_667m
.ENDS wire90-2733_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2760_1-R_34_667m a b
Ccap@0 gnd net@14 10.12f
Ccap@1 gnd net@8 10.12f
Ccap@2 gnd net@11 10.12f
Rres@0 net@14 a 15.947
Rres@1 net@11 net@14 31.894
Rres@2 b net@8 15.947
Rres@3 net@8 net@11 31.894
.ENDS wire-C_0_011f-2760_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2760_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2760_1-R_34_667m
.ENDS wire90-2760_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2778_7-R_34_667m a b
Ccap@0 gnd net@14 10.189f
Ccap@1 gnd net@8 10.189f
Ccap@2 gnd net@11 10.189f
Rres@0 net@14 a 16.055
Rres@1 net@11 net@14 32.109
Rres@2 b net@8 16.055
Rres@3 net@8 net@11 32.109
.ENDS wire-C_0_011f-2778_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2778_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2778_7-R_34_667m
.ENDS wire90-2778_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3023_6-R_34_667m a b
Ccap@0 gnd net@14 11.087f
Ccap@1 gnd net@8 11.087f
Ccap@2 gnd net@11 11.087f
Rres@0 net@14 a 17.47
Rres@1 net@11 net@14 34.939
Rres@2 b net@8 17.47
Rres@3 net@8 net@11 34.939
.ENDS wire-C_0_011f-3023_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3023_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3023_6-R_34_667m
.ENDS wire90-3023_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3036_1-R_34_667m a b
Ccap@0 gnd net@14 11.132f
Ccap@1 gnd net@8 11.132f
Ccap@2 gnd net@11 11.132f
Rres@0 net@14 a 17.542
Rres@1 net@11 net@14 35.084
Rres@2 b net@8 17.542
Rres@3 net@8 net@11 35.084
.ENDS wire-C_0_011f-3036_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3036_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3036_1-R_34_667m
.ENDS wire90-3036_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3046_6-R_34_667m a b
Ccap@0 gnd net@14 11.171f
Ccap@1 gnd net@8 11.171f
Ccap@2 gnd net@11 11.171f
Rres@0 net@14 a 17.603
Rres@1 net@11 net@14 35.205
Rres@2 b net@8 17.603
Rres@3 net@8 net@11 35.205
.ENDS wire-C_0_011f-3046_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3046_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3046_6-R_34_667m
.ENDS wire90-3046_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3053_1-R_34_667m a b
Ccap@0 gnd net@14 11.195f
Ccap@1 gnd net@8 11.195f
Ccap@2 gnd net@11 11.195f
Rres@0 net@14 a 17.64
Rres@1 net@11 net@14 35.28
Rres@2 b net@8 17.64
Rres@3 net@8 net@11 35.28
.ENDS wire-C_0_011f-3053_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3053_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3053_1-R_34_667m
.ENDS wire90-3053_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3026-R_34_667m a b
Ccap@0 gnd net@14 11.095f
Ccap@1 gnd net@8 11.095f
Ccap@2 gnd net@11 11.095f
Rres@0 net@14 a 17.484
Rres@1 net@11 net@14 34.967
Rres@2 b net@8 17.484
Rres@3 net@8 net@11 34.967
.ENDS wire-C_0_011f-3026-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3026-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3026-R_34_667m
.ENDS wire90-3026-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3048_1-R_34_667m a b
Ccap@0 gnd net@14 11.176f
Ccap@1 gnd net@8 11.176f
Ccap@2 gnd net@11 11.176f
Rres@0 net@14 a 17.611
Rres@1 net@11 net@14 35.222
Rres@2 b net@8 17.611
Rres@3 net@8 net@11 35.222
.ENDS wire-C_0_011f-3048_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3048_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3048_1-R_34_667m
.ENDS wire90-3048_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3091_7-R_34_667m a b
Ccap@0 gnd net@14 11.336f
Ccap@1 gnd net@8 11.336f
Ccap@2 gnd net@11 11.336f
Rres@0 net@14 a 17.863
Rres@1 net@11 net@14 35.726
Rres@2 b net@8 17.863
Rres@3 net@8 net@11 35.726
.ENDS wire-C_0_011f-3091_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3091_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3091_7-R_34_667m
.ENDS wire90-3091_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3099_6-R_34_667m a b
Ccap@0 gnd net@14 11.365f
Ccap@1 gnd net@8 11.365f
Ccap@2 gnd net@11 11.365f
Rres@0 net@14 a 17.909
Rres@1 net@11 net@14 35.818
Rres@2 b net@8 17.909
Rres@3 net@8 net@11 35.818
.ENDS wire-C_0_011f-3099_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3099_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3099_6-R_34_667m
.ENDS wire90-3099_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3147_7-R_34_667m a b
Ccap@0 gnd net@14 11.542f
Ccap@1 gnd net@8 11.542f
Ccap@2 gnd net@11 11.542f
Rres@0 net@14 a 18.187
Rres@1 net@11 net@14 36.373
Rres@2 b net@8 18.187
Rres@3 net@8 net@11 36.373
.ENDS wire-C_0_011f-3147_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3147_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3147_7-R_34_667m
.ENDS wire90-3147_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3187_6-R_34_667m a b
Ccap@0 gnd net@14 11.688f
Ccap@1 gnd net@8 11.688f
Ccap@2 gnd net@11 11.688f
Rres@0 net@14 a 18.417
Rres@1 net@11 net@14 36.834
Rres@2 b net@8 18.417
Rres@3 net@8 net@11 36.834
.ENDS wire-C_0_011f-3187_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3187_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3187_6-R_34_667m
.ENDS wire90-3187_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3208_7-R_34_667m a b
Ccap@0 gnd net@14 11.765f
Ccap@1 gnd net@8 11.765f
Ccap@2 gnd net@11 11.765f
Rres@0 net@14 a 18.539
Rres@1 net@11 net@14 37.078
Rres@2 b net@8 18.539
Rres@3 net@8 net@11 37.078
.ENDS wire-C_0_011f-3208_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3208_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3208_7-R_34_667m
.ENDS wire90-3208_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3235_6-R_34_667m a b
Ccap@0 gnd net@14 11.864f
Ccap@1 gnd net@8 11.864f
Ccap@2 gnd net@11 11.864f
Rres@0 net@14 a 18.695
Rres@1 net@11 net@14 37.389
Rres@2 b net@8 18.695
Rres@3 net@8 net@11 37.389
.ENDS wire-C_0_011f-3235_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3235_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3235_6-R_34_667m
.ENDS wire90-3235_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3260_7-R_34_667m a b
Ccap@0 gnd net@14 11.956f
Ccap@1 gnd net@8 11.956f
Ccap@2 gnd net@11 11.956f
Rres@0 net@14 a 18.84
Rres@1 net@11 net@14 37.679
Rres@2 b net@8 18.84
Rres@3 net@8 net@11 37.679
.ENDS wire-C_0_011f-3260_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3260_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3260_7-R_34_667m
.ENDS wire90-3260_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3287_6-R_34_667m a b
Ccap@0 gnd net@14 12.055f
Ccap@1 gnd net@8 12.055f
Ccap@2 gnd net@11 12.055f
Rres@0 net@14 a 18.995
Rres@1 net@11 net@14 37.99
Rres@2 b net@8 18.995
Rres@3 net@8 net@11 37.99
.ENDS wire-C_0_011f-3287_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3287_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3287_6-R_34_667m
.ENDS wire90-3287_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3306_2-R_34_667m a b
Ccap@0 gnd net@14 12.123f
Ccap@1 gnd net@8 12.123f
Ccap@2 gnd net@11 12.123f
Rres@0 net@14 a 19.102
Rres@1 net@11 net@14 38.205
Rres@2 b net@8 19.102
Rres@3 net@8 net@11 38.205
.ENDS wire-C_0_011f-3306_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3306_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3306_2-R_34_667m
.ENDS wire90-3306_2-layer_1-width_3

*** CELL: fifoL:splitStageDx4{sch}
.SUBCKT splitStageDx4 clS[1][F] clS[1][T] clS[2][F] clS[2][T] cl[1][F] 
+cl[1][T] cl[2][F] cl[2][T] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
+in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] in[26] 
+in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] in[36] 
+in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc[1] mc[2] out[10] out[11] out[12] 
+out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] out[20] 
+out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] out[29] 
+out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] out[4] 
+out[5] out[6] out[7] out[8] out[9] pred rd[1][F] rd[1][T] rd[2][F] rd[2][T] 
+sin[1] sin[2] sout[1] sout[2] succ
XsplitSta@4 clS[1][F] clS[1][T] cl[1][F] cl[1][T] in[10] in[11] in[12] in[13] 
+in[14] in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] 
+in[24] in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] 
+in[34] in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc[1] xx[10] 
+xx[11] xx[12] xx[13] xx[14] xx[15] xx[16] xx[17] xx[18] xx[19] xx[1] xx[20] 
+xx[21] xx[22] xx[23] xx[24] xx[25] xx[26] xx[27] xx[28] xx[29] xx[2] xx[30] 
+xx[31] xx[32] xx[33] xx[34] xx[35] xx[36] xx[3] xx[4] xx[5] xx[6] xx[7] xx[8] 
+xx[9] pred rd[1][F] rd[1][T] sin[1] sout[1] net@255 splitStageDx2
XsplitSta@5 clS[2][F] clS[2][T] cl[2][F] cl[2][T] xx[10] xx[11] xx[12] xx[13] 
+xx[14] xx[15] xx[16] xx[17] xx[18] xx[19] xx[1] xx[20] xx[21] xx[22] xx[23] 
+xx[24] xx[25] xx[26] xx[27] xx[28] xx[29] xx[2] xx[30] xx[31] xx[32] xx[33] 
+xx[34] xx[35] xx[36] xx[3] xx[4] xx[5] xx[6] xx[7] xx[8] xx[9] mc[2] out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] 
+out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] 
+out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] 
+out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@258 rd[2][F] 
+rd[2][T] sin[2] sout[2] succ splitStageDx2
Xwire90@3 net@255 net@258 wire90-2777_3-layer_1-width_3
Xwire90@4 xx[1] wire90@4_b wire90-2581_1-layer_1-width_3
Xwire90@5 xx[2] wire90@5_b wire90-2599_6-layer_1-width_3
Xwire90@6 xx[3] wire90@6_b wire90-2611_1-layer_1-width_3
Xwire90@7 xx[4] wire90@7_b wire90-2654_1-layer_1-width_3
Xwire90@8 xx[5] wire90@8_b wire90-2637_1-layer_1-width_3
Xwire90@9 xx[6] wire90@9_b wire90-2690_6-layer_1-width_3
Xwire90@10 xx[7] wire90@10_b wire90-2675_5-layer_1-width_3
Xwire90@11 xx[8] wire90@11_b wire90-2737_6-layer_1-width_3
Xwire90@12 xx[9] wire90@12_b wire90-2725_1-layer_1-width_3
Xwire90@13 xx[10] wire90@13_b wire90-2582_2-layer_1-width_3
Xwire90@14 xx[11] wire90@14_b wire90-2584_1-layer_1-width_3
Xwire90@15 xx[12] wire90@15_b wire90-2620_2-layer_1-width_3
Xwire90@16 xx[13] wire90@16_b wire90-2660_1-layer_1-width_3
Xwire90@17 xx[14] wire90@17_b wire90-2681_2-layer_1-width_3
Xwire90@18 xx[15] wire90@18_b wire90-2708_1-layer_1-width_3
Xwire90@19 xx[16] wire90@19_b wire90-2733_2-layer_1-width_3
Xwire90@20 xx[17] wire90@20_b wire90-2760_1-layer_1-width_3
Xwire90@21 xx[18] wire90@21_b wire90-2778_7-layer_1-width_3
Xwire90@22 xx[19] wire90@22_b wire90-3023_6-layer_1-width_3
Xwire90@23 xx[20] wire90@23_b wire90-3036_1-layer_1-width_3
Xwire90@24 xx[21] wire90@24_b wire90-3023_6-layer_1-width_3
Xwire90@25 xx[22] wire90@25_b wire90-3046_6-layer_1-width_3
Xwire90@26 xx[23] wire90@26_b wire90-3023_6-layer_1-width_3
Xwire90@27 xx[24] wire90@27_b wire90-3053_1-layer_1-width_3
Xwire90@28 xx[25] wire90@28_b wire90-3026-layer_1-width_3
Xwire90@29 xx[26] wire90@29_b wire90-3048_1-layer_1-width_3
Xwire90@30 xx[27] wire90@30_b wire90-3023_6-layer_1-width_3
Xwire90@31 xx[28] wire90@31_b wire90-3091_7-layer_1-width_3
Xwire90@32 xx[29] wire90@32_b wire90-3099_6-layer_1-width_3
Xwire90@33 xx[30] wire90@33_b wire90-3147_7-layer_1-width_3
Xwire90@34 xx[31] wire90@34_b wire90-3187_6-layer_1-width_3
Xwire90@35 xx[32] wire90@35_b wire90-3208_7-layer_1-width_3
Xwire90@36 xx[33] wire90@36_b wire90-3235_6-layer_1-width_3
Xwire90@37 xx[34] wire90@37_b wire90-3260_7-layer_1-width_3
Xwire90@38 xx[35] wire90@38_b wire90-3287_6-layer_1-width_3
Xwire90@39 xx[36] wire90@39_b wire90-3306_2-layer_1-width_3
.ENDS splitStageDx4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1085-R_34_667m a b
Ccap@0 gnd net@14 3.978f
Ccap@1 gnd net@8 3.978f
Ccap@2 gnd net@11 3.978f
Rres@0 net@14 a 6.269
Rres@1 net@11 net@14 12.538
Rres@2 b net@8 6.269
Rres@3 net@8 net@11 12.538
.ENDS wire-C_0_011f-1085-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1085-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1085-R_34_667m
.ENDS wire90-1085-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2816_7-R_34_667m a b
Ccap@0 gnd net@14 10.328f
Ccap@1 gnd net@8 10.328f
Ccap@2 gnd net@11 10.328f
Rres@0 net@14 a 16.274
Rres@1 net@11 net@14 32.549
Rres@2 b net@8 16.274
Rres@3 net@8 net@11 32.549
.ENDS wire-C_0_011f-2816_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2816_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2816_7-R_34_667m
.ENDS wire90-2816_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1847-R_34_667m a b
Ccap@0 gnd net@14 6.772f
Ccap@1 gnd net@8 6.772f
Ccap@2 gnd net@11 6.772f
Rres@0 net@14 a 10.672
Rres@1 net@11 net@14 21.343
Rres@2 b net@8 10.672
Rres@3 net@8 net@11 21.343
.ENDS wire-C_0_011f-1847-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1847-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1847-R_34_667m
.ENDS wire90-1847-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1161-R_34_667m a b
Ccap@0 gnd net@14 4.257f
Ccap@1 gnd net@8 4.257f
Ccap@2 gnd net@11 4.257f
Rres@0 net@14 a 6.708
Rres@1 net@11 net@14 13.416
Rres@2 b net@8 6.708
Rres@3 net@8 net@11 13.416
.ENDS wire-C_0_011f-1161-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1161-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1161-R_34_667m
.ENDS wire90-1161-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-941-R_34_667m a b
Ccap@0 gnd net@14 3.45f
Ccap@1 gnd net@8 3.45f
Ccap@2 gnd net@11 3.45f
Rres@0 net@14 a 5.437
Rres@1 net@11 net@14 10.874
Rres@2 b net@8 5.437
Rres@3 net@8 net@11 10.874
.ENDS wire-C_0_011f-941-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-941-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-941-R_34_667m
.ENDS wire90-941-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-992_5-R_34_667m a b
Ccap@0 gnd net@14 3.639f
Ccap@1 gnd net@8 3.639f
Ccap@2 gnd net@11 3.639f
Rres@0 net@14 a 5.734
Rres@1 net@11 net@14 11.469
Rres@2 b net@8 5.734
Rres@3 net@8 net@11 11.469
.ENDS wire-C_0_011f-992_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-992_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-992_5-R_34_667m
.ENDS wire90-992_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-924_4-R_34_667m a b
Ccap@0 gnd net@14 3.389f
Ccap@1 gnd net@8 3.389f
Ccap@2 gnd net@11 3.389f
Rres@0 net@14 a 5.341
Rres@1 net@11 net@14 10.682
Rres@2 b net@8 5.341
Rres@3 net@8 net@11 10.682
.ENDS wire-C_0_011f-924_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-924_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-924_4-R_34_667m
.ENDS wire90-924_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1463_4-R_34_667m a b
Ccap@0 gnd net@14 5.366f
Ccap@1 gnd net@8 5.366f
Ccap@2 gnd net@11 5.366f
Rres@0 net@14 a 8.455
Rres@1 net@11 net@14 16.91
Rres@2 b net@8 8.455
Rres@3 net@8 net@11 16.91
.ENDS wire-C_0_011f-1463_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1463_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1463_4-R_34_667m
.ENDS wire90-1463_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1346_1-R_34_667m a b
Ccap@0 gnd net@14 4.936f
Ccap@1 gnd net@8 4.936f
Ccap@2 gnd net@11 4.936f
Rres@0 net@14 a 7.777
Rres@1 net@11 net@14 15.555
Rres@2 b net@8 7.777
Rres@3 net@8 net@11 15.555
.ENDS wire-C_0_011f-1346_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1346_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1346_1-R_34_667m
.ENDS wire90-1346_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1337_6-R_34_667m a b
Ccap@0 gnd net@14 4.905f
Ccap@1 gnd net@8 4.905f
Ccap@2 gnd net@11 4.905f
Rres@0 net@14 a 7.728
Rres@1 net@11 net@14 15.457
Rres@2 b net@8 7.728
Rres@3 net@8 net@11 15.457
.ENDS wire-C_0_011f-1337_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1337_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1337_6-R_34_667m
.ENDS wire90-1337_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1339_1-R_34_667m a b
Ccap@0 gnd net@14 4.91f
Ccap@1 gnd net@8 4.91f
Ccap@2 gnd net@11 4.91f
Rres@0 net@14 a 7.737
Rres@1 net@11 net@14 15.474
Rres@2 b net@8 7.737
Rres@3 net@8 net@11 15.474
.ENDS wire-C_0_011f-1339_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1339_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1339_1-R_34_667m
.ENDS wire90-1339_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1356_6-R_34_667m a b
Ccap@0 gnd net@14 4.974f
Ccap@1 gnd net@8 4.974f
Ccap@2 gnd net@11 4.974f
Rres@0 net@14 a 7.838
Rres@1 net@11 net@14 15.676
Rres@2 b net@8 7.838
Rres@3 net@8 net@11 15.676
.ENDS wire-C_0_011f-1356_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1356_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1356_6-R_34_667m
.ENDS wire90-1356_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1341_1-R_34_667m a b
Ccap@0 gnd net@14 4.917f
Ccap@1 gnd net@8 4.917f
Ccap@2 gnd net@11 4.917f
Rres@0 net@14 a 7.749
Rres@1 net@11 net@14 15.497
Rres@2 b net@8 7.749
Rres@3 net@8 net@11 15.497
.ENDS wire-C_0_011f-1341_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1341_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1341_1-R_34_667m
.ENDS wire90-1341_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1345_1-R_34_667m a b
Ccap@0 gnd net@14 4.932f
Ccap@1 gnd net@8 4.932f
Ccap@2 gnd net@11 4.932f
Rres@0 net@14 a 7.772
Rres@1 net@11 net@14 15.543
Rres@2 b net@8 7.772
Rres@3 net@8 net@11 15.543
.ENDS wire-C_0_011f-1345_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1345_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1345_1-R_34_667m
.ENDS wire90-1345_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1361_4-R_34_667m a b
Ccap@0 gnd net@14 4.992f
Ccap@1 gnd net@8 4.992f
Ccap@2 gnd net@11 4.992f
Rres@0 net@14 a 7.866
Rres@1 net@11 net@14 15.732
Rres@2 b net@8 7.866
Rres@3 net@8 net@11 15.732
.ENDS wire-C_0_011f-1361_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1361_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1361_4-R_34_667m
.ENDS wire90-1361_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1342_1-R_34_667m a b
Ccap@0 gnd net@14 4.921f
Ccap@1 gnd net@8 4.921f
Ccap@2 gnd net@11 4.921f
Rres@0 net@14 a 7.754
Rres@1 net@11 net@14 15.509
Rres@2 b net@8 7.754
Rres@3 net@8 net@11 15.509
.ENDS wire-C_0_011f-1342_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1342_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1342_1-R_34_667m
.ENDS wire90-1342_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1349_6-R_34_667m a b
Ccap@0 gnd net@14 4.949f
Ccap@1 gnd net@8 4.949f
Ccap@2 gnd net@11 4.949f
Rres@0 net@14 a 7.798
Rres@1 net@11 net@14 15.595
Rres@2 b net@8 7.798
Rres@3 net@8 net@11 15.595
.ENDS wire-C_0_011f-1349_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1349_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1349_6-R_34_667m
.ENDS wire90-1349_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1345_8-R_34_667m a b
Ccap@0 gnd net@14 4.935f
Ccap@1 gnd net@8 4.935f
Ccap@2 gnd net@11 4.935f
Rres@0 net@14 a 7.776
Rres@1 net@11 net@14 15.551
Rres@2 b net@8 7.776
Rres@3 net@8 net@11 15.551
.ENDS wire-C_0_011f-1345_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1345_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1345_8-R_34_667m
.ENDS wire90-1345_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1346_7-R_34_667m a b
Ccap@0 gnd net@14 4.938f
Ccap@1 gnd net@8 4.938f
Ccap@2 gnd net@11 4.938f
Rres@0 net@14 a 7.781
Rres@1 net@11 net@14 15.562
Rres@2 b net@8 7.781
Rres@3 net@8 net@11 15.562
.ENDS wire-C_0_011f-1346_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1346_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1346_7-R_34_667m
.ENDS wire90-1346_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1330_8-R_34_667m a b
Ccap@0 gnd net@14 4.88f
Ccap@1 gnd net@8 4.88f
Ccap@2 gnd net@11 4.88f
Rres@0 net@14 a 7.689
Rres@1 net@11 net@14 15.378
Rres@2 b net@8 7.689
Rres@3 net@8 net@11 15.378
.ENDS wire-C_0_011f-1330_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1330_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1330_8-R_34_667m
.ENDS wire90-1330_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1339_7-R_34_667m a b
Ccap@0 gnd net@14 4.912f
Ccap@1 gnd net@8 4.912f
Ccap@2 gnd net@11 4.912f
Rres@0 net@14 a 7.74
Rres@1 net@11 net@14 15.481
Rres@2 b net@8 7.74
Rres@3 net@8 net@11 15.481
.ENDS wire-C_0_011f-1339_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1339_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1339_7-R_34_667m
.ENDS wire90-1339_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1353_3-R_34_667m a b
Ccap@0 gnd net@14 4.962f
Ccap@1 gnd net@8 4.962f
Ccap@2 gnd net@11 4.962f
Rres@0 net@14 a 7.819
Rres@1 net@11 net@14 15.638
Rres@2 b net@8 7.819
Rres@3 net@8 net@11 15.638
.ENDS wire-C_0_011f-1353_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1353_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1353_3-R_34_667m
.ENDS wire90-1353_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1355_2-R_34_667m a b
Ccap@0 gnd net@14 4.969f
Ccap@1 gnd net@8 4.969f
Ccap@2 gnd net@11 4.969f
Rres@0 net@14 a 7.83
Rres@1 net@11 net@14 15.66
Rres@2 b net@8 7.83
Rres@3 net@8 net@11 15.66
.ENDS wire-C_0_011f-1355_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1355_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1355_2-R_34_667m
.ENDS wire90-1355_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1359_3-R_34_667m a b
Ccap@0 gnd net@14 4.984f
Ccap@1 gnd net@8 4.984f
Ccap@2 gnd net@11 4.984f
Rres@0 net@14 a 7.854
Rres@1 net@11 net@14 15.707
Rres@2 b net@8 7.854
Rres@3 net@8 net@11 15.707
.ENDS wire-C_0_011f-1359_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1359_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1359_3-R_34_667m
.ENDS wire90-1359_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1357_2-R_34_667m a b
Ccap@0 gnd net@14 4.976f
Ccap@1 gnd net@8 4.976f
Ccap@2 gnd net@11 4.976f
Rres@0 net@14 a 7.842
Rres@1 net@11 net@14 15.683
Rres@2 b net@8 7.842
Rres@3 net@8 net@11 15.683
.ENDS wire-C_0_011f-1357_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1357_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1357_2-R_34_667m
.ENDS wire90-1357_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1356_1-R_34_667m a b
Ccap@0 gnd net@14 4.972f
Ccap@1 gnd net@8 4.972f
Ccap@2 gnd net@11 4.972f
Rres@0 net@14 a 7.835
Rres@1 net@11 net@14 15.67
Rres@2 b net@8 7.835
Rres@3 net@8 net@11 15.67
.ENDS wire-C_0_011f-1356_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1356_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1356_1-R_34_667m
.ENDS wire90-1356_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1379_1-R_34_667m a b
Ccap@0 gnd net@14 5.057f
Ccap@1 gnd net@8 5.057f
Ccap@2 gnd net@11 5.057f
Rres@0 net@14 a 7.968
Rres@1 net@11 net@14 15.936
Rres@2 b net@8 7.968
Rres@3 net@8 net@11 15.936
.ENDS wire-C_0_011f-1379_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1379_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1379_1-R_34_667m
.ENDS wire90-1379_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1351_6-R_34_667m a b
Ccap@0 gnd net@14 4.956f
Ccap@1 gnd net@8 4.956f
Ccap@2 gnd net@11 4.956f
Rres@0 net@14 a 7.809
Rres@1 net@11 net@14 15.618
Rres@2 b net@8 7.809
Rres@3 net@8 net@11 15.618
.ENDS wire-C_0_011f-1351_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1351_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1351_6-R_34_667m
.ENDS wire90-1351_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1376_6-R_34_667m a b
Ccap@0 gnd net@14 5.048f
Ccap@1 gnd net@8 5.048f
Ccap@2 gnd net@11 5.048f
Rres@0 net@14 a 7.954
Rres@1 net@11 net@14 15.907
Rres@2 b net@8 7.954
Rres@3 net@8 net@11 15.907
.ENDS wire-C_0_011f-1376_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1376_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1376_6-R_34_667m
.ENDS wire90-1376_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1372_4-R_34_667m a b
Ccap@0 gnd net@14 5.032f
Ccap@1 gnd net@8 5.032f
Ccap@2 gnd net@11 5.032f
Rres@0 net@14 a 7.929
Rres@1 net@11 net@14 15.859
Rres@2 b net@8 7.929
Rres@3 net@8 net@11 15.859
.ENDS wire-C_0_011f-1372_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1372_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1372_4-R_34_667m
.ENDS wire90-1372_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1373_6-R_34_667m a b
Ccap@0 gnd net@14 5.037f
Ccap@1 gnd net@8 5.037f
Ccap@2 gnd net@11 5.037f
Rres@0 net@14 a 7.936
Rres@1 net@11 net@14 15.873
Rres@2 b net@8 7.936
Rres@3 net@8 net@11 15.873
.ENDS wire-C_0_011f-1373_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1373_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1373_6-R_34_667m
.ENDS wire90-1373_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1360_1-R_34_667m a b
Ccap@0 gnd net@14 4.987f
Ccap@1 gnd net@8 4.987f
Ccap@2 gnd net@11 4.987f
Rres@0 net@14 a 7.858
Rres@1 net@11 net@14 15.717
Rres@2 b net@8 7.858
Rres@3 net@8 net@11 15.717
.ENDS wire-C_0_011f-1360_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1360_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1360_1-R_34_667m
.ENDS wire90-1360_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1323_3-R_34_667m a b
Ccap@0 gnd net@14 4.852f
Ccap@1 gnd net@8 4.852f
Ccap@2 gnd net@11 4.852f
Rres@0 net@14 a 7.646
Rres@1 net@11 net@14 15.291
Rres@2 b net@8 7.646
Rres@3 net@8 net@11 15.291
.ENDS wire-C_0_011f-1323_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1323_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1323_3-R_34_667m
.ENDS wire90-1323_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1330_3-R_34_667m a b
Ccap@0 gnd net@14 4.878f
Ccap@1 gnd net@8 4.878f
Ccap@2 gnd net@11 4.878f
Rres@0 net@14 a 7.686
Rres@1 net@11 net@14 15.372
Rres@2 b net@8 7.686
Rres@3 net@8 net@11 15.372
.ENDS wire-C_0_011f-1330_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1330_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1330_3-R_34_667m
.ENDS wire90-1330_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1329_2-R_34_667m a b
Ccap@0 gnd net@14 4.874f
Ccap@1 gnd net@8 4.874f
Ccap@2 gnd net@11 4.874f
Rres@0 net@14 a 7.68
Rres@1 net@11 net@14 15.36
Rres@2 b net@8 7.68
Rres@3 net@8 net@11 15.36
.ENDS wire-C_0_011f-1329_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1329_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1329_2-R_34_667m
.ENDS wire90-1329_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1325_8-R_34_667m a b
Ccap@0 gnd net@14 4.861f
Ccap@1 gnd net@8 4.861f
Ccap@2 gnd net@11 4.861f
Rres@0 net@14 a 7.66
Rres@1 net@11 net@14 15.32
Rres@2 b net@8 7.66
Rres@3 net@8 net@11 15.32
.ENDS wire-C_0_011f-1325_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1325_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1325_8-R_34_667m
.ENDS wire90-1325_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1344_7-R_34_667m a b
Ccap@0 gnd net@14 4.931f
Ccap@1 gnd net@8 4.931f
Ccap@2 gnd net@11 4.931f
Rres@0 net@14 a 7.769
Rres@1 net@11 net@14 15.539
Rres@2 b net@8 7.769
Rres@3 net@8 net@11 15.539
.ENDS wire-C_0_011f-1344_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1344_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1344_7-R_34_667m
.ENDS wire90-1344_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1327_8-R_34_667m a b
Ccap@0 gnd net@14 4.869f
Ccap@1 gnd net@8 4.869f
Ccap@2 gnd net@11 4.869f
Rres@0 net@14 a 7.672
Rres@1 net@11 net@14 15.343
Rres@2 b net@8 7.672
Rres@3 net@8 net@11 15.343
.ENDS wire-C_0_011f-1327_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1327_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1327_8-R_34_667m
.ENDS wire90-1327_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1321_8-R_34_667m a b
Ccap@0 gnd net@14 4.847f
Ccap@1 gnd net@8 4.847f
Ccap@2 gnd net@11 4.847f
Rres@0 net@14 a 7.637
Rres@1 net@11 net@14 15.274
Rres@2 b net@8 7.637
Rres@3 net@8 net@11 15.274
.ENDS wire-C_0_011f-1321_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1321_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1321_8-R_34_667m
.ENDS wire90-1321_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-638-R_34_667m a b
Ccap@0 gnd net@14 2.339f
Ccap@1 gnd net@8 2.339f
Ccap@2 gnd net@11 2.339f
Rres@0 net@14 a 3.686
Rres@1 net@11 net@14 7.372
Rres@2 b net@8 3.686
Rres@3 net@8 net@11 7.372
.ENDS wire-C_0_011f-638-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-638-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-638-R_34_667m
.ENDS wire90-638-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-641-R_34_667m a b
Ccap@0 gnd net@14 2.35f
Ccap@1 gnd net@8 2.35f
Ccap@2 gnd net@11 2.35f
Rres@0 net@14 a 3.704
Rres@1 net@11 net@14 7.407
Rres@2 b net@8 3.704
Rres@3 net@8 net@11 7.407
.ENDS wire-C_0_011f-641-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-641-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-641-R_34_667m
.ENDS wire90-641-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-644-R_34_667m a b
Ccap@0 gnd net@14 2.361f
Ccap@1 gnd net@8 2.361f
Ccap@2 gnd net@11 2.361f
Rres@0 net@14 a 3.721
Rres@1 net@11 net@14 7.442
Rres@2 b net@8 3.721
Rres@3 net@8 net@11 7.442
.ENDS wire-C_0_011f-644-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-644-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-644-R_34_667m
.ENDS wire90-644-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-635-R_34_667m a b
Ccap@0 gnd net@14 2.328f
Ccap@1 gnd net@8 2.328f
Ccap@2 gnd net@11 2.328f
Rres@0 net@14 a 3.669
Rres@1 net@11 net@14 7.338
Rres@2 b net@8 3.669
Rres@3 net@8 net@11 7.338
.ENDS wire-C_0_011f-635-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-635-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-635-R_34_667m
.ENDS wire90-635-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-666-R_34_667m a b
Ccap@0 gnd net@14 2.442f
Ccap@1 gnd net@8 2.442f
Ccap@2 gnd net@11 2.442f
Rres@0 net@14 a 3.848
Rres@1 net@11 net@14 7.696
Rres@2 b net@8 3.848
Rres@3 net@8 net@11 7.696
.ENDS wire-C_0_011f-666-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-666-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-666-R_34_667m
.ENDS wire90-666-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-633_5-R_34_667m a b
Ccap@0 gnd net@14 2.323f
Ccap@1 gnd net@8 2.323f
Ccap@2 gnd net@11 2.323f
Rres@0 net@14 a 3.66
Rres@1 net@11 net@14 7.32
Rres@2 b net@8 3.66
Rres@3 net@8 net@11 7.32
.ENDS wire-C_0_011f-633_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-633_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-633_5-R_34_667m
.ENDS wire90-633_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-655-R_34_667m a b
Ccap@0 gnd net@14 2.402f
Ccap@1 gnd net@8 2.402f
Ccap@2 gnd net@11 2.402f
Rres@0 net@14 a 3.784
Rres@1 net@11 net@14 7.569
Rres@2 b net@8 3.784
Rres@3 net@8 net@11 7.569
.ENDS wire-C_0_011f-655-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-655-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-655-R_34_667m
.ENDS wire90-655-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-636_5-R_34_667m a b
Ccap@0 gnd net@14 2.334f
Ccap@1 gnd net@8 2.334f
Ccap@2 gnd net@11 2.334f
Rres@0 net@14 a 3.678
Rres@1 net@11 net@14 7.355
Rres@2 b net@8 3.678
Rres@3 net@8 net@11 7.355
.ENDS wire-C_0_011f-636_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-636_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-636_5-R_34_667m
.ENDS wire90-636_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-594_5-R_34_667m a b
Ccap@0 gnd net@14 2.18f
Ccap@1 gnd net@8 2.18f
Ccap@2 gnd net@11 2.18f
Rres@0 net@14 a 3.435
Rres@1 net@11 net@14 6.87
Rres@2 b net@8 3.435
Rres@3 net@8 net@11 6.87
.ENDS wire-C_0_011f-594_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-594_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-594_5-R_34_667m
.ENDS wire90-594_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-599_4-R_34_667m a b
Ccap@0 gnd net@14 2.198f
Ccap@1 gnd net@8 2.198f
Ccap@2 gnd net@11 2.198f
Rres@0 net@14 a 3.463
Rres@1 net@11 net@14 6.926
Rres@2 b net@8 3.463
Rres@3 net@8 net@11 6.926
.ENDS wire-C_0_011f-599_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-599_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-599_4-R_34_667m
.ENDS wire90-599_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-590_5-R_34_667m a b
Ccap@0 gnd net@14 2.165f
Ccap@1 gnd net@8 2.165f
Ccap@2 gnd net@11 2.165f
Rres@0 net@14 a 3.412
Rres@1 net@11 net@14 6.824
Rres@2 b net@8 3.412
Rres@3 net@8 net@11 6.824
.ENDS wire-C_0_011f-590_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-590_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-590_5-R_34_667m
.ENDS wire90-590_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-601_6-R_34_667m a b
Ccap@0 gnd net@14 2.206f
Ccap@1 gnd net@8 2.206f
Ccap@2 gnd net@11 2.206f
Rres@0 net@14 a 3.476
Rres@1 net@11 net@14 6.952
Rres@2 b net@8 3.476
Rres@3 net@8 net@11 6.952
.ENDS wire-C_0_011f-601_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-601_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-601_6-R_34_667m
.ENDS wire90-601_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-605-R_34_667m a b
Ccap@0 gnd net@14 2.218f
Ccap@1 gnd net@8 2.218f
Ccap@2 gnd net@11 2.218f
Rres@0 net@14 a 3.496
Rres@1 net@11 net@14 6.991
Rres@2 b net@8 3.496
Rres@3 net@8 net@11 6.991
.ENDS wire-C_0_011f-605-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-605-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-605-R_34_667m
.ENDS wire90-605-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-594_9-R_34_667m a b
Ccap@0 gnd net@14 2.181f
Ccap@1 gnd net@8 2.181f
Ccap@2 gnd net@11 2.181f
Rres@0 net@14 a 3.437
Rres@1 net@11 net@14 6.874
Rres@2 b net@8 3.437
Rres@3 net@8 net@11 6.874
.ENDS wire-C_0_011f-594_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-594_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-594_9-R_34_667m
.ENDS wire90-594_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-600-R_34_667m a b
Ccap@0 gnd net@14 2.2f
Ccap@1 gnd net@8 2.2f
Ccap@2 gnd net@11 2.2f
Rres@0 net@14 a 3.467
Rres@1 net@11 net@14 6.933
Rres@2 b net@8 3.467
Rres@3 net@8 net@11 6.933
.ENDS wire-C_0_011f-600-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-600-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-600-R_34_667m
.ENDS wire90-600-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-639_5-R_34_667m a b
Ccap@0 gnd net@14 2.345f
Ccap@1 gnd net@8 2.345f
Ccap@2 gnd net@11 2.345f
Rres@0 net@14 a 3.695
Rres@1 net@11 net@14 7.39
Rres@2 b net@8 3.695
Rres@3 net@8 net@11 7.39
.ENDS wire-C_0_011f-639_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-639_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-639_5-R_34_667m
.ENDS wire90-639_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-655_5-R_34_667m a b
Ccap@0 gnd net@14 2.403f
Ccap@1 gnd net@8 2.403f
Ccap@2 gnd net@11 2.403f
Rres@0 net@14 a 3.787
Rres@1 net@11 net@14 7.575
Rres@2 b net@8 3.787
Rres@3 net@8 net@11 7.575
.ENDS wire-C_0_011f-655_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-655_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-655_5-R_34_667m
.ENDS wire90-655_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-632-R_34_667m a b
Ccap@0 gnd net@14 2.317f
Ccap@1 gnd net@8 2.317f
Ccap@2 gnd net@11 2.317f
Rres@0 net@14 a 3.652
Rres@1 net@11 net@14 7.303
Rres@2 b net@8 3.652
Rres@3 net@8 net@11 7.303
.ENDS wire-C_0_011f-632-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-632-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-632-R_34_667m
.ENDS wire90-632-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-645-R_34_667m a b
Ccap@0 gnd net@14 2.365f
Ccap@1 gnd net@8 2.365f
Ccap@2 gnd net@11 2.365f
Rres@0 net@14 a 3.727
Rres@1 net@11 net@14 7.453
Rres@2 b net@8 3.727
Rres@3 net@8 net@11 7.453
.ENDS wire-C_0_011f-645-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-645-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-645-R_34_667m
.ENDS wire90-645-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-600_5-R_34_667m a b
Ccap@0 gnd net@14 2.202f
Ccap@1 gnd net@8 2.202f
Ccap@2 gnd net@11 2.202f
Rres@0 net@14 a 3.47
Rres@1 net@11 net@14 6.939
Rres@2 b net@8 3.47
Rres@3 net@8 net@11 6.939
.ENDS wire-C_0_011f-600_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-600_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-600_5-R_34_667m
.ENDS wire90-600_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-596_4-R_34_667m a b
Ccap@0 gnd net@14 2.187f
Ccap@1 gnd net@8 2.187f
Ccap@2 gnd net@11 2.187f
Rres@0 net@14 a 3.446
Rres@1 net@11 net@14 6.892
Rres@2 b net@8 3.446
Rres@3 net@8 net@11 6.892
.ENDS wire-C_0_011f-596_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-596_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-596_4-R_34_667m
.ENDS wire90-596_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-595-R_34_667m a b
Ccap@0 gnd net@14 2.182f
Ccap@1 gnd net@8 2.182f
Ccap@2 gnd net@11 2.182f
Rres@0 net@14 a 3.438
Rres@1 net@11 net@14 6.876
Rres@2 b net@8 3.438
Rres@3 net@8 net@11 6.876
.ENDS wire-C_0_011f-595-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-595-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-595-R_34_667m
.ENDS wire90-595-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-613-R_34_667m a b
Ccap@0 gnd net@14 2.248f
Ccap@1 gnd net@8 2.248f
Ccap@2 gnd net@11 2.248f
Rres@0 net@14 a 3.542
Rres@1 net@11 net@14 7.084
Rres@2 b net@8 3.542
Rres@3 net@8 net@11 7.084
.ENDS wire-C_0_011f-613-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-613-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-613-R_34_667m
.ENDS wire90-613-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-598_6-R_34_667m a b
Ccap@0 gnd net@14 2.195f
Ccap@1 gnd net@8 2.195f
Ccap@2 gnd net@11 2.195f
Rres@0 net@14 a 3.459
Rres@1 net@11 net@14 6.917
Rres@2 b net@8 3.459
Rres@3 net@8 net@11 6.917
.ENDS wire-C_0_011f-598_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-598_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-598_6-R_34_667m
.ENDS wire90-598_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-611-R_34_667m a b
Ccap@0 gnd net@14 2.24f
Ccap@1 gnd net@8 2.24f
Ccap@2 gnd net@11 2.24f
Rres@0 net@14 a 3.53
Rres@1 net@11 net@14 7.06
Rres@2 b net@8 3.53
Rres@3 net@8 net@11 7.06
.ENDS wire-C_0_011f-611-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-611-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-611-R_34_667m
.ENDS wire90-611-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-591_9-R_34_667m a b
Ccap@0 gnd net@14 2.17f
Ccap@1 gnd net@8 2.17f
Ccap@2 gnd net@11 2.17f
Rres@0 net@14 a 3.42
Rres@1 net@11 net@14 6.84
Rres@2 b net@8 3.42
Rres@3 net@8 net@11 6.84
.ENDS wire-C_0_011f-591_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-591_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-591_9-R_34_667m
.ENDS wire90-591_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-606-R_34_667m a b
Ccap@0 gnd net@14 2.222f
Ccap@1 gnd net@8 2.222f
Ccap@2 gnd net@11 2.222f
Rres@0 net@14 a 3.501
Rres@1 net@11 net@14 7.003
Rres@2 b net@8 3.501
Rres@3 net@8 net@11 7.003
.ENDS wire-C_0_011f-606-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-606-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-606-R_34_667m
.ENDS wire90-606-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1186_7-R_34_667m a b
Ccap@0 gnd net@14 4.351f
Ccap@1 gnd net@8 4.351f
Ccap@2 gnd net@11 4.351f
Rres@0 net@14 a 6.856
Rres@1 net@11 net@14 13.713
Rres@2 b net@8 6.856
Rres@3 net@8 net@11 13.713
.ENDS wire-C_0_011f-1186_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1186_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1186_7-R_34_667m
.ENDS wire90-1186_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1241_2-R_34_667m a b
Ccap@0 gnd net@14 4.551f
Ccap@1 gnd net@8 4.551f
Ccap@2 gnd net@11 4.551f
Rres@0 net@14 a 7.171
Rres@1 net@11 net@14 14.343
Rres@2 b net@8 7.171
Rres@3 net@8 net@11 14.343
.ENDS wire-C_0_011f-1241_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1241_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1241_2-R_34_667m
.ENDS wire90-1241_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1192_7-R_34_667m a b
Ccap@0 gnd net@14 4.373f
Ccap@1 gnd net@8 4.373f
Ccap@2 gnd net@11 4.373f
Rres@0 net@14 a 6.891
Rres@1 net@11 net@14 13.782
Rres@2 b net@8 6.891
Rres@3 net@8 net@11 13.782
.ENDS wire-C_0_011f-1192_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1192_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1192_7-R_34_667m
.ENDS wire90-1192_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1239_2-R_34_667m a b
Ccap@0 gnd net@14 4.544f
Ccap@1 gnd net@8 4.544f
Ccap@2 gnd net@11 4.544f
Rres@0 net@14 a 7.16
Rres@1 net@11 net@14 14.32
Rres@2 b net@8 7.16
Rres@3 net@8 net@11 14.32
.ENDS wire-C_0_011f-1239_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1239_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1239_2-R_34_667m
.ENDS wire90-1239_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1190_7-R_34_667m a b
Ccap@0 gnd net@14 4.366f
Ccap@1 gnd net@8 4.366f
Ccap@2 gnd net@11 4.366f
Rres@0 net@14 a 6.88
Rres@1 net@11 net@14 13.759
Rres@2 b net@8 6.88
Rres@3 net@8 net@11 13.759
.ENDS wire-C_0_011f-1190_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1190_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1190_7-R_34_667m
.ENDS wire90-1190_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1268_7-R_34_667m a b
Ccap@0 gnd net@14 4.652f
Ccap@1 gnd net@8 4.652f
Ccap@2 gnd net@11 4.652f
Rres@0 net@14 a 7.33
Rres@1 net@11 net@14 14.661
Rres@2 b net@8 7.33
Rres@3 net@8 net@11 14.661
.ENDS wire-C_0_011f-1268_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1268_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1268_7-R_34_667m
.ENDS wire90-1268_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1187_7-R_34_667m a b
Ccap@0 gnd net@14 4.355f
Ccap@1 gnd net@8 4.355f
Ccap@2 gnd net@11 4.355f
Rres@0 net@14 a 6.862
Rres@1 net@11 net@14 13.725
Rres@2 b net@8 6.862
Rres@3 net@8 net@11 13.725
.ENDS wire-C_0_011f-1187_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1187_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1187_7-R_34_667m
.ENDS wire90-1187_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1257_7-R_34_667m a b
Ccap@0 gnd net@14 4.612f
Ccap@1 gnd net@8 4.612f
Ccap@2 gnd net@11 4.612f
Rres@0 net@14 a 7.267
Rres@1 net@11 net@14 14.533
Rres@2 b net@8 7.267
Rres@3 net@8 net@11 14.533
.ENDS wire-C_0_011f-1257_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1257_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1257_7-R_34_667m
.ENDS wire90-1257_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1190_2-R_34_667m a b
Ccap@0 gnd net@14 4.364f
Ccap@1 gnd net@8 4.364f
Ccap@2 gnd net@11 4.364f
Rres@0 net@14 a 6.877
Rres@1 net@11 net@14 13.753
Rres@2 b net@8 6.877
Rres@3 net@8 net@11 13.753
.ENDS wire-C_0_011f-1190_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1190_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1190_2-R_34_667m
.ENDS wire90-1190_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1197_6-R_34_667m a b
Ccap@0 gnd net@14 4.391f
Ccap@1 gnd net@8 4.391f
Ccap@2 gnd net@11 4.391f
Rres@0 net@14 a 6.919
Rres@1 net@11 net@14 13.839
Rres@2 b net@8 6.919
Rres@3 net@8 net@11 13.839
.ENDS wire-C_0_011f-1197_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1197_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1197_6-R_34_667m
.ENDS wire90-1197_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1171-R_34_667m a b
Ccap@0 gnd net@14 4.294f
Ccap@1 gnd net@8 4.294f
Ccap@2 gnd net@11 4.294f
Rres@0 net@14 a 6.766
Rres@1 net@11 net@14 13.532
Rres@2 b net@8 6.766
Rres@3 net@8 net@11 13.532
.ENDS wire-C_0_011f-1171-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1171-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1171-R_34_667m
.ENDS wire90-1171-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1186_6-R_34_667m a b
Ccap@0 gnd net@14 4.351f
Ccap@1 gnd net@8 4.351f
Ccap@2 gnd net@11 4.351f
Rres@0 net@14 a 6.856
Rres@1 net@11 net@14 13.712
Rres@2 b net@8 6.856
Rres@3 net@8 net@11 13.712
.ENDS wire-C_0_011f-1186_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1186_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1186_6-R_34_667m
.ENDS wire90-1186_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1178-R_34_667m a b
Ccap@0 gnd net@14 4.319f
Ccap@1 gnd net@8 4.319f
Ccap@2 gnd net@11 4.319f
Rres@0 net@14 a 6.806
Rres@1 net@11 net@14 13.612
Rres@2 b net@8 6.806
Rres@3 net@8 net@11 13.612
.ENDS wire-C_0_011f-1178-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1178-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1178-R_34_667m
.ENDS wire90-1178-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1216_1-R_34_667m a b
Ccap@0 gnd net@14 4.459f
Ccap@1 gnd net@8 4.459f
Ccap@2 gnd net@11 4.459f
Rres@0 net@14 a 7.026
Rres@1 net@11 net@14 14.053
Rres@2 b net@8 7.026
Rres@3 net@8 net@11 14.053
.ENDS wire-C_0_011f-1216_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1216_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1216_1-R_34_667m
.ENDS wire90-1216_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1172_5-R_34_667m a b
Ccap@0 gnd net@14 4.299f
Ccap@1 gnd net@8 4.299f
Ccap@2 gnd net@11 4.299f
Rres@0 net@14 a 6.774
Rres@1 net@11 net@14 13.549
Rres@2 b net@8 6.774
Rres@3 net@8 net@11 13.549
.ENDS wire-C_0_011f-1172_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1172_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1172_5-R_34_667m
.ENDS wire90-1172_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1214_1-R_34_667m a b
Ccap@0 gnd net@14 4.452f
Ccap@1 gnd net@8 4.452f
Ccap@2 gnd net@11 4.452f
Rres@0 net@14 a 7.015
Rres@1 net@11 net@14 14.03
Rres@2 b net@8 7.015
Rres@3 net@8 net@11 14.03
.ENDS wire-C_0_011f-1214_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1214_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1214_1-R_34_667m
.ENDS wire90-1214_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1166_5-R_34_667m a b
Ccap@0 gnd net@14 4.277f
Ccap@1 gnd net@8 4.277f
Ccap@2 gnd net@11 4.277f
Rres@0 net@14 a 6.74
Rres@1 net@11 net@14 13.48
Rres@2 b net@8 6.74
Rres@3 net@8 net@11 13.48
.ENDS wire-C_0_011f-1166_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1166_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1166_5-R_34_667m
.ENDS wire90-1166_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1203_1-R_34_667m a b
Ccap@0 gnd net@14 4.411f
Ccap@1 gnd net@8 4.411f
Ccap@2 gnd net@11 4.411f
Rres@0 net@14 a 6.951
Rres@1 net@11 net@14 13.902
Rres@2 b net@8 6.951
Rres@3 net@8 net@11 13.902
.ENDS wire-C_0_011f-1203_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1203_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1203_1-R_34_667m
.ENDS wire90-1203_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1199_2-R_34_667m a b
Ccap@0 gnd net@14 4.397f
Ccap@1 gnd net@8 4.397f
Ccap@2 gnd net@11 4.397f
Rres@0 net@14 a 6.929
Rres@1 net@11 net@14 13.857
Rres@2 b net@8 6.929
Rres@3 net@8 net@11 13.857
.ENDS wire-C_0_011f-1199_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1199_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1199_2-R_34_667m
.ENDS wire90-1199_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1217_2-R_34_667m a b
Ccap@0 gnd net@14 4.463f
Ccap@1 gnd net@8 4.463f
Ccap@2 gnd net@11 4.463f
Rres@0 net@14 a 7.033
Rres@1 net@11 net@14 14.065
Rres@2 b net@8 7.033
Rres@3 net@8 net@11 14.065
.ENDS wire-C_0_011f-1217_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1217_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1217_2-R_34_667m
.ENDS wire90-1217_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1208_2-R_34_667m a b
Ccap@0 gnd net@14 4.43f
Ccap@1 gnd net@8 4.43f
Ccap@2 gnd net@11 4.43f
Rres@0 net@14 a 6.981
Rres@1 net@11 net@14 13.961
Rres@2 b net@8 6.981
Rres@3 net@8 net@11 13.961
.ENDS wire-C_0_011f-1208_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1208_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1208_2-R_34_667m
.ENDS wire90-1208_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1215_2-R_34_667m a b
Ccap@0 gnd net@14 4.456f
Ccap@1 gnd net@8 4.456f
Ccap@2 gnd net@11 4.456f
Rres@0 net@14 a 7.021
Rres@1 net@11 net@14 14.042
Rres@2 b net@8 7.021
Rres@3 net@8 net@11 14.042
.ENDS wire-C_0_011f-1215_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1215_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1215_2-R_34_667m
.ENDS wire90-1215_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1205_2-R_34_667m a b
Ccap@0 gnd net@14 4.419f
Ccap@1 gnd net@8 4.419f
Ccap@2 gnd net@11 4.419f
Rres@0 net@14 a 6.963
Rres@1 net@11 net@14 13.927
Rres@2 b net@8 6.963
Rres@3 net@8 net@11 13.927
.ENDS wire-C_0_011f-1205_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1205_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1205_2-R_34_667m
.ENDS wire90-1205_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1244_7-R_34_667m a b
Ccap@0 gnd net@14 4.564f
Ccap@1 gnd net@8 4.564f
Ccap@2 gnd net@11 4.564f
Rres@0 net@14 a 7.192
Rres@1 net@11 net@14 14.383
Rres@2 b net@8 7.192
Rres@3 net@8 net@11 14.383
.ENDS wire-C_0_011f-1244_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1244_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1244_7-R_34_667m
.ENDS wire90-1244_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1184_2-R_34_667m a b
Ccap@0 gnd net@14 4.342f
Ccap@1 gnd net@8 4.342f
Ccap@2 gnd net@11 4.342f
Rres@0 net@14 a 6.842
Rres@1 net@11 net@14 13.684
Rres@2 b net@8 6.842
Rres@3 net@8 net@11 13.684
.ENDS wire-C_0_011f-1184_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1184_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1184_2-R_34_667m
.ENDS wire90-1184_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1233_7-R_34_667m a b
Ccap@0 gnd net@14 4.524f
Ccap@1 gnd net@8 4.524f
Ccap@2 gnd net@11 4.524f
Rres@0 net@14 a 7.128
Rres@1 net@11 net@14 14.256
Rres@2 b net@8 7.128
Rres@3 net@8 net@11 14.256
.ENDS wire-C_0_011f-1233_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1233_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1233_7-R_34_667m
.ENDS wire90-1233_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1187_2-R_34_667m a b
Ccap@0 gnd net@14 4.353f
Ccap@1 gnd net@8 4.353f
Ccap@2 gnd net@11 4.353f
Rres@0 net@14 a 6.859
Rres@1 net@11 net@14 13.719
Rres@2 b net@8 6.859
Rres@3 net@8 net@11 13.719
.ENDS wire-C_0_011f-1187_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1187_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1187_2-R_34_667m
.ENDS wire90-1187_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1215_6-R_34_667m a b
Ccap@0 gnd net@14 4.457f
Ccap@1 gnd net@8 4.457f
Ccap@2 gnd net@11 4.457f
Rres@0 net@14 a 7.023
Rres@1 net@11 net@14 14.047
Rres@2 b net@8 7.023
Rres@3 net@8 net@11 14.047
.ENDS wire-C_0_011f-1215_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1215_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1215_6-R_34_667m
.ENDS wire90-1215_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1168-R_34_667m a b
Ccap@0 gnd net@14 4.283f
Ccap@1 gnd net@8 4.283f
Ccap@2 gnd net@11 4.283f
Rres@0 net@14 a 6.748
Rres@1 net@11 net@14 13.497
Rres@2 b net@8 6.748
Rres@3 net@8 net@11 13.497
.ENDS wire-C_0_011f-1168-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1168-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1168-R_34_667m
.ENDS wire90-1168-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1204_6-R_34_667m a b
Ccap@0 gnd net@14 4.417f
Ccap@1 gnd net@8 4.417f
Ccap@2 gnd net@11 4.417f
Rres@0 net@14 a 6.96
Rres@1 net@11 net@14 13.92
Rres@2 b net@8 6.96
Rres@3 net@8 net@11 13.92
.ENDS wire-C_0_011f-1204_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1204_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1204_6-R_34_667m
.ENDS wire90-1204_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1234_1-R_34_667m a b
Ccap@0 gnd net@14 4.525f
Ccap@1 gnd net@8 4.525f
Ccap@2 gnd net@11 4.525f
Rres@0 net@14 a 7.13
Rres@1 net@11 net@14 14.261
Rres@2 b net@8 7.13
Rres@3 net@8 net@11 14.261
.ENDS wire-C_0_011f-1234_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1234_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1234_1-R_34_667m
.ENDS wire90-1234_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1169_5-R_34_667m a b
Ccap@0 gnd net@14 4.288f
Ccap@1 gnd net@8 4.288f
Ccap@2 gnd net@11 4.288f
Rres@0 net@14 a 6.757
Rres@1 net@11 net@14 13.514
Rres@2 b net@8 6.757
Rres@3 net@8 net@11 13.514
.ENDS wire-C_0_011f-1169_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1169_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1169_5-R_34_667m
.ENDS wire90-1169_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1232_1-R_34_667m a b
Ccap@0 gnd net@14 4.518f
Ccap@1 gnd net@8 4.518f
Ccap@2 gnd net@11 4.518f
Rres@0 net@14 a 7.119
Rres@1 net@11 net@14 14.238
Rres@2 b net@8 7.119
Rres@3 net@8 net@11 14.238
.ENDS wire-C_0_011f-1232_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1232_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1232_1-R_34_667m
.ENDS wire90-1232_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1163_5-R_34_667m a b
Ccap@0 gnd net@14 4.266f
Ccap@1 gnd net@8 4.266f
Ccap@2 gnd net@11 4.266f
Rres@0 net@14 a 6.722
Rres@1 net@11 net@14 13.445
Rres@2 b net@8 6.722
Rres@3 net@8 net@11 13.445
.ENDS wire-C_0_011f-1163_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1163_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1163_5-R_34_667m
.ENDS wire90-1163_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1221_1-R_34_667m a b
Ccap@0 gnd net@14 4.477f
Ccap@1 gnd net@8 4.477f
Ccap@2 gnd net@11 4.477f
Rres@0 net@14 a 7.055
Rres@1 net@11 net@14 14.11
Rres@2 b net@8 7.055
Rres@3 net@8 net@11 14.11
.ENDS wire-C_0_011f-1221_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1221_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1221_1-R_34_667m
.ENDS wire90-1221_1-layer_1-width_3

*** CELL: fifoL:split10{sch}
.SUBCKT split10 clS[F] clS[T] cl[F] cl[T] in[10] in[11] in[12] in[13] in[14] 
+in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
+in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
+in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] out[3] 
+out[4] out[5] out[6] out[7] out[8] out[9] pred rd[F] rd[T] sin sout succ
XsplitEnd@0 clS[F] clS[T] cl[F] cl[T] a[10] a[11] a[12] a[13] a[14] a[15] 
+a[16] a[17] a[18] a[19] a[1] a[20] a[21] a[22] a[23] a[24] a[25] a[26] a[27] 
+a[28] a[29] a[2] a[30] a[31] a[32] a[33] a[34] a[35] a[36] a[3] a[4] a[5] 
+a[6] a[7] a[8] a[9] b[10] b[11] b[12] b[13] b[14] b[15] b[16] b[17] b[18] 
+b[19] b[1] b[20] b[21] b[22] b[23] b[24] b[25] b[26] b[27] b[28] b[29] b[2] 
+b[30] b[31] b[32] b[33] b[34] b[35] b[36] b[3] b[4] b[5] b[6] b[7] b[8] b[9] 
+mc out[10] out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] 
+out[19] out[1] out[20] out[21] out[22] out[23] out[24] out[25] out[26] 
+out[27] out[28] out[29] out[2] out[30] out[31] out[32] out[33] out[34] 
+out[35] out[36] out[3] out[4] out[5] out[6] out[7] out[8] out[9] net@336 
+net@337 rd[F] rd[T] net@335 sout succ splitEnd
XsplitSta@0 clS[F] clS[T] cl[F] cl[T] in[10] in[11] in[12] in[13] in[14] 
+in[15] in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] 
+in[25] in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] 
+in[35] in[36] in[3] in[4] in[5] in[6] in[7] in[8] in[9] mc x[10] x[11] x[12] 
+x[13] x[14] x[15] x[16] x[17] x[18] x[19] x[1] x[20] x[21] x[22] x[23] x[24] 
+x[25] x[26] x[27] x[28] x[29] x[2] x[30] x[31] x[32] x[33] x[34] x[35] x[36] 
+x[3] x[4] x[5] x[6] x[7] x[8] x[9] pred rd[F] rd[T] sin net@315 net@312 
+net@313 splitStart
XsplitSta@1 clS[F] clS[T] clS[F] clS[T] cl[F] cl[T] cl[F] cl[T] x[10] x[11] 
+x[12] x[13] x[14] x[15] x[16] x[17] x[18] x[19] x[1] x[20] x[21] x[22] x[23] 
+x[24] x[25] x[26] x[27] x[28] x[29] x[2] x[30] x[31] x[32] x[33] x[34] x[35] 
+x[36] x[3] x[4] x[5] x[6] x[7] x[8] x[9] mc mc a[10] a[11] a[12] a[13] a[14] 
+a[15] a[16] a[17] a[18] a[19] a[1] a[20] a[21] a[22] a[23] a[24] a[25] a[26] 
+a[27] a[28] a[29] a[2] a[30] a[31] a[32] a[33] a[34] a[35] a[36] a[3] a[4] 
+a[5] a[6] a[7] a[8] a[9] net@245 rd[F] rd[T] rd[F] rd[T] net@285 net@252 
+net@251 net@270 net@276 splitStageDx4
XsplitSta@2 clS[F] clS[T] clS[F] clS[T] cl[F] cl[T] cl[F] cl[T] x[10] x[11] 
+x[12] x[13] x[14] x[15] x[16] x[17] x[18] x[19] x[1] x[20] x[21] x[22] x[23] 
+x[24] x[25] x[26] x[27] x[28] x[29] x[2] x[30] x[31] x[32] x[33] x[34] x[35] 
+x[36] x[3] x[4] x[5] x[6] x[7] x[8] x[9] mc mc b[10] b[11] b[12] b[13] b[14] 
+b[15] b[16] b[17] b[18] b[19] b[1] b[20] b[21] b[22] b[23] b[24] b[25] b[26] 
+b[27] b[28] b[29] b[2] b[30] b[31] b[32] b[33] b[34] b[35] b[36] b[3] b[4] 
+b[5] b[6] b[7] b[8] b[9] net@248 rd[F] rd[T] rd[F] rd[T] net@316 net@309 
+net@307 net@322 net@279 splitStageDx4
Xwire90@0 net@316 net@251 wire90-1085-layer_1-width_3
Xwire90@1 net@307 net@309 wire90-2816_7-layer_1-width_3
Xwire90@2 net@313 net@248 wire90-1847-layer_1-width_3
Xwire90@3 net@312 net@245 wire90-1161-layer_1-width_3
Xwire90@4 net@315 net@285 wire90-941-layer_1-width_3
Xwire90@5 net@322 net@252 wire90-1085-layer_1-width_3
Xwire90@6 net@270 net@335 wire90-992_5-layer_1-width_3
Xwire90@7 net@276 net@336 wire90-924_4-layer_1-width_3
Xwire90@8 net@279 net@337 wire90-1463_4-layer_1-width_3
Xwire90@9 x[1] wire90@9_b wire90-1346_1-layer_1-width_3
Xwire90@10 x[2] wire90@10_b wire90-1337_6-layer_1-width_3
Xwire90@11 x[3] wire90@11_b wire90-1339_1-layer_1-width_3
Xwire90@12 x[4] wire90@12_b wire90-1356_6-layer_1-width_3
Xwire90@13 x[5] wire90@13_b wire90-1341_1-layer_1-width_3
Xwire90@14 x[6] wire90@14_b wire90-1345_1-layer_1-width_3
Xwire90@15 x[7] wire90@15_b wire90-1361_4-layer_1-width_3
Xwire90@16 x[8] wire90@16_b wire90-1342_1-layer_1-width_3
Xwire90@17 x[9] wire90@17_b wire90-1349_6-layer_1-width_3
Xwire90@18 x[10] wire90@18_b wire90-1345_8-layer_1-width_3
Xwire90@19 x[11] wire90@19_b wire90-1346_7-layer_1-width_3
Xwire90@20 x[12] wire90@20_b wire90-1330_8-layer_1-width_3
Xwire90@21 x[13] wire90@21_b wire90-1339_7-layer_1-width_3
Xwire90@22 x[14] wire90@22_b wire90-1353_3-layer_1-width_3
Xwire90@23 x[15] wire90@23_b wire90-1355_2-layer_1-width_3
Xwire90@24 x[16] wire90@24_b wire90-1359_3-layer_1-width_3
Xwire90@25 x[17] wire90@25_b wire90-1357_2-layer_1-width_3
Xwire90@26 x[18] wire90@26_b wire90-1353_3-layer_1-width_3
Xwire90@27 x[19] wire90@27_b wire90-1356_6-layer_1-width_3
Xwire90@28 x[20] wire90@28_b wire90-1356_1-layer_1-width_3
Xwire90@29 x[21] wire90@29_b wire90-1349_6-layer_1-width_3
Xwire90@30 x[22] wire90@30_b wire90-1379_1-layer_1-width_3
Xwire90@31 x[23] wire90@31_b wire90-1351_6-layer_1-width_3
Xwire90@32 x[24] wire90@32_b wire90-1376_6-layer_1-width_3
Xwire90@33 x[25] wire90@33_b wire90-1372_4-layer_1-width_3
Xwire90@34 x[26] wire90@34_b wire90-1373_6-layer_1-width_3
Xwire90@35 x[27] wire90@35_b wire90-1360_1-layer_1-width_3
Xwire90@36 x[28] wire90@36_b wire90-1323_3-layer_1-width_3
Xwire90@37 x[29] wire90@37_b wire90-1336_2-layer_1-width_3
Xwire90@38 x[30] wire90@38_b wire90-1330_3-layer_1-width_3
Xwire90@39 x[31] wire90@39_b wire90-1329_2-layer_1-width_3
Xwire90@40 x[32] wire90@40_b wire90-1325_8-layer_1-width_3
Xwire90@41 x[33] wire90@41_b wire90-1344_7-layer_1-width_3
Xwire90@42 x[34] wire90@42_b wire90-1327_8-layer_1-width_3
Xwire90@43 x[35] wire90@43_b wire90-1346_7-layer_1-width_3
Xwire90@44 x[36] wire90@44_b wire90-1321_8-layer_1-width_3
Xwire90@45 a[1] wire90@45_b wire90-638-layer_1-width_3
Xwire90@46 a[2] wire90@46_b wire90-638-layer_1-width_3
Xwire90@47 a[3] wire90@47_b wire90-641-layer_1-width_3
Xwire90@48 a[4] wire90@48_b wire90-644-layer_1-width_3
Xwire90@49 a[5] wire90@49_b wire90-635-layer_1-width_3
Xwire90@50 a[6] wire90@50_b wire90-666-layer_1-width_3
Xwire90@51 a[7] wire90@51_b wire90-633_5-layer_1-width_3
Xwire90@52 a[8] wire90@52_b wire90-655-layer_1-width_3
Xwire90@53 a[9] wire90@53_b wire90-636_5-layer_1-width_3
Xwire90@54 a[10] wire90@54_b wire90-594_5-layer_1-width_3
Xwire90@55 a[11] wire90@55_b wire90-599_4-layer_1-width_3
Xwire90@56 a[12] wire90@56_b wire90-590_5-layer_1-width_3
Xwire90@57 a[13] wire90@57_b wire90-602_4-layer_1-width_3
Xwire90@58 a[14] wire90@58_b wire90-607-layer_1-width_3
Xwire90@59 a[15] wire90@59_b wire90-601_6-layer_1-width_3
Xwire90@60 a[16] wire90@60_b wire90-605-layer_1-width_3
Xwire90@61 a[17] wire90@61_b wire90-594_9-layer_1-width_3
Xwire90@62 a[18] wire90@62_b wire90-600-layer_1-width_3
Xwire90@63 a[19] wire90@63_b wire90-636_5-layer_1-width_3
Xwire90@64 a[20] wire90@64_b wire90-635-layer_1-width_3
Xwire90@65 a[21] wire90@65_b wire90-639_5-layer_1-width_3
Xwire90@66 a[22] wire90@66_b wire90-641-layer_1-width_3
Xwire90@67 a[23] wire90@67_b wire90-633_5-layer_1-width_3
Xwire90@68 a[24] wire90@68_b wire90-655_5-layer_1-width_3
Xwire90@69 a[25] wire90@69_b wire90-632-layer_1-width_3
Xwire90@70 a[26] wire90@70_b wire90-645-layer_1-width_3
Xwire90@71 a[27] wire90@71_b wire90-635-layer_1-width_3
Xwire90@72 a[28] wire90@72_b wire90-600_5-layer_1-width_3
Xwire90@73 a[29] wire90@73_b wire90-596_4-layer_1-width_3
Xwire90@74 a[30] wire90@74_b wire90-595-layer_1-width_3
Xwire90@75 a[31] wire90@75_b wire90-599_4-layer_1-width_3
Xwire90@76 a[32] wire90@76_b wire90-613-layer_1-width_3
Xwire90@77 a[33] wire90@77_b wire90-598_6-layer_1-width_3
Xwire90@78 a[34] wire90@78_b wire90-611-layer_1-width_3
Xwire90@79 a[35] wire90@79_b wire90-591_9-layer_1-width_3
Xwire90@80 a[36] wire90@80_b wire90-606-layer_1-width_3
Xwire90@81 b[1] wire90@81_b wire90-1186_7-layer_1-width_3
Xwire90@82 b[2] wire90@82_b wire90-1241_2-layer_1-width_3
Xwire90@83 b[3] wire90@83_b wire90-1192_7-layer_1-width_3
Xwire90@84 b[4] wire90@84_b wire90-1239_2-layer_1-width_3
Xwire90@85 b[5] wire90@85_b wire90-1190_7-layer_1-width_3
Xwire90@86 b[6] wire90@86_b wire90-1268_7-layer_1-width_3
Xwire90@87 b[7] wire90@87_b wire90-1187_7-layer_1-width_3
Xwire90@88 b[8] wire90@88_b wire90-1257_7-layer_1-width_3
Xwire90@89 b[9] wire90@89_b wire90-1190_2-layer_1-width_3
Xwire90@90 b[10] wire90@90_b wire90-1197_6-layer_1-width_3
Xwire90@91 b[11] wire90@91_b wire90-1171-layer_1-width_3
Xwire90@92 b[12] wire90@92_b wire90-1186_6-layer_1-width_3
Xwire90@93 b[13] wire90@93_b wire90-1178-layer_1-width_3
Xwire90@94 b[14] wire90@94_b wire90-1216_1-layer_1-width_3
Xwire90@95 b[15] wire90@95_b wire90-1172_5-layer_1-width_3
Xwire90@96 b[16] wire90@96_b wire90-1214_1-layer_1-width_3
Xwire90@97 b[17] wire90@97_b wire90-1166_5-layer_1-width_3
Xwire90@98 b[18] wire90@98_b wire90-1203_1-layer_1-width_3
Xwire90@99 b[19] wire90@99_b wire90-1199_2-layer_1-width_3
Xwire90@100 b[20] wire90@100_b wire90-1217_2-layer_1-width_3
Xwire90@101 b[21] wire90@101_b wire90-1208_2-layer_1-width_3
Xwire90@102 b[22] wire90@102_b wire90-1215_2-layer_1-width_3
Xwire90@103 b[23] wire90@103_b wire90-1205_2-layer_1-width_3
Xwire90@104 b[24] wire90@104_b wire90-1244_7-layer_1-width_3
Xwire90@105 b[25] wire90@105_b wire90-1184_2-layer_1-width_3
Xwire90@106 b[26] wire90@106_b wire90-1233_7-layer_1-width_3
Xwire90@107 b[27] wire90@107_b wire90-1187_2-layer_1-width_3
Xwire90@108 b[28] wire90@108_b wire90-1215_6-layer_1-width_3
Xwire90@109 b[29] wire90@109_b wire90-1168-layer_1-width_3
Xwire90@110 b[30] wire90@110_b wire90-1204_6-layer_1-width_3
Xwire90@111 b[31] wire90@111_b wire90-1171-layer_1-width_3
Xwire90@112 b[32] wire90@112_b wire90-1234_1-layer_1-width_3
Xwire90@113 b[33] wire90@113_b wire90-1169_5-layer_1-width_3
Xwire90@114 b[34] wire90@114_b wire90-1232_1-layer_1-width_3
Xwire90@115 b[35] wire90@115_b wire90-1163_5-layer_1-width_3
Xwire90@116 b[36] wire90@116_b wire90-1221_1-layer_1-width_3
.ENDS split10

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3513_1-R_34_667m a b
Ccap@0 gnd net@14 12.881f
Ccap@1 gnd net@8 12.881f
Ccap@2 gnd net@11 12.881f
Rres@0 net@14 a 20.298
Rres@1 net@11 net@14 40.596
Rres@2 b net@8 20.298
Rres@3 net@8 net@11 40.596
.ENDS wire-C_0_011f-3513_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3513_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3513_1-R_34_667m
.ENDS wire90-3513_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3124_7-R_34_667m a b
Ccap@0 gnd net@14 11.457f
Ccap@1 gnd net@8 11.457f
Ccap@2 gnd net@11 11.457f
Rres@0 net@14 a 18.054
Rres@1 net@11 net@14 36.108
Rres@2 b net@8 18.054
Rres@3 net@8 net@11 36.108
.ENDS wire-C_0_011f-3124_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3124_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3124_7-R_34_667m
.ENDS wire90-3124_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-603_9-R_26m a b
Ccap@0 gnd net@14 2.214f
Ccap@1 gnd net@8 2.214f
Ccap@2 gnd net@11 2.214f
Rres@0 net@14 a 2.617
Rres@1 net@11 net@14 5.234
Rres@2 b net@8 2.617
Rres@3 net@8 net@11 5.234
.ENDS wire-C_0_011f-603_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-603_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-603_9-R_26m
.ENDS wire90-603_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-608_4-R_26m a b
Ccap@0 gnd net@14 2.231f
Ccap@1 gnd net@8 2.231f
Ccap@2 gnd net@11 2.231f
Rres@0 net@14 a 2.636
Rres@1 net@11 net@14 5.273
Rres@2 b net@8 2.636
Rres@3 net@8 net@11 5.273
.ENDS wire-C_0_011f-608_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-608_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-608_4-R_26m
.ENDS wire90-608_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-632_5-R_26m a b
Ccap@0 gnd net@14 2.319f
Ccap@1 gnd net@8 2.319f
Ccap@2 gnd net@11 2.319f
Rres@0 net@14 a 2.741
Rres@1 net@11 net@14 5.482
Rres@2 b net@8 2.741
Rres@3 net@8 net@11 5.482
.ENDS wire-C_0_011f-632_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-632_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-632_5-R_26m
.ENDS wire90-632_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-630-R_26m a b
Ccap@0 gnd net@14 2.31f
Ccap@1 gnd net@8 2.31f
Ccap@2 gnd net@11 2.31f
Rres@0 net@14 a 2.73
Rres@1 net@11 net@14 5.46
Rres@2 b net@8 2.73
Rres@3 net@8 net@11 5.46
.ENDS wire-C_0_011f-630-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-630-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-630-R_26m
.ENDS wire90-630-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-611_4-R_26m a b
Ccap@0 gnd net@14 2.242f
Ccap@1 gnd net@8 2.242f
Ccap@2 gnd net@11 2.242f
Rres@0 net@14 a 2.649
Rres@1 net@11 net@14 5.299
Rres@2 b net@8 2.649
Rres@3 net@8 net@11 5.299
.ENDS wire-C_0_011f-611_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-611_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-611_4-R_26m
.ENDS wire90-611_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-613_5-R_26m a b
Ccap@0 gnd net@14 2.25f
Ccap@1 gnd net@8 2.25f
Ccap@2 gnd net@11 2.25f
Rres@0 net@14 a 2.658
Rres@1 net@11 net@14 5.317
Rres@2 b net@8 2.658
Rres@3 net@8 net@11 5.317
.ENDS wire-C_0_011f-613_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-613_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-613_5-R_26m
.ENDS wire90-613_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-613_8-R_26m a b
Ccap@0 gnd net@14 2.251f
Ccap@1 gnd net@8 2.251f
Ccap@2 gnd net@11 2.251f
Rres@0 net@14 a 2.66
Rres@1 net@11 net@14 5.32
Rres@2 b net@8 2.66
Rres@3 net@8 net@11 5.32
.ENDS wire-C_0_011f-613_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-613_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-613_8-R_26m
.ENDS wire90-613_8-layer_1-width_4

*** CELL: fifoL:ringFIFO{sch}
.SUBCKT ringFIFO clS[F] clS[T] cl[F] cl[T] do[L] do[M] do[epi] fire[ODE] 
+fire[m1] fire[m2] inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] 
+inE[17] inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] 
+inE[25] inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] 
+inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] 
+inE[9] mc od[15] od[16] od[17] od[18] od[19] od[20] olcNZ outm1[1] outm1[20] 
+outm1[22] outm1[23] outm1[24] outm1[25] outm1[26] outm1[27] outm1[2] outm1[3] 
+outm1[4] outm1[5] outm1[6] outm1[8] pout[10] pout[11] pout[12] pout[13] 
+pout[14] pout[15] pout[16] pout[17] pout[18] pout[1] pout[2] pout[3] pout[4] 
+pout[5] pout[6] pout[7] pout[8] pout[9] rd[F] rd[T] sin sout
Xm12stage@0 clS[F] clS[T] cl[F] cl[T] fire[m1] fire[m2] pout[10] pout[11] 
+pout[12] m3[13] m3[14] m3[15] m3[16] m3[17] m3[18] m3[19] pout[1] m3[20] 
+m3[21] m3[22] m3[23] m3[24] m3[25] m3[26] m3[27] m3[28] m3[29] pout[2] m3[30] 
+m3[31] m3[32] m3[33] m3[34] m3[35] m3[36] pout[3] pout[4] pout[5] pout[6] 
+pout[7] pout[8] pout[9] mc m1[10] m1[11] m1[12] m1[13] m1[14] m1[15] m1[16] 
+m1[17] m1[18] m1[19] outm1[1] outm1[20] m1[21] outm1[22] outm1[23] outm1[24] 
+outm1[25] outm1[26] outm1[27] m1[28] m1[29] outm1[2] m1[30] m1[31] m1[32] 
+m1[33] m1[34] m1[35] m1[36] outm1[3] outm1[4] outm1[5] outm1[6] m1[7] 
+outm1[8] m1[9] pout[13] pout[14] pout[15] pout[16] pout[17] pout[18] net@233 
+rd[F] rd[T] net@291 sout net@122 m12stageD
XodRQstag@0 clS[F] clS[T] cl[F] cl[T] do[L] do[M] do[epi] net@236 fire[ODE] 
+inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] inE[17] inE[18] 
+inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] inE[25] inE[26] 
+inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] inE[33] inE[34] 
+inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] inE[9] m1[10] 
+m1[11] m1[12] m1[13] m1[14] m1[15] m1[16] m1[17] m1[18] m1[19] outm1[1] 
+outm1[20] m1[21] outm1[22] outm1[23] outm1[24] outm1[25] outm1[26] outm1[27] 
+m1[28] m1[29] outm1[2] m1[30] m1[31] m1[32] m1[33] m1[34] m1[35] m1[36] 
+outm1[3] outm1[4] outm1[5] outm1[6] m1[7] outm1[8] m1[9] mc od[15] od[16] 
+od[17] od[18] od[19] od[20] olcNZ rq[10] rq[11] rq[12] rq[13] rq[14] rq[15] 
+rq[16] rq[17] rq[18] rq[19] rq[1] rq[20] rq[21] rq[22] rq[23] rq[24] rq[25] 
+rq[26] rq[27] rq[28] rq[29] rq[2] rq[30] rq[31] rq[32] rq[33] rq[34] rq[35] 
+rq[36] rq[3] rq[4] rq[5] rq[6] rq[7] rq[8] rq[9] net@149 rd[F] rd[T] sin 
+net@253 odRQstageD
Xsplit10@0 clS[F] clS[T] cl[F] cl[T] rq[10] rq[11] rq[12] rq[13] rq[14] 
+rq[15] rq[16] rq[17] rq[18] rq[19] rq[1] rq[20] rq[21] rq[22] rq[23] rq[24] 
+rq[25] rq[26] rq[27] rq[28] rq[29] rq[2] rq[30] rq[31] rq[32] rq[33] rq[34] 
+rq[35] rq[36] rq[3] rq[4] rq[5] rq[6] rq[7] rq[8] rq[9] mc pout[10] pout[11] 
+pout[12] m3[13] m3[14] m3[15] m3[16] m3[17] m3[18] m3[19] pout[1] m3[20] 
+m3[21] m3[22] m3[23] m3[24] m3[25] m3[26] m3[27] m3[28] m3[29] pout[2] m3[30] 
+m3[31] m3[32] m3[33] m3[34] m3[35] m3[36] pout[3] pout[4] pout[5] pout[6] 
+pout[7] pout[8] pout[9] net@238 rd[F] rd[T] net@260 net@290 net@289 split10
Xwire90@2 net@122 net@149 wire90-3513_1-layer_1-width_3
Xwire90@39 net@238 net@236 wire90-3124_7-layer_1-width_3
Xwire90@40 net@260 net@253 wire90-3124_7-layer_1-width_3
Xwire90@41 net@289 net@233 wire90-3513_1-layer_1-width_3
Xwire90@42 net@290 net@291 wire90-3513_1-layer_1-width_3
Xwire90@46 m3[19] wire90@46_b wire90-605_4-layer_1-width_4
Xwire90@47 m3[20] wire90@47_b wire90-613_4-layer_1-width_4
Xwire90@48 m3[21] wire90@48_b wire90-605_4-layer_1-width_4
Xwire90@49 m3[22] wire90@49_b wire90-623_9-layer_1-width_4
Xwire90@50 m3[23] wire90@50_b wire90-603_9-layer_1-width_4
Xwire90@51 m3[24] wire90@51_b wire90-625_9-layer_1-width_4
Xwire90@52 m3[25] wire90@52_b wire90-607_8-layer_1-width_4
Xwire90@53 m3[26] wire90@53_b wire90-620_9-layer_1-width_4
Xwire90@54 m3[27] wire90@54_b wire90-605_4-layer_1-width_4
Xwire90@56 m3[28] wire90@56_b wire90-612_5-layer_1-width_4
Xwire90@58 m3[29] wire90@58_b wire90-602_4-layer_1-width_4
Xwire90@59 m3[30] wire90@59_b wire90-607-layer_1-width_4
Xwire90@60 m3[31] wire90@60_b wire90-602_4-layer_1-width_4
Xwire90@61 m3[32] wire90@61_b wire90-620_5-layer_1-width_4
Xwire90@62 m3[33] wire90@62_b wire90-602_4-layer_1-width_4
Xwire90@63 m3[34] wire90@63_b wire90-624_5-layer_1-width_4
Xwire90@64 m3[35] wire90@64_b wire90-602_4-layer_1-width_4
Xwire90@65 m3[36] wire90@65_b wire90-618-layer_1-width_4
Xwire90@73 m3[13] wire90@73_b wire90-608_4-layer_1-width_4
Xwire90@74 m3[14] wire90@74_b wire90-632_5-layer_1-width_4
Xwire90@75 m3[15] wire90@75_b wire90-608_4-layer_1-width_4
Xwire90@76 m3[16] wire90@76_b wire90-636_5-layer_1-width_4
Xwire90@77 m3[17] wire90@77_b wire90-608_4-layer_1-width_4
Xwire90@78 m3[18] wire90@78_b wire90-630-layer_1-width_4
Xwire90@79 m1[9] wire90@79_b wire90-611_4-layer_1-width_4
Xwire90@80 m1[10] wire90@80_b wire90-624_5-layer_1-width_4
Xwire90@82 m1[19] wire90@82_b wire90-605_4-layer_1-width_4
Xwire90@91 m1[11] wire90@91_b wire90-608_4-layer_1-width_4
Xwire90@92 m1[28] wire90@92_b wire90-612_5-layer_1-width_4
Xwire90@94 m1[29] wire90@94_b wire90-602_4-layer_1-width_4
Xwire90@95 m1[30] wire90@95_b wire90-607-layer_1-width_4
Xwire90@96 m1[31] wire90@96_b wire90-602_4-layer_1-width_4
Xwire90@97 m1[32] wire90@97_b wire90-620_5-layer_1-width_4
Xwire90@98 m1[33] wire90@98_b wire90-602_4-layer_1-width_4
Xwire90@99 m1[34] wire90@99_b wire90-624_5-layer_1-width_4
Xwire90@100 m1[35] wire90@100_b wire90-602_4-layer_1-width_4
Xwire90@101 m1[36] wire90@101_b wire90-618-layer_1-width_4
Xwire90@102 m1[12] wire90@102_b wire90-613_5-layer_1-width_4
Xwire90@107 m1[7] wire90@107_b wire90-613_8-layer_1-width_4
Xwire90@109 m1[13] wire90@109_b wire90-608_4-layer_1-width_4
Xwire90@110 m1[14] wire90@110_b wire90-632_5-layer_1-width_4
Xwire90@111 m1[15] wire90@111_b wire90-608_4-layer_1-width_4
Xwire90@112 m1[16] wire90@112_b wire90-636_5-layer_1-width_4
Xwire90@113 m1[17] wire90@113_b wire90-608_4-layer_1-width_4
Xwire90@114 m1[18] wire90@114_b wire90-630-layer_1-width_4
Xwire90@115 rq[9] wire90@115_b wire90-611_4-layer_1-width_4
Xwire90@116 rq[10] wire90@116_b wire90-624_5-layer_1-width_4
Xwire90@117 rq[1] wire90@117_b wire90-611_4-layer_1-width_4
Xwire90@118 rq[19] wire90@118_b wire90-605_4-layer_1-width_4
Xwire90@119 rq[20] wire90@119_b wire90-613_4-layer_1-width_4
Xwire90@120 rq[21] wire90@120_b wire90-605_4-layer_1-width_4
Xwire90@121 rq[22] wire90@121_b wire90-623_9-layer_1-width_4
Xwire90@122 rq[23] wire90@122_b wire90-603_9-layer_1-width_4
Xwire90@123 rq[24] wire90@123_b wire90-625_9-layer_1-width_4
Xwire90@124 rq[25] wire90@124_b wire90-607_8-layer_1-width_4
Xwire90@125 rq[26] wire90@125_b wire90-620_9-layer_1-width_4
Xwire90@126 rq[27] wire90@126_b wire90-605_4-layer_1-width_4
Xwire90@127 rq[11] wire90@127_b wire90-608_4-layer_1-width_4
Xwire90@128 rq[28] wire90@128_b wire90-612_5-layer_1-width_4
Xwire90@129 rq[2] wire90@129_b wire90-613_4-layer_1-width_4
Xwire90@130 rq[29] wire90@130_b wire90-602_4-layer_1-width_4
Xwire90@131 rq[30] wire90@131_b wire90-607-layer_1-width_4
Xwire90@132 rq[31] wire90@132_b wire90-602_4-layer_1-width_4
Xwire90@133 rq[32] wire90@133_b wire90-620_5-layer_1-width_4
Xwire90@134 rq[33] wire90@134_b wire90-602_4-layer_1-width_4
Xwire90@135 rq[34] wire90@135_b wire90-624_5-layer_1-width_4
Xwire90@136 rq[35] wire90@136_b wire90-602_4-layer_1-width_4
Xwire90@137 rq[36] wire90@137_b wire90-618-layer_1-width_4
Xwire90@138 rq[12] wire90@138_b wire90-613_5-layer_1-width_4
Xwire90@139 rq[3] wire90@139_b wire90-611_4-layer_1-width_4
Xwire90@140 rq[4] wire90@140_b wire90-623_9-layer_1-width_4
Xwire90@141 rq[5] wire90@141_b wire90-608_4-layer_1-width_4
Xwire90@142 rq[6] wire90@142_b wire90-625_9-layer_1-width_4
Xwire90@143 rq[7] wire90@143_b wire90-613_8-layer_1-width_4
Xwire90@144 rq[8] wire90@144_b wire90-620_9-layer_1-width_4
Xwire90@145 rq[13] wire90@145_b wire90-608_4-layer_1-width_4
Xwire90@146 rq[14] wire90@146_b wire90-632_5-layer_1-width_4
Xwire90@147 rq[15] wire90@147_b wire90-608_4-layer_1-width_4
Xwire90@148 rq[16] wire90@148_b wire90-636_5-layer_1-width_4
Xwire90@149 rq[17] wire90@149_b wire90-608_4-layer_1-width_4
Xwire90@150 rq[18] wire90@150_b wire90-630-layer_1-width_4
.ENDS ringFIFO

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-216_3-R_34_667m a b
Ccap@0 gnd net@14 0.793f
Ccap@1 gnd net@8 0.793f
Ccap@2 gnd net@11 0.793f
Rres@0 net@14 a 1.25
Rres@1 net@11 net@14 2.499
Rres@2 b net@8 1.25
Rres@3 net@8 net@11 2.499
.ENDS wire-C_0_011f-216_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-216_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-216_3-R_34_667m
.ENDS wire90-216_3-layer_1-width_3

*** CELL: latchesK:latchZ10{sch}
.SUBCKT latchZ10 c[1] c[2] cl[F] cl[T] in[1] mc out[TT] out[T]
MNMOSf@1 out[T] net@186 gnd gnd nch W='12*(1+ABN/sqrt(12*3))' L='3' 
+DELVTO='AVT0N/sqrt(12*3)'
XNMOSx@2 out[T] mc gnd NMOSx-X_10
XNMOSx@3 out[T] c[1] gnd NMOSx-X_10
XNMOSx@4 out[T] c[2] gnd NMOSx-X_20
XPMOSx@2 out[T] net@186 vdd PMOSx-X_2
Xinv@0 net@240 out[TT] inv-X_10
XinvLT@0 out[T] net@186 invLT-X_2
Xnms2@0 out[T] in[1] cl[T] nms2-X_10
Xpms2@0 out[T] in[1] cl[F] pms2-X_10
Xwire90@0 net@240 net@186 wire90-216_3-layer_1-width_3
.ENDS latchZ10

*** CELL: redFour:nor2n_sy{sch}
.SUBCKT nor2n_sy-X_20 ina inb out
Xnor2@0 ina inb out nor2_sy-X_20
.ENDS nor2n_sy-X_20

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-133_8-R_34_667m a b
Ccap@0 gnd net@14 0.491f
Ccap@1 gnd net@8 0.491f
Ccap@2 gnd net@11 0.491f
Rres@0 net@14 a 0.773
Rres@1 net@11 net@14 1.546
Rres@2 b net@8 0.773
Rres@3 net@8 net@11 1.546
.ENDS wire-C_0_011f-133_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-133_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-133_8-R_34_667m
.ENDS wire90-133_8-layer_1-width_3

*** CELL: latchesK:mlat1in5i{sch}
.SUBCKT mlat1in5i c[F] c[T] in out
XinvLT@0 out net@119 invLT-X_2
Xnms2@2 out in c[T] nms2-X_5
Xnms2@3 out net@114 c[F] nms2-X_2
Xpms2@0 out net@114 c[T] pms2-X_1
Xpms2@1 out in c[F] pms2-X_5
Xwire90@19 net@114 net@119 wire90-133_8-layer_1-width_3
.ENDS mlat1in5i

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-200_9-R_34_667m a b
Ccap@0 gnd net@14 0.737f
Ccap@1 gnd net@8 0.737f
Ccap@2 gnd net@11 0.737f
Rres@0 net@14 a 1.161
Rres@1 net@11 net@14 2.322
Rres@2 b net@8 1.161
Rres@3 net@8 net@11 2.322
.ENDS wire-C_0_011f-200_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-200_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-200_9-R_34_667m
.ENDS wire90-200_9-layer_1-width_3

*** CELL: latchesK:mlat2in10i{sch}
.SUBCKT mlat2in10i clA[F] clA[T] clB[F] clB[T] inA inB out[1]
Xinv@0 out[1] net@33 inv-X_4
Xnms2@0 out[1] inB clB[T] nms2-X_10
Xnms2@1 out[1] inA clA[T] nms2-X_10
Xnms3@0 out[1] clB[F] clA[F] net@33 nms3-X_2
Xpms2@0 out[1] inB clB[F] pms2-X_10
Xpms2@1 out[1] inA clA[F] pms2-X_10
Xpms3@0 out[1] clA[T] clB[T] net@81 pms3-X_1
Xwire90@1 net@81 net@33 wire90-200_9-layer_1-width_3
.ENDS mlat2in10i

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-173_2-R_34_667m a b
Ccap@0 gnd net@14 0.635f
Ccap@1 gnd net@8 0.635f
Ccap@2 gnd net@11 0.635f
Rres@0 net@14 a 1.001
Rres@1 net@11 net@14 2.001
Rres@2 b net@8 1.001
Rres@3 net@8 net@11 2.001
.ENDS wire-C_0_011f-173_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-173_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-173_2-R_34_667m
.ENDS wire90-173_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-381_1-R_34_667m a b
Ccap@0 gnd net@14 1.397f
Ccap@1 gnd net@8 1.397f
Ccap@2 gnd net@11 1.397f
Rres@0 net@14 a 2.202
Rres@1 net@11 net@14 4.404
Rres@2 b net@8 2.202
Rres@3 net@8 net@11 4.404
.ENDS wire-C_0_011f-381_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-381_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-381_1-R_34_667m
.ENDS wire90-381_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-981_4-R_34_667m a b
Ccap@0 gnd net@14 3.598f
Ccap@1 gnd net@8 3.598f
Ccap@2 gnd net@11 3.598f
Rres@0 net@14 a 5.67
Rres@1 net@11 net@14 11.341
Rres@2 b net@8 5.67
Rres@3 net@8 net@11 11.341
.ENDS wire-C_0_011f-981_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-981_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-981_4-R_34_667m
.ENDS wire90-981_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-523_4-R_34_667m a b
Ccap@0 gnd net@14 1.919f
Ccap@1 gnd net@8 1.919f
Ccap@2 gnd net@11 1.919f
Rres@0 net@14 a 3.024
Rres@1 net@11 net@14 6.048
Rres@2 b net@8 3.024
Rres@3 net@8 net@11 6.048
.ENDS wire-C_0_011f-523_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-523_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-523_4-R_34_667m
.ENDS wire90-523_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-535_1-R_34_667m a b
Ccap@0 gnd net@14 1.962f
Ccap@1 gnd net@8 1.962f
Ccap@2 gnd net@11 1.962f
Rres@0 net@14 a 3.092
Rres@1 net@11 net@14 6.183
Rres@2 b net@8 3.092
Rres@3 net@8 net@11 6.183
.ENDS wire-C_0_011f-535_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-535_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-535_1-R_34_667m
.ENDS wire90-535_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-555_1-R_34_667m a b
Ccap@0 gnd net@14 2.035f
Ccap@1 gnd net@8 2.035f
Ccap@2 gnd net@11 2.035f
Rres@0 net@14 a 3.207
Rres@1 net@11 net@14 6.414
Rres@2 b net@8 3.207
Rres@3 net@8 net@11 6.414
.ENDS wire-C_0_011f-555_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-555_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-555_1-R_34_667m
.ENDS wire90-555_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-677_1-R_34_667m a b
Ccap@0 gnd net@14 2.483f
Ccap@1 gnd net@8 2.483f
Ccap@2 gnd net@11 2.483f
Rres@0 net@14 a 3.912
Rres@1 net@11 net@14 7.824
Rres@2 b net@8 3.912
Rres@3 net@8 net@11 7.824
.ENDS wire-C_0_011f-677_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-677_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-677_1-R_34_667m
.ENDS wire90-677_1-layer_1-width_3

*** CELL: loopCountL:ringB{sch}
.SUBCKT ringB bit[1] count[F] count[T] do[1] inLO[1] load[F] load[T]
Xinv@0 net@60 bit[1] inv-X_20
Xinv@1 bit[1] net@67 inv-X_5
Xinv@2 net@68 net@65 inv-X_10
Xinv@3 xx[T] net@64 inv-X_10
Xmlat1in5@0 xx[T] xx[F] net@66 net@9 mlat1in5i
Xmlat1in5@1 count[T] count[F] do[1] net@77 mlat1in5i
Xmlat2in1@0 load[F] load[T] xx[F] xx[T] inLO[1] net@63 net@61 mlat2in10i
Xnor2n@0 net@78 count[F] net@84 nor2n-X_10
Xwire90@1 net@67 net@68 wire90-173_2-layer_1-width_3
Xwire90@2 net@65 net@66 wire90-381_1-layer_1-width_3
Xwire90@3 net@60 net@61 wire90-981_4-layer_1-width_3
Xwire90@5 net@63 net@9 wire90-523_4-layer_1-width_3
Xwire90@6 net@64 xx[F] wire90-535_1-layer_1-width_3
Xwire90@7 net@77 net@78 wire90-555_1-layer_1-width_3
Xwire90@8 net@84 xx[T] wire90-677_1-layer_1-width_3
.ENDS ringB

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1350_3-R_34_667m a b
Ccap@0 gnd net@14 4.951f
Ccap@1 gnd net@8 4.951f
Ccap@2 gnd net@11 4.951f
Rres@0 net@14 a 7.802
Rres@1 net@11 net@14 15.603
Rres@2 b net@8 7.802
Rres@3 net@8 net@11 15.603
.ENDS wire-C_0_011f-1350_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1350_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1350_3-R_34_667m
.ENDS wire90-1350_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-985_7-R_34_667m a b
Ccap@0 gnd net@14 3.614f
Ccap@1 gnd net@8 3.614f
Ccap@2 gnd net@11 3.614f
Rres@0 net@14 a 5.695
Rres@1 net@11 net@14 11.39
Rres@2 b net@8 5.695
Rres@3 net@8 net@11 11.39
.ENDS wire-C_0_011f-985_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-985_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-985_7-R_34_667m
.ENDS wire90-985_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1915_8-R_34_667m a b
Ccap@0 gnd net@14 7.025f
Ccap@1 gnd net@8 7.025f
Ccap@2 gnd net@11 7.025f
Rres@0 net@14 a 11.069
Rres@1 net@11 net@14 22.138
Rres@2 b net@8 11.069
Rres@3 net@8 net@11 22.138
.ENDS wire-C_0_011f-1915_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1915_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1915_8-R_34_667m
.ENDS wire90-1915_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1810_4-R_34_667m a b
Ccap@0 gnd net@14 6.638f
Ccap@1 gnd net@8 6.638f
Ccap@2 gnd net@11 6.638f
Rres@0 net@14 a 10.46
Rres@1 net@11 net@14 20.92
Rres@2 b net@8 10.46
Rres@3 net@8 net@11 20.92
.ENDS wire-C_0_011f-1810_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1810_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1810_4-R_34_667m
.ENDS wire90-1810_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-520_8-R_34_667m a b
Ccap@0 gnd net@14 1.91f
Ccap@1 gnd net@8 1.91f
Ccap@2 gnd net@11 1.91f
Rres@0 net@14 a 3.009
Rres@1 net@11 net@14 6.018
Rres@2 b net@8 3.009
Rres@3 net@8 net@11 6.018
.ENDS wire-C_0_011f-520_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-520_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-520_8-R_34_667m
.ENDS wire90-520_8-layer_1-width_3

*** CELL: loopCountL:ilcEven{sch}
.SUBCKT ilcEven bit[2] bit[4] bit[6] bitt[7] count do[2] do[4] do[6] 
+ilc[done] inLO[2] inLO[4] inLO[6] inLO[8] kill load mc zeroLO
Xinv@5 load[F] net@269 inv-X_30
Xinv@6 count[F] net@271 inv-X_30
Xinv@7 count net@273 inv-X_30
Xinv@8 load net@275 inv-X_30
Xinv@9 ilc[done] bitt[7] inv-X_10
XlatchZ10@0 gnd kill load[F] load[T] inLO[8] mc net@317 latchZ10@0_out[T] 
+latchZ10
Xnor2n_sy@1 net@318 zeroLO ilc[done] nor2n_sy-X_20
XringB@0 bit[4] count[F] count[T] do[4] inLO[4] load[F] load[T] ringB
XringB@1 bit[2] count[F] count[T] do[2] inLO[2] load[F] load[T] ringB
XringB@2 bit[6] count[F] count[T] do[6] inLO[6] load[F] load[T] ringB
Xwire90@6 net@269 load[T] wire90-1350_3-layer_1-width_3
Xwire90@7 net@271 count[T] wire90-985_7-layer_1-width_3
Xwire90@8 net@273 count[F] wire90-1915_8-layer_1-width_3
Xwire90@9 net@275 load[F] wire90-1810_4-layer_1-width_3
Xwire90@11 net@318 net@317 wire90-520_8-layer_1-width_3
.ENDS ilcEven

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1278-R_34_667m a b
Ccap@0 gnd net@14 4.686f
Ccap@1 gnd net@8 4.686f
Ccap@2 gnd net@11 4.686f
Rres@0 net@14 a 7.384
Rres@1 net@11 net@14 14.768
Rres@2 b net@8 7.384
Rres@3 net@8 net@11 14.768
.ENDS wire-C_0_011f-1278-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1278-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1278-R_34_667m
.ENDS wire90-1278-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2344-R_34_667m a b
Ccap@0 gnd net@14 8.595f
Ccap@1 gnd net@8 8.595f
Ccap@2 gnd net@11 8.595f
Rres@0 net@14 a 13.543
Rres@1 net@11 net@14 27.086
Rres@2 b net@8 13.543
Rres@3 net@8 net@11 27.086
.ENDS wire-C_0_011f-2344-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2344-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2344-R_34_667m
.ENDS wire90-2344-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-285_1-R_34_667m a b
Ccap@0 gnd net@14 1.045f
Ccap@1 gnd net@8 1.045f
Ccap@2 gnd net@11 1.045f
Rres@0 net@14 a 1.647
Rres@1 net@11 net@14 3.294
Rres@2 b net@8 1.647
Rres@3 net@8 net@11 3.294
.ENDS wire-C_0_011f-285_1-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-285_1-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-285_1-R_34_667m
.ENDS wire90-285_1-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-556_6-R_34_667m a b
Ccap@0 gnd net@14 2.041f
Ccap@1 gnd net@8 2.041f
Ccap@2 gnd net@11 2.041f
Rres@0 net@14 a 3.216
Rres@1 net@11 net@14 6.432
Rres@2 b net@8 3.216
Rres@3 net@8 net@11 6.432
.ENDS wire-C_0_011f-556_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-556_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-556_6-R_34_667m
.ENDS wire90-556_6-layer_1-width_3

*** CELL: loopCountL:ilcOdd{sch}
.SUBCKT ilcOdd bit[1] bit[3] bit[5] count do[3] do[5] do[7] inLO[1] inLO[3] 
+inLO[5] inLO[7] kill load mc zeroLO
Xinv@3 load[F] net@269 inv-X_30
Xinv@4 count[F] net@271 inv-X_30
Xinv@5 count net@273 inv-X_30
Xinv@6 load net@275 inv-X_30
XlatchZ10@0 kill net@369 load[F] load[T] inLO[7] mc zeroLO latchZ10@0_out[T] 
+latchZ10
Xmlat1in5@0 count[T] count[F] do[7] net@376 mlat1in5i
Xnor2n@0 net@378 count[F] net@372 nor2n-X_10
XringB@0 bit[5] count[F] count[T] do[5] inLO[5] load[F] load[T] ringB
XringB@1 bit[3] count[F] count[T] do[3] inLO[3] load[F] load[T] ringB
XringB@2 bit[1] count[F] count[T] vdd inLO[1] load[F] load[T] ringB
Xwire90@2 net@269 load[T] wire90-1350_3-layer_1-width_3
Xwire90@3 net@271 count[T] wire90-1278-layer_1-width_3
Xwire90@4 net@273 count[F] wire90-2344-layer_1-width_3
Xwire90@5 net@275 load[F] wire90-1810_4-layer_1-width_3
Xwire90@10 net@369 net@372 wire90-285_1-layer_1-width_3
Xwire90@11 net@376 net@378 wire90-556_6-layer_1-width_3
.ENDS ilcOdd

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_6_667 d g s
MPMOSf@0 d g s vdd pch W='40.002*(1+ABP/sqrt(40.002*2))' L='2'  
+DELVTO='AVT0P/sqrt(40.002*2)'
.ENDS PMOSx-X_6_667

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_20_001 d g s
MNMOSf@0 d g s gnd nch W='60.003*(1+ABN/sqrt(60.003*2))' L='2' 
+DELVTO='AVT0N/sqrt(60.003*2)'
.ENDS NMOSx-X_20_001

*** CELL: redFour:nms3{sch}
.SUBCKT nms3-X_6_667 d g g2 g3
XNMOS@0 d g3 net@6 NMOSx-X_20_001
XNMOS@1 net@7 g gnd NMOSx-X_20_001
XNMOS@2 net@6 g2 net@7 NMOSx-X_20_001
.ENDS nms3-X_6_667

*** CELL: redFour:nand3{sch}
.SUBCKT nand3-X_6_667 ina inb inc out
XPMOS@0 out inc vdd PMOSx-X_6_667
XPMOS@1 out inb vdd PMOSx-X_6_667
XPMOS@2 out ina vdd PMOSx-X_6_667
Xnms3@0 out ina inb inc nms3-X_6_667
.ENDS nand3-X_6_667

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-549_2-R_34_667m a b
Ccap@0 gnd net@14 2.014f
Ccap@1 gnd net@8 2.014f
Ccap@2 gnd net@11 2.014f
Rres@0 net@14 a 3.173
Rres@1 net@11 net@14 6.346
Rres@2 b net@8 3.173
Rres@3 net@8 net@11 6.346
.ENDS wire-C_0_011f-549_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-549_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-549_2-R_34_667m
.ENDS wire90-549_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-703_8-R_34_667m a b
Ccap@0 gnd net@14 2.581f
Ccap@1 gnd net@8 2.581f
Ccap@2 gnd net@11 2.581f
Rres@0 net@14 a 4.066
Rres@1 net@11 net@14 8.133
Rres@2 b net@8 4.066
Rres@3 net@8 net@11 8.133
.ENDS wire-C_0_011f-703_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-703_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-703_8-R_34_667m
.ENDS wire90-703_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-543_6-R_34_667m a b
Ccap@0 gnd net@14 1.993f
Ccap@1 gnd net@8 1.993f
Ccap@2 gnd net@11 1.993f
Rres@0 net@14 a 3.141
Rres@1 net@11 net@14 6.282
Rres@2 b net@8 3.141
Rres@3 net@8 net@11 6.282
.ENDS wire-C_0_011f-543_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-543_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-543_6-R_34_667m
.ENDS wire90-543_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-645_3-R_34_667m a b
Ccap@0 gnd net@14 2.366f
Ccap@1 gnd net@8 2.366f
Ccap@2 gnd net@11 2.366f
Rres@0 net@14 a 3.728
Rres@1 net@11 net@14 7.457
Rres@2 b net@8 3.728
Rres@3 net@8 net@11 7.457
.ENDS wire-C_0_011f-645_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-645_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-645_3-R_34_667m
.ENDS wire90-645_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-378_8-R_34_667m a b
Ccap@0 gnd net@14 1.389f
Ccap@1 gnd net@8 1.389f
Ccap@2 gnd net@11 1.389f
Rres@0 net@14 a 2.189
Rres@1 net@11 net@14 4.377
Rres@2 b net@8 2.189
Rres@3 net@8 net@11 4.377
.ENDS wire-C_0_011f-378_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-378_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-378_8-R_34_667m
.ENDS wire90-378_8-layer_1-width_3

*** CELL: loopCountL:countLogic{sch}
.SUBCKT countLogic bit[1] bit[2] bit[3] bit[4] bit[5] bit[6] do[2] do[3] 
+do[4] do[5] do[6] do[7]
Xinv@0 net@257 do[2] inv-X_10
Xinv@1 bit[2] net@128 inv-X_10
Xinv@2 bit[1] net@257 inv-X_10
Xnand2@0 bit[3] bit[1] net@145 nand2-X_10
Xnand2@1 bit[4] bit[2] net@195 nand2-X_10
Xnand2@2 bit[3] bit[5] net@315 nand2-X_10
Xnand3@0 bit[5] bit[3] bit[1] net@264 nand3-X_6_667
Xnand3@1 bit[6] bit[4] bit[2] net@198 nand3-X_6_667
Xnor2n@1 net@128 net@257 do[3] nor2n-X_10
Xnor2n@2 net@145 net@146 do[4] nor2n-X_10
Xnor2n@3 net@195 net@58 do[5] nor2n-X_10
Xnor2n@4 net@221 net@56 do[6] nor2n-X_10
Xnor2n@5 net@289 net@267 do[7] nor2n-X_10
Xwire90@0 net@264 net@221 wire90-549_2-layer_1-width_3
Xwire90@1 net@58 net@145 wire90-703_8-layer_1-width_3
Xwire90@3 net@56 net@195 wire90-703_8-layer_1-width_3
Xwire90@5 net@198 net@289 wire90-543_6-layer_1-width_3
Xwire90@6 net@146 net@128 wire90-645_3-layer_1-width_3
Xwire90@8 net@267 net@315 wire90-378_8-layer_1-width_3
.ENDS countLogic

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-374_2-R_34_667m a b
Ccap@0 gnd net@14 1.372f
Ccap@1 gnd net@8 1.372f
Ccap@2 gnd net@11 1.372f
Rres@0 net@14 a 2.162
Rres@1 net@11 net@14 4.324
Rres@2 b net@8 2.162
Rres@3 net@8 net@11 4.324
.ENDS wire-C_0_011f-374_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-374_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-374_2-R_34_667m
.ENDS wire90-374_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-464_8-R_34_667m a b
Ccap@0 gnd net@14 1.704f
Ccap@1 gnd net@8 1.704f
Ccap@2 gnd net@11 1.704f
Rres@0 net@14 a 2.686
Rres@1 net@11 net@14 5.371
Rres@2 b net@8 2.686
Rres@3 net@8 net@11 5.371
.ENDS wire-C_0_011f-464_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-464_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-464_8-R_34_667m
.ENDS wire90-464_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-398_8-R_34_667m a b
Ccap@0 gnd net@14 1.462f
Ccap@1 gnd net@8 1.462f
Ccap@2 gnd net@11 1.462f
Rres@0 net@14 a 2.304
Rres@1 net@11 net@14 4.608
Rres@2 b net@8 2.304
Rres@3 net@8 net@11 4.608
.ENDS wire-C_0_011f-398_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-398_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-398_8-R_34_667m
.ENDS wire90-398_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-474_8-R_34_667m a b
Ccap@0 gnd net@14 1.741f
Ccap@1 gnd net@8 1.741f
Ccap@2 gnd net@11 1.741f
Rres@0 net@14 a 2.743
Rres@1 net@11 net@14 5.487
Rres@2 b net@8 2.743
Rres@3 net@8 net@11 5.487
.ENDS wire-C_0_011f-474_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-474_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-474_8-R_34_667m
.ENDS wire90-474_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-383_8-R_34_667m a b
Ccap@0 gnd net@14 1.407f
Ccap@1 gnd net@8 1.407f
Ccap@2 gnd net@11 1.407f
Rres@0 net@14 a 2.218
Rres@1 net@11 net@14 4.435
Rres@2 b net@8 2.218
Rres@3 net@8 net@11 4.435
.ENDS wire-C_0_011f-383_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-383_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-383_8-R_34_667m
.ENDS wire90-383_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-399_8-R_34_667m a b
Ccap@0 gnd net@14 1.466f
Ccap@1 gnd net@8 1.466f
Ccap@2 gnd net@11 1.466f
Rres@0 net@14 a 2.31
Rres@1 net@11 net@14 4.62
Rres@2 b net@8 2.31
Rres@3 net@8 net@11 4.62
.ENDS wire-C_0_011f-399_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-399_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-399_8-R_34_667m
.ENDS wire90-399_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-975_7-R_34_667m a b
Ccap@0 gnd net@14 3.578f
Ccap@1 gnd net@8 3.578f
Ccap@2 gnd net@11 3.578f
Rres@0 net@14 a 5.637
Rres@1 net@11 net@14 11.275
Rres@2 b net@8 5.637
Rres@3 net@8 net@11 11.275
.ENDS wire-C_0_011f-975_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-975_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-975_7-R_34_667m
.ENDS wire90-975_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1009_4-R_34_667m a b
Ccap@0 gnd net@14 3.701f
Ccap@1 gnd net@8 3.701f
Ccap@2 gnd net@11 3.701f
Rres@0 net@14 a 5.832
Rres@1 net@11 net@14 11.664
Rres@2 b net@8 5.832
Rres@3 net@8 net@11 11.664
.ENDS wire-C_0_011f-1009_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1009_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1009_4-R_34_667m
.ENDS wire90-1009_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-905_8-R_34_667m a b
Ccap@0 gnd net@14 3.321f
Ccap@1 gnd net@8 3.321f
Ccap@2 gnd net@11 3.321f
Rres@0 net@14 a 5.234
Rres@1 net@11 net@14 10.467
Rres@2 b net@8 5.234
Rres@3 net@8 net@11 10.467
.ENDS wire-C_0_011f-905_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-905_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-905_8-R_34_667m
.ENDS wire90-905_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-758_3-R_34_667m a b
Ccap@0 gnd net@14 2.78f
Ccap@1 gnd net@8 2.78f
Ccap@2 gnd net@11 2.78f
Rres@0 net@14 a 4.381
Rres@1 net@11 net@14 8.763
Rres@2 b net@8 4.381
Rres@3 net@8 net@11 8.763
.ENDS wire-C_0_011f-758_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-758_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-758_3-R_34_667m
.ENDS wire90-758_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-643_7-R_34_667m a b
Ccap@0 gnd net@14 2.36f
Ccap@1 gnd net@8 2.36f
Ccap@2 gnd net@11 2.36f
Rres@0 net@14 a 3.719
Rres@1 net@11 net@14 7.438
Rres@2 b net@8 3.719
Rres@3 net@8 net@11 7.438
.ENDS wire-C_0_011f-643_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-643_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-643_7-R_34_667m
.ENDS wire90-643_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-561_7-R_34_667m a b
Ccap@0 gnd net@14 2.06f
Ccap@1 gnd net@8 2.06f
Ccap@2 gnd net@11 2.06f
Rres@0 net@14 a 3.245
Rres@1 net@11 net@14 6.491
Rres@2 b net@8 3.245
Rres@3 net@8 net@11 6.491
.ENDS wire-C_0_011f-561_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-561_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-561_7-R_34_667m
.ENDS wire90-561_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-898_9-R_34_667m a b
Ccap@0 gnd net@14 3.296f
Ccap@1 gnd net@8 3.296f
Ccap@2 gnd net@11 3.296f
Rres@0 net@14 a 5.194
Rres@1 net@11 net@14 10.387
Rres@2 b net@8 5.194
Rres@3 net@8 net@11 10.387
.ENDS wire-C_0_011f-898_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-898_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-898_9-R_34_667m
.ENDS wire90-898_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-902_4-R_34_667m a b
Ccap@0 gnd net@14 3.309f
Ccap@1 gnd net@8 3.309f
Ccap@2 gnd net@11 3.309f
Rres@0 net@14 a 5.214
Rres@1 net@11 net@14 10.428
Rres@2 b net@8 5.214
Rres@3 net@8 net@11 10.428
.ENDS wire-C_0_011f-902_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-902_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-902_4-R_34_667m
.ENDS wire90-902_4-layer_1-width_3

*** CELL: loopCountL:ilc{sch}
.SUBCKT ilc bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] bitt[7] ilc[cnt] 
+ilc[done] ilc[load] inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] inLO[7] 
+inLO[8] kill mc
XilcEven@0 bitt[2] bitt[4] bitt[6] bitt[7] ilc[cnt] do[2] do[4] do[6] 
+ilc[done] inLO[2] inLO[4] inLO[6] inLO[8] kill net@109 mc bit[7] ilcEven
XilcOdd@0 bitt[1] bitt[3] bitt[5] ilc[cnt] do[3] do[5] do[7] inLO[1] inLO[3] 
+inLO[5] inLO[7] kill net@109 mc bit[7] ilcOdd
Xinv@4 ilc[load] net@304 inv-X_30
XolcCente@0 bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] do[2] do[3] do[4] 
+do[5] do[6] do[7] countLogic
Xwire90@1 wire90@1_a do[2] wire90-374_2-layer_1-width_3
Xwire90@2 wire90@2_a do[3] wire90-464_8-layer_1-width_3
Xwire90@3 wire90@3_a do[4] wire90-398_8-layer_1-width_3
Xwire90@4 wire90@4_a do[5] wire90-474_8-layer_1-width_3
Xwire90@5 wire90@5_a do[6] wire90-383_8-layer_1-width_3
Xwire90@6 wire90@6_a do[7] wire90-399_8-layer_1-width_3
Xwire90@7 wire90@7_a bitt[1] wire90-975_7-layer_1-width_3
Xwire90@8 wire90@8_a bitt[2] wire90-1009_4-layer_1-width_3
Xwire90@9 wire90@9_a bitt[3] wire90-905_8-layer_1-width_3
Xwire90@10 wire90@10_a bitt[4] wire90-758_3-layer_1-width_3
Xwire90@11 wire90@11_a bitt[5] wire90-643_7-layer_1-width_3
Xwire90@12 wire90@12_a bitt[6] wire90-561_7-layer_1-width_3
Xwire90@35 net@109 net@304 wire90-898_9-layer_1-width_3
Xwire90@36 wire90@36_a bit[7] wire90-902_4-layer_1-width_3
.ENDS ilc

*** CELL: redFour:triInv{sch}
.SUBCKT triInv-X_10 en enB in out
Xnms2@0 out in en nms2-X_10
Xpms2@0 out in enB pms2-X_10
.ENDS triInv-X_10

*** CELL: gatesK:mux10{sch}
.SUBCKT mux10 inA[1] inB[1] out[1] s[F] s[T]
XtriInv@0 s[T] s[F] inA[1] out[1] triInv-X_10
XtriInv@1 s[F] s[T] inB[1] out[1] triInv-X_10
.ENDS mux10

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-0-R_34_667m a b
Ccap@0 gnd net@14 0
Ccap@1 gnd net@8 0
Ccap@2 gnd net@11 0
Rres@0 net@14 a 0
Rres@1 net@11 net@14 0
Rres@2 b net@8 0
Rres@3 net@8 net@11 0
.ENDS wire-C_0_011f-0-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-0-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-0-R_34_667m
.ENDS wire90-0-layer_1-width_3

*** CELL: loopCountL:inMux{sch}
.SUBCKT inMux inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inB[1] inB[2] inB[3] 
+inB[4] inB[5] inB[6] inB[8] out[1] out[2] out[3] out[4] out[5] out[6] out[7] 
+out[8] sel[A]
Xinv@0 sel[A] net@10 inv-X_20
Xinv@1 s[F] net@12 inv-X_20
Xmux[1] inA[1] inB[1] out[1] s[F] s[T] mux10
Xmux[2] inA[2] inB[2] out[2] s[F] s[T] mux10
Xmux[3] inA[3] inB[3] out[3] s[F] s[T] mux10
Xmux[4] inA[4] inB[4] out[4] s[F] s[T] mux10
Xmux[5] inA[5] inB[5] out[5] s[F] s[T] mux10
Xmux[6] inA[6] inB[6] out[6] s[F] s[T] mux10
Xmux[8] gnd inB[8] out[8] s[F] s[T] mux10
Xnand3@1 out[1] out[2] out[5] net@25 nand3-X_6_667
Xnand3@2 out[3] out[4] out[6] net@24 nand3-X_6_667
Xnor2n_sy@0 net@18 net@20 out[7] nor2n_sy-X_10
Xwire90@0 net@10 s[F] wire90-0-layer_1-width_3
Xwire90@1 net@12 s[T] wire90-0-layer_1-width_3
Xwire90@2 net@24 net@20 wire90-0-layer_1-width_3
Xwire90@3 net@18 net@25 wire90-0-layer_1-width_3
.ENDS inMux

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-836_8-R_34_667m a b
Ccap@0 gnd net@14 3.068f
Ccap@1 gnd net@8 3.068f
Ccap@2 gnd net@11 3.068f
Rres@0 net@14 a 4.835
Rres@1 net@11 net@14 9.67
Rres@2 b net@8 4.835
Rres@3 net@8 net@11 9.67
.ENDS wire-C_0_011f-836_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-836_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-836_8-R_34_667m
.ENDS wire90-836_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1053_4-R_34_667m a b
Ccap@0 gnd net@14 3.862f
Ccap@1 gnd net@8 3.862f
Ccap@2 gnd net@11 3.862f
Rres@0 net@14 a 6.086
Rres@1 net@11 net@14 12.173
Rres@2 b net@8 6.086
Rres@3 net@8 net@11 12.173
.ENDS wire-C_0_011f-1053_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1053_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1053_4-R_34_667m
.ENDS wire90-1053_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1764_4-R_34_667m a b
Ccap@0 gnd net@14 6.469f
Ccap@1 gnd net@8 6.469f
Ccap@2 gnd net@11 6.469f
Rres@0 net@14 a 10.194
Rres@1 net@11 net@14 20.389
Rres@2 b net@8 10.194
Rres@3 net@8 net@11 20.389
.ENDS wire-C_0_011f-1764_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1764_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1764_4-R_34_667m
.ENDS wire90-1764_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1373_4-R_34_667m a b
Ccap@0 gnd net@14 5.036f
Ccap@1 gnd net@8 5.036f
Ccap@2 gnd net@11 5.036f
Rres@0 net@14 a 7.935
Rres@1 net@11 net@14 15.87
Rres@2 b net@8 7.935
Rres@3 net@8 net@11 15.87
.ENDS wire-C_0_011f-1373_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1373_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1373_4-R_34_667m
.ENDS wire90-1373_4-layer_1-width_3

*** CELL: loopCountL:olcEven{sch}
.SUBCKT olcEven bit[2] bit[4] bit[6] count[2] do[2] do[4] do[6] inLO[2] 
+inLO[4] inLO[6] load[2]
Xinv@0 count[F] net@196 inv-X_20
Xinv@1 load[F] net@207 inv-X_20
Xinv@2 count[2] net@210 inv-X_30
Xinv@3 load[2] net@211 inv-X_30
XringB@0 bit[4] count[F] count[T] do[4] inLO[4] load[F] load[T] ringB
XringB@1 bit[2] count[F] count[T] do[2] inLO[2] load[F] load[T] ringB
XringB@2 bit[6] count[F] count[T] do[6] inLO[6] load[F] load[T] ringB
Xwire90@1 net@196 count[T] wire90-836_8-layer_1-width_3
Xwire90@2 net@207 load[T] wire90-1053_4-layer_1-width_3
Xwire90@3 net@210 count[F] wire90-1764_4-layer_1-width_3
Xwire90@4 net@211 load[F] wire90-1373_4-layer_1-width_3
.ENDS olcEven

*** CELL: loopCountL:olcOdd{sch}
.SUBCKT olcOdd bit[1] bit[3] bit[5] count[1] do[3] do[5] inLO[1] inLO[3] 
+inLO[5] load[1]
Xinv@0 count[F] net@299 inv-X_20
Xinv@1 load[F] net@300 inv-X_20
Xinv@2 load[1] net@307 inv-X_30
Xinv@3 count[1] net@310 inv-X_30
XringB@0 bit[5] count[F] count[T] do[5] inLO[5] load[F] load[T] ringB
XringB@1 bit[3] count[F] count[T] do[3] inLO[3] load[F] load[T] ringB
XringB@2 bit[1] count[F] count[T] vdd inLO[1] load[F] load[T] ringB
Xwire90@0 net@299 count[T] wire90-836_8-layer_1-width_3
Xwire90@1 net@300 load[T] wire90-1053_4-layer_1-width_3
Xwire90@2 net@307 load[F] wire90-1373_4-layer_1-width_3
Xwire90@3 net@310 count[F] wire90-1764_4-layer_1-width_3
.ENDS olcOdd

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-538_8-R_34_667m a b
Ccap@0 gnd net@14 1.976f
Ccap@1 gnd net@8 1.976f
Ccap@2 gnd net@11 1.976f
Rres@0 net@14 a 3.113
Rres@1 net@11 net@14 6.226
Rres@2 b net@8 3.113
Rres@3 net@8 net@11 6.226
.ENDS wire-C_0_011f-538_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-538_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-538_8-R_34_667m
.ENDS wire90-538_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-472_8-R_34_667m a b
Ccap@0 gnd net@14 1.734f
Ccap@1 gnd net@8 1.734f
Ccap@2 gnd net@11 1.734f
Rres@0 net@14 a 2.732
Rres@1 net@11 net@14 5.463
Rres@2 b net@8 2.732
Rres@3 net@8 net@11 5.463
.ENDS wire-C_0_011f-472_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-472_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-472_8-R_34_667m
.ENDS wire90-472_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-548_8-R_34_667m a b
Ccap@0 gnd net@14 2.012f
Ccap@1 gnd net@8 2.012f
Ccap@2 gnd net@11 2.012f
Rres@0 net@14 a 3.171
Rres@1 net@11 net@14 6.342
Rres@2 b net@8 3.171
Rres@3 net@8 net@11 6.342
.ENDS wire-C_0_011f-548_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-548_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-548_8-R_34_667m
.ENDS wire90-548_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-457_8-R_34_667m a b
Ccap@0 gnd net@14 1.679f
Ccap@1 gnd net@8 1.679f
Ccap@2 gnd net@11 1.679f
Rres@0 net@14 a 2.645
Rres@1 net@11 net@14 5.29
Rres@2 b net@8 2.645
Rres@3 net@8 net@11 5.29
.ENDS wire-C_0_011f-457_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-457_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-457_8-R_34_667m
.ENDS wire90-457_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1049_7-R_34_667m a b
Ccap@0 gnd net@14 3.849f
Ccap@1 gnd net@8 3.849f
Ccap@2 gnd net@11 3.849f
Rres@0 net@14 a 6.065
Rres@1 net@11 net@14 12.13
Rres@2 b net@8 6.065
Rres@3 net@8 net@11 12.13
.ENDS wire-C_0_011f-1049_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1049_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1049_7-R_34_667m
.ENDS wire90-1049_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1049_4-R_34_667m a b
Ccap@0 gnd net@14 3.848f
Ccap@1 gnd net@8 3.848f
Ccap@2 gnd net@11 3.848f
Rres@0 net@14 a 6.063
Rres@1 net@11 net@14 12.126
Rres@2 b net@8 6.063
Rres@3 net@8 net@11 12.126
.ENDS wire-C_0_011f-1049_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1049_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1049_4-R_34_667m
.ENDS wire90-1049_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-979_8-R_34_667m a b
Ccap@0 gnd net@14 3.593f
Ccap@1 gnd net@8 3.593f
Ccap@2 gnd net@11 3.593f
Rres@0 net@14 a 5.661
Rres@1 net@11 net@14 11.322
Rres@2 b net@8 5.661
Rres@3 net@8 net@11 11.322
.ENDS wire-C_0_011f-979_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-979_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-979_8-R_34_667m
.ENDS wire90-979_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-786_3-R_34_667m a b
Ccap@0 gnd net@14 2.883f
Ccap@1 gnd net@8 2.883f
Ccap@2 gnd net@11 2.883f
Rres@0 net@14 a 4.543
Rres@1 net@11 net@14 9.086
Rres@2 b net@8 4.543
Rres@3 net@8 net@11 9.086
.ENDS wire-C_0_011f-786_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-786_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-786_3-R_34_667m
.ENDS wire90-786_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-717_7-R_34_667m a b
Ccap@0 gnd net@14 2.632f
Ccap@1 gnd net@8 2.632f
Ccap@2 gnd net@11 2.632f
Rres@0 net@14 a 4.147
Rres@1 net@11 net@14 8.293
Rres@2 b net@8 4.147
Rres@3 net@8 net@11 8.293
.ENDS wire-C_0_011f-717_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-717_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-717_7-R_34_667m
.ENDS wire90-717_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-487_7-R_34_667m a b
Ccap@0 gnd net@14 1.788f
Ccap@1 gnd net@8 1.788f
Ccap@2 gnd net@11 1.788f
Rres@0 net@14 a 2.818
Rres@1 net@11 net@14 5.636
Rres@2 b net@8 2.818
Rres@3 net@8 net@11 5.636
.ENDS wire-C_0_011f-487_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-487_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-487_7-R_34_667m
.ENDS wire90-487_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-426-R_34_667m a b
Ccap@0 gnd net@14 1.562f
Ccap@1 gnd net@8 1.562f
Ccap@2 gnd net@11 1.562f
Rres@0 net@14 a 2.461
Rres@1 net@11 net@14 4.923
Rres@2 b net@8 2.461
Rres@3 net@8 net@11 4.923
.ENDS wire-C_0_011f-426-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-426-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-426-R_34_667m
.ENDS wire90-426-layer_1-width_3

*** CELL: loopCountL:olc{sch}
.SUBCKT olc bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] doLO[7] inLO[1] 
+inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] olc[dec][1] olc[dec][2] olc[load][1] 
+olc[load][2]
Xinv@6 net@270 doLO[7] inv-X_20
XolcCente@1 bitt[1] bitt[2] bitt[3] bitt[4] bitt[5] bitt[6] do[2] do[3] do[4] 
+do[5] do[6] net@271 countLogic
XolcEven@0 bitt[2] bitt[4] bitt[6] olc[dec][2] do[2] do[4] do[6] inLO[2] 
+inLO[4] inLO[6] olc[load][2] olcEven
XolcOdd@1 bitt[1] bitt[3] bitt[5] olc[dec][1] do[3] do[5] inLO[1] inLO[3] 
+inLO[5] olc[load][1] olcOdd
Xwire90@1 wire90@1_a do[2] wire90-374_2-layer_1-width_3
Xwire90@2 wire90@2_a do[3] wire90-538_8-layer_1-width_3
Xwire90@3 wire90@3_a do[4] wire90-472_8-layer_1-width_3
Xwire90@4 wire90@4_a do[5] wire90-548_8-layer_1-width_3
Xwire90@5 wire90@5_a do[6] wire90-457_8-layer_1-width_3
Xwire90@7 wire90@7_a bitt[1] wire90-1049_7-layer_1-width_3
Xwire90@8 wire90@8_a bitt[2] wire90-1049_4-layer_1-width_3
Xwire90@9 wire90@9_a bitt[3] wire90-979_8-layer_1-width_3
Xwire90@10 wire90@10_a bitt[4] wire90-786_3-layer_1-width_3
Xwire90@11 wire90@11_a bitt[5] wire90-717_7-layer_1-width_3
Xwire90@12 wire90@12_a bitt[6] wire90-487_7-layer_1-width_3
Xwire90@29 net@270 net@271 wire90-426-layer_1-width_3
.ENDS olc

*** CELL: scanK:scanKx3{sch}
.SUBCKT scanKx3 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] mc rd[F] rd[T] 
+sin sout
XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
+scanCellKh
XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
+scanCellKh
XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 sout 
+scanCellKh
Xwire90@0 net@18 net@31 wire90-297_9-layer_1-width_3
Xwire90@1 net@20 net@32 wire90-297_9-layer_1-width_3
.ENDS scanKx3

*** CELL: scanK:scanKx6{sch}
.SUBCKT scanKx6 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] din[4] din[5] 
+din[6] mc rd[F] rd[T] sin sout
XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
+scanCellKh
XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
+scanCellKh
XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 net@24 
+scanCellKh
XscanCell@7 clS[F] clS[T] cl[F] cl[T] din[4] rd[F] rd[T] net@33 net@51 
+scanCellKh
XscanCell@8 clS[F] clS[T] cl[F] cl[T] din[5] rd[F] rd[T] net@50 net@56 
+scanCellKh
XscanCell@9 clS[F] clS[T] cl[F] cl[T] din[6] rd[F] rd[T] net@55 sout 
+scanCellKh
Xwire90@0 net@18 net@31 wire90-297_9-layer_1-width_3
Xwire90@1 net@20 net@32 wire90-297_9-layer_1-width_3
Xwire90@2 net@24 net@33 wire90-297_9-layer_1-width_3
Xwire90@3 net@51 net@50 wire90-297_9-layer_1-width_3
Xwire90@4 net@56 net@55 wire90-297_9-layer_1-width_3
.ENDS scanKx6

*** CELL: scanK:scanKx7{sch}
.SUBCKT scanKx7 clS[F] clS[T] cl[F] cl[T] din[1] din[2] din[3] din[4] din[5] 
+din[6] din[7] mc rd[F] rd[T] sin sout
XscanCell@4 clS[F] clS[T] cl[F] cl[T] din[1] rd[F] rd[T] sin net@18 
+scanCellKh
XscanCell@5 clS[F] clS[T] cl[F] cl[T] din[2] rd[F] rd[T] net@31 net@20 
+scanCellKh
XscanCell@6 clS[F] clS[T] cl[F] cl[T] din[3] rd[F] rd[T] net@32 net@24 
+scanCellKh
XscanCell@7 clS[F] clS[T] cl[F] cl[T] din[4] rd[F] rd[T] net@33 net@51 
+scanCellKh
XscanCell@8 clS[F] clS[T] cl[F] cl[T] din[5] rd[F] rd[T] net@50 net@56 
+scanCellKh
XscanCell@9 clS[F] clS[T] cl[F] cl[T] din[6] rd[F] rd[T] net@55 net@63 
+scanCellKh
XscanCell@10 clS[F] clS[T] cl[F] cl[T] din[7] rd[F] rd[T] net@61 sout 
+scanCellKh
Xwire90@0 net@18 net@31 wire90-297_9-layer_1-width_3
Xwire90@1 net@20 net@32 wire90-297_9-layer_1-width_3
Xwire90@2 net@24 net@33 wire90-297_9-layer_1-width_3
Xwire90@3 net@51 net@50 wire90-297_9-layer_1-width_3
Xwire90@4 net@56 net@55 wire90-297_9-layer_1-width_3
Xwire90@5 net@63 net@61 wire90-297_9-layer_1-width_3
.ENDS scanKx7

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-99_3-R_34_667m a b
Ccap@0 gnd net@14 0.364f
Ccap@1 gnd net@8 0.364f
Ccap@2 gnd net@11 0.364f
Rres@0 net@14 a 0.574
Rres@1 net@11 net@14 1.147
Rres@2 b net@8 0.574
Rres@3 net@8 net@11 1.147
.ENDS wire-C_0_011f-99_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-99_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-99_3-R_34_667m
.ENDS wire90-99_3-layer_1-width_3

*** CELL: skipL:latchA20{sch}
.SUBCKT latchA20 cl[F] cl[T] in[1] mc out[1]
MNMOSf@1 out[1] net@186 gnd gnd nch W='12*(1+ABN/sqrt(12*3))' L='3' 
+DELVTO='AVT0N/sqrt(12*3)'
XNMOSx@2 out[1] mc gnd NMOSx-X_10
XPMOSx@2 out[1] net@193 vdd PMOSx-X_2
XinvLT@0 out[1] net@186 invLT-X_2
Xnms2@0 out[1] in[1] cl[T] nms2-X_20
Xpms2@0 out[1] in[1] cl[F] pms2-X_20
Xwire90@0 net@186 net@193 wire90-99_3-layer_1-width_3
.ENDS latchA20

*** CELL: skipL:flagDrivers{sch}
.SUBCKT flagDrivers flag[A] flag[B] flag[C] in[A] in[B] in[C] loadC[T] 
+loadFlags[F] mc
Xinv@0 loadFlags[F] net@511 inv-X_20
Xinv@1 loadC[T] net@540 inv-X_10
XlatchA20@0 loadFlags[F] loadFlags[T] in[A] mc flag[A] latchA20
XlatchA20@1 loadFlags[F] loadFlags[T] in[B] mc flag[B] latchA20
XlatchA20@2 loadC[F] loadC[T] in[C] mc flag[C] latchA20
Xwire90@0 net@511 loadFlags[T] wire90-99_3-layer_1-width_3
Xwire90@1 net@540 loadC[F] wire90-99_3-layer_1-width_3
.ENDS flagDrivers

*** CELL: redFour:triInv{sch}
.SUBCKT triInv-X_5 en enB in out
Xnms2@0 out in en nms2-X_5
Xpms2@0 out in enB pms2-X_5
.ENDS triInv-X_5

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-183-R_34_667m a b
Ccap@0 gnd net@14 0.671f
Ccap@1 gnd net@8 0.671f
Ccap@2 gnd net@11 0.671f
Rres@0 net@14 a 1.057
Rres@1 net@11 net@14 2.115
Rres@2 b net@8 1.057
Rres@3 net@8 net@11 2.115
.ENDS wire-C_0_011f-183-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-183-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-183-R_34_667m
.ENDS wire90-183-layer_1-width_3

*** CELL: skipL:muxInv{sch}
.SUBCKT muxInv flag in[1][F] in[1][T] out
Xinv@3 flag net@119 inv-X_5
XtriInv@0 net@123 flag in[1][F] out triInv-X_5
XtriInv@1 flag net@123 in[1][T] out triInv-X_5
Xwire90@3 net@119 net@123 wire90-183-layer_1-width_3
.ENDS muxInv

*** CELL: redFour:nms2_sy{sch}
.SUBCKT nms2_sy-X_6 d g g2
Xnms2@0 d g g2 nms2-X_3
Xnms2@1 d g2 g nms2-X_3
.ENDS nms2_sy-X_6

*** CELL: redFour:nand2_sy{sch}
.SUBCKT nand2_sy-X_6 ina inb out
XPMOS@0 out inb vdd PMOSx-X_6
XPMOS@1 out ina vdd PMOSx-X_6
Xnms2_sy@0 out ina inb nms2_sy-X_6
.ENDS nand2_sy-X_6

*** CELL: redFour:nand2n_sy{sch}
.SUBCKT nand2n_sy-X_6 ina inb out
Xnand2_sy@0 ina inb out nand2_sy-X_6
.ENDS nand2n_sy-X_6

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-239_6-R_34_667m a b
Ccap@0 gnd net@14 0.879f
Ccap@1 gnd net@8 0.879f
Ccap@2 gnd net@11 0.879f
Rres@0 net@14 a 1.384
Rres@1 net@11 net@14 2.769
Rres@2 b net@8 1.384
Rres@3 net@8 net@11 2.769
.ENDS wire-C_0_011f-239_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-239_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-239_6-R_34_667m
.ENDS wire90-239_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-321_6-R_34_667m a b
Ccap@0 gnd net@14 1.179f
Ccap@1 gnd net@8 1.179f
Ccap@2 gnd net@11 1.179f
Rres@0 net@14 a 1.858
Rres@1 net@11 net@14 3.716
Rres@2 b net@8 1.858
Rres@3 net@8 net@11 3.716
.ENDS wire-C_0_011f-321_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-321_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-321_6-R_34_667m
.ENDS wire90-321_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-345-R_34_667m a b
Ccap@0 gnd net@14 1.265f
Ccap@1 gnd net@8 1.265f
Ccap@2 gnd net@11 1.265f
Rres@0 net@14 a 1.993
Rres@1 net@11 net@14 3.987
Rres@2 b net@8 1.993
Rres@3 net@8 net@11 3.987
.ENDS wire-C_0_011f-345-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-345-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-345-R_34_667m
.ENDS wire90-345-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-883_7-R_34_667m a b
Ccap@0 gnd net@14 3.24f
Ccap@1 gnd net@8 3.24f
Ccap@2 gnd net@11 3.24f
Rres@0 net@14 a 5.106
Rres@1 net@11 net@14 10.212
Rres@2 b net@8 5.106
Rres@3 net@8 net@11 10.212
.ENDS wire-C_0_011f-883_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-883_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-883_7-R_34_667m
.ENDS wire90-883_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1192-R_34_667m a b
Ccap@0 gnd net@14 4.371f
Ccap@1 gnd net@8 4.371f
Ccap@2 gnd net@11 4.371f
Rres@0 net@14 a 6.887
Rres@1 net@11 net@14 13.774
Rres@2 b net@8 6.887
Rres@3 net@8 net@11 13.774
.ENDS wire-C_0_011f-1192-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1192-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1192-R_34_667m
.ENDS wire90-1192-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1256-R_34_667m a b
Ccap@0 gnd net@14 4.605f
Ccap@1 gnd net@8 4.605f
Ccap@2 gnd net@11 4.605f
Rres@0 net@14 a 7.257
Rres@1 net@11 net@14 14.514
Rres@2 b net@8 7.257
Rres@3 net@8 net@11 14.514
.ENDS wire-C_0_011f-1256-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1256-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1256-R_34_667m
.ENDS wire90-1256-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1068_8-R_34_667m a b
Ccap@0 gnd net@14 3.919f
Ccap@1 gnd net@8 3.919f
Ccap@2 gnd net@11 3.919f
Rres@0 net@14 a 6.175
Rres@1 net@11 net@14 12.351
Rres@2 b net@8 6.175
Rres@3 net@8 net@11 12.351
.ENDS wire-C_0_011f-1068_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1068_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1068_8-R_34_667m
.ENDS wire90-1068_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-839_7-R_34_667m a b
Ccap@0 gnd net@14 3.079f
Ccap@1 gnd net@8 3.079f
Ccap@2 gnd net@11 3.079f
Rres@0 net@14 a 4.852
Rres@1 net@11 net@14 9.703
Rres@2 b net@8 4.852
Rres@3 net@8 net@11 9.703
.ENDS wire-C_0_011f-839_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-839_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-839_7-R_34_667m
.ENDS wire90-839_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-247_7-R_34_667m a b
Ccap@0 gnd net@14 0.908f
Ccap@1 gnd net@8 0.908f
Ccap@2 gnd net@11 0.908f
Rres@0 net@14 a 1.431
Rres@1 net@11 net@14 2.862
Rres@2 b net@8 1.431
Rres@3 net@8 net@11 2.862
.ENDS wire-C_0_011f-247_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-247_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-247_7-R_34_667m
.ENDS wire90-247_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-245_7-R_34_667m a b
Ccap@0 gnd net@14 0.901f
Ccap@1 gnd net@8 0.901f
Ccap@2 gnd net@11 0.901f
Rres@0 net@14 a 1.42
Rres@1 net@11 net@14 2.839
Rres@2 b net@8 1.42
Rres@3 net@8 net@11 2.839
.ENDS wire-C_0_011f-245_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-245_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-245_7-R_34_667m
.ENDS wire90-245_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-216_4-R_37_143m a b
Ccap@0 gnd net@14 0.793f
Ccap@1 gnd net@8 0.793f
Ccap@2 gnd net@11 0.793f
Rres@0 net@14 a 1.34
Rres@1 net@11 net@14 2.679
Rres@2 b net@8 1.34
Rres@3 net@8 net@11 2.679
.ENDS wire-C_0_011f-216_4-R_37_143m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-216_4-layer_1-width_2_8 a b
Xwire@0 a b wire-C_0_011f-216_4-R_37_143m
.ENDS wire90-216_4-layer_1-width_2_8

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-505_7-R_34_667m a b
Ccap@0 gnd net@14 1.854f
Ccap@1 gnd net@8 1.854f
Ccap@2 gnd net@11 1.854f
Rres@0 net@14 a 2.922
Rres@1 net@11 net@14 5.844
Rres@2 b net@8 2.922
Rres@3 net@8 net@11 5.844
.ENDS wire-C_0_011f-505_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-505_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-505_7-R_34_667m
.ENDS wire90-505_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-353_6-R_34_667m a b
Ccap@0 gnd net@14 1.297f
Ccap@1 gnd net@8 1.297f
Ccap@2 gnd net@11 1.297f
Rres@0 net@14 a 2.043
Rres@1 net@11 net@14 4.086
Rres@2 b net@8 2.043
Rres@3 net@8 net@11 4.086
.ENDS wire-C_0_011f-353_6-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-353_6-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-353_6-R_34_667m
.ENDS wire90-353_6-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-313_9-R_34_667m a b
Ccap@0 gnd net@14 1.151f
Ccap@1 gnd net@8 1.151f
Ccap@2 gnd net@11 1.151f
Rres@0 net@14 a 1.814
Rres@1 net@11 net@14 3.627
Rres@2 b net@8 1.814
Rres@3 net@8 net@11 3.627
.ENDS wire-C_0_011f-313_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-313_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-313_9-R_34_667m
.ENDS wire90-313_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-309_5-R_34_667m a b
Ccap@0 gnd net@14 1.135f
Ccap@1 gnd net@8 1.135f
Ccap@2 gnd net@11 1.135f
Rres@0 net@14 a 1.788
Rres@1 net@11 net@14 3.576
Rres@2 b net@8 1.788
Rres@3 net@8 net@11 3.576
.ENDS wire-C_0_011f-309_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-309_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-309_5-R_34_667m
.ENDS wire90-309_5-layer_1-width_3

*** CELL: skipL:array{sch}
.SUBCKT array doit flag[A] flag[B] flag[C] flag[NZ] in[1][F] in[1][T] 
+in[2][F] in[2][T] in[3][F] in[3][T] in[4][F] in[4][T] in[5][F] in[5][T] 
+in[6][F] in[6][T] in[7][F] in[7][T] in[8][F] in[8][T] in[9][F] in[9][T] in[C] 
+loadC[T] loadFlags[F] m1[F] m1[T] mc
XflagDriv@0 net@1022 net@1015 net@1007 net@1012 net@1009 in[C] loadC[T] 
+loadFlags[F] mc flagDrivers
Xinv@3 net@57 net@344 inv-X_10
Xinv@9 net@352 net@350 inv-X_10
Xinv@13 net@876 doit inv-X_20
Xinv@14 net@924 net@925 inv-X_5
Xinv@15 net@978 net@948 inv-X_5
Xinv@16 net@977 net@963 inv-X_5
Xmlat1in5@2 m1[F] m1[T] net@906 net@45 mlat1in5i
Xmlat1in5@4 m1[F] m1[T] net@927 net@912 mlat1in5i
Xmlat1in5@5 m1[F] m1[T] net@938 net@937 mlat1in5i
Xmlat1in5@6 m1[F] m1[T] net@949 net@940 mlat1in5i
Xmlat1in5@7 m1[F] m1[T] net@953 net@952 mlat1in5i
Xmlat1in5@8 m1[F] m1[T] net@964 net@955 mlat1in5i
XmuxInv@24 flag[A] in[1][F] in[1][T] net@711 muxInv
XmuxInv@25 flag[B] in[2][F] in[2][T] net@722 muxInv
XmuxInv@26 flag[C] in[3][F] in[3][T] net@733 muxInv
XmuxInv@27 flag[A] in[4][F] in[4][T] net@744 muxInv
XmuxInv@28 flag[B] in[5][F] in[5][T] net@755 muxInv
XmuxInv@29 flag[C] in[6][F] in[6][T] net@766 muxInv
XmuxInv@30 flag[A] in[7][F] in[7][T] net@777 muxInv
XmuxInv@31 flag[B] in[8][F] in[8][T] net@788 muxInv
XmuxInv@32 flag[NZ] in[9][F] in[9][T] net@799 muxInv
Xnand2n_s@0 net@895 net@896 net@909 nand2n_sy-X_6
Xnand2n_s@3 net@913 net@916 pFlag[A] nand2n_sy-X_6
Xnand2n_s@4 net@973 net@974 net@939 nand2n_sy-X_6
Xnand2n_s@5 net@941 net@944 pFlag[B] nand2n_sy-X_6
Xnand2n_s@6 net@971 net@972 net@954 nand2n_sy-X_6
Xnand2n_s@7 net@956 net@959 net@993 nand2n_sy-X_10
Xwire90@12 net@925 net@906 wire90-239_6-layer_1-width_3
Xwire90@13 net@45 net@913 wire90-321_6-layer_1-width_3
Xwire90@15 net@57 pFlag[B] wire90-345-layer_1-width_3
Xwire90@17 net@344 net@1009 wire90-883_7-layer_1-width_3
Xwire90@19 flag[A] net@1022 wire90-1192-layer_1-width_3
Xwire90@42 flag[B] net@1015 wire90-1256-layer_1-width_3
Xwire90@43 flag[C] net@1007 wire90-1068_8-layer_1-width_3
Xwire90@44 net@352 pFlag[A] wire90-345-layer_1-width_3
Xwire90@45 net@350 net@1012 wire90-839_7-layer_1-width_3
Xwire90@47 net@711 net@896 wire90-247_7-layer_1-width_3
Xwire90@50 net@744 net@974 wire90-247_7-layer_1-width_3
Xwire90@66 net@777 net@972 wire90-247_7-layer_1-width_3
Xwire90@68 net@722 net@895 wire90-245_7-layer_1-width_3
Xwire90@69 net@755 net@973 wire90-245_7-layer_1-width_3
Xwire90@70 net@788 net@971 wire90-245_7-layer_1-width_3
Xwire90@71 net@733 net@924 wire90-216_4-layer_1-width_2_8
Xwire90@72 net@766 net@978 wire90-216_4-layer_1-width_2_8
Xwire90@73 net@799 net@977 wire90-216_4-layer_1-width_2_8
Xwire90@74 net@993 net@876 wire90-505_7-layer_1-width_3
Xwire90@75 net@909 net@927 wire90-353_6-layer_1-width_3
Xwire90@76 net@912 net@916 wire90-321_6-layer_1-width_3
Xwire90@77 net@948 net@938 wire90-239_6-layer_1-width_3
Xwire90@78 net@937 net@941 wire90-321_6-layer_1-width_3
Xwire90@79 net@939 net@949 wire90-353_6-layer_1-width_3
Xwire90@80 net@940 net@944 wire90-321_6-layer_1-width_3
Xwire90@81 net@963 net@953 wire90-239_6-layer_1-width_3
Xwire90@82 net@952 net@956 wire90-313_9-layer_1-width_3
Xwire90@83 net@954 net@964 wire90-353_6-layer_1-width_3
Xwire90@84 net@955 net@959 wire90-309_5-layer_1-width_3
.ENDS array

*** CELL: orangeTSMC090nm:NMOSx{sch}
.SUBCKT NMOSx-X_80 d g s
MNMOSf@0 d g s gnd nch W='240*(1+ABN/sqrt(240*2))' L='2' 
+DELVTO='AVT0N/sqrt(240*2)'
.ENDS NMOSx-X_80

*** CELL: orangeTSMC090nm:PMOSx{sch}
.SUBCKT PMOSx-X_80 d g s
MPMOSf@0 d g s vdd pch W='480*(1+ABP/sqrt(480*2))' L='2'  
+DELVTO='AVT0P/sqrt(480*2)'
.ENDS PMOSx-X_80

*** CELL: redFour:inv{sch}
.SUBCKT inv-X_80 in out
XNMOS@0 out in gnd NMOSx-X_80
XPMOS@0 out in vdd PMOSx-X_80
.ENDS inv-X_80

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-262_8-R_34_667m a b
Ccap@0 gnd net@14 0.964f
Ccap@1 gnd net@8 0.964f
Ccap@2 gnd net@11 0.964f
Rres@0 net@14 a 1.518
Rres@1 net@11 net@14 3.037
Rres@2 b net@8 1.518
Rres@3 net@8 net@11 3.037
.ENDS wire-C_0_011f-262_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-262_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-262_8-R_34_667m
.ENDS wire90-262_8-layer_1-width_3

*** CELL: skipL:proposeZero{sch}
.SUBCKT proposeZero doLO[7] flag[NZ] inLO[7] kill mc olcNZ olc[dec][F] 
+olc[load][F]
Xinv@1 olc[load][F] net@39 inv-X_10
XlatchZ10@1 kill net@14 olc[load][F] olc[load][T] inLO[7] mc olcNZ flag[NZ] 
+latchZ10
Xnor2n_sy@0 olc[dec][F] doLO[7] net@12 nor2n_sy-X_5
Xwire90@0 olc[load][T] net@39 wire90-262_8-layer_1-width_3
Xwire90@1 net@12 net@14 wire90-216_3-layer_1-width_3
.ENDS proposeZero

*** CELL: skipL:skipReg18{sch}
.SUBCKT skipReg18 c[F] c[T] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
+in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] 
+out[11] out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[1] out[2] 
+out[3] out[4] out[5] out[6] out[7] out[8] out[9]
Xinv@0 in[1] xx[1] inv-X_10
Xinv@15 in[2] xx[2] inv-X_10
Xinv@16 in[3] xx[3] inv-X_10
Xinv@17 in[4] xx[4] inv-X_10
Xinv@18 in[5] xx[5] inv-X_10
Xinv@19 in[6] xx[6] inv-X_10
Xinv@20 in[7] xx[7] inv-X_10
Xinv@21 in[8] xx[8] inv-X_10
Xinv@22 in[9] xx[9] inv-X_10
Xinv@23 in[10] xx[10] inv-X_10
Xinv@24 in[11] xx[11] inv-X_10
Xinv@25 in[12] xx[12] inv-X_10
Xlat[1] c[F] c[T] xx[1] out[1] mlat1in5i
Xlat[2] c[F] c[T] xx[2] out[2] mlat1in5i
Xlat[3] c[F] c[T] xx[3] out[3] mlat1in5i
Xlat[4] c[F] c[T] xx[4] out[4] mlat1in5i
Xlat[5] c[F] c[T] xx[5] out[5] mlat1in5i
Xlat[6] c[F] c[T] xx[6] out[6] mlat1in5i
Xlat[7] c[F] c[T] xx[7] out[7] mlat1in5i
Xlat[8] c[F] c[T] xx[8] out[8] mlat1in5i
Xlat[9] c[F] c[T] xx[9] out[9] mlat1in5i
Xlat[10] c[F] c[T] xx[10] out[10] mlat1in5i
Xlat[11] c[F] c[T] xx[11] out[11] mlat1in5i
Xlat[12] c[F] c[T] xx[12] out[12] mlat1in5i
Xlat[13] c[F] c[T] in[13] out[13] mlat1in5i
Xlat[14] c[F] c[T] in[14] out[14] mlat1in5i
Xlat[15] c[F] c[T] in[15] out[15] mlat1in5i
Xlat[16] c[F] c[T] in[16] out[16] mlat1in5i
Xlat[17] c[F] c[T] in[17] out[17] mlat1in5i
Xlat[18] c[F] c[T] in[18] out[18] mlat1in5i
.ENDS skipReg18

*** CELL: redFour:invLT{sch}
.SUBCKT invLT-X_30 in out
XNMOS@0 out in gnd NMOSx-X_60
XPMOS@0 out in vdd PMOSx-X_30
.ENDS invLT-X_30

*** CELL: driversL:sucDri20cond{sch}
.SUBCKT sucDri20cond cond in succ
XNMOSx@0 succ in net@160 NMOSx-X_5
XNMOSx@1 succ cond net@160 NMOSx-X_5
XNMOSx@2 net@160 net@158 gnd NMOSx-X_10
Xinv@1 succ net@94 inv-X_5
Xpms2@0 succ cond in pms2-X_20
Xwire90@0 net@158 net@94 wire90-124_7-layer_1-width_3
.ENDS sucDri20cond

*** CELL: skipL:timeDrive20{sch}
.SUBCKT timeDrive20 inA inB out
XNMOSx@0 out inB inA NMOSx-X_20
XPMOSx@0 out inB vdd PMOSx-X_10
.ENDS timeDrive20

*** CELL: skipL:timeDrive40{sch}
.SUBCKT timeDrive40 inA inB out
XNMOSx@0 out inB inA NMOSx-X_40
XPMOSx@0 out inB vdd PMOSx-X_30
.ENDS timeDrive40

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-287_2-R_34_667m a b
Ccap@0 gnd net@14 1.053f
Ccap@1 gnd net@8 1.053f
Ccap@2 gnd net@11 1.053f
Rres@0 net@14 a 1.659
Rres@1 net@11 net@14 3.319
Rres@2 b net@8 1.659
Rres@3 net@8 net@11 3.319
.ENDS wire-C_0_011f-287_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-287_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-287_2-R_34_667m
.ENDS wire90-287_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-284_2-R_34_667m a b
Ccap@0 gnd net@14 1.042f
Ccap@1 gnd net@8 1.042f
Ccap@2 gnd net@11 1.042f
Rres@0 net@14 a 1.642
Rres@1 net@11 net@14 3.284
Rres@2 b net@8 1.642
Rres@3 net@8 net@11 3.284
.ENDS wire-C_0_011f-284_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-284_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-284_2-R_34_667m
.ENDS wire90-284_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-391_7-R_34_667m a b
Ccap@0 gnd net@14 1.436f
Ccap@1 gnd net@8 1.436f
Ccap@2 gnd net@11 1.436f
Rres@0 net@14 a 2.263
Rres@1 net@11 net@14 4.526
Rres@2 b net@8 2.263
Rres@3 net@8 net@11 4.526
.ENDS wire-C_0_011f-391_7-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-391_7-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-391_7-R_34_667m
.ENDS wire90-391_7-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-296_2-R_34_667m a b
Ccap@0 gnd net@14 1.086f
Ccap@1 gnd net@8 1.086f
Ccap@2 gnd net@11 1.086f
Rres@0 net@14 a 1.711
Rres@1 net@11 net@14 3.423
Rres@2 b net@8 1.711
Rres@3 net@8 net@11 3.423
.ENDS wire-C_0_011f-296_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-296_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-296_2-R_34_667m
.ENDS wire90-296_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-463_3-R_34_667m a b
Ccap@0 gnd net@14 1.699f
Ccap@1 gnd net@8 1.699f
Ccap@2 gnd net@11 1.699f
Rres@0 net@14 a 2.677
Rres@1 net@11 net@14 5.354
Rres@2 b net@8 2.677
Rres@3 net@8 net@11 5.354
.ENDS wire-C_0_011f-463_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-463_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-463_3-R_34_667m
.ENDS wire90-463_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-181-R_34_667m a b
Ccap@0 gnd net@14 0.664f
Ccap@1 gnd net@8 0.664f
Ccap@2 gnd net@11 0.664f
Rres@0 net@14 a 1.046
Rres@1 net@11 net@14 2.092
Rres@2 b net@8 1.046
Rres@3 net@8 net@11 2.092
.ENDS wire-C_0_011f-181-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-181-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-181-R_34_667m
.ENDS wire90-181-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-184-R_34_667m a b
Ccap@0 gnd net@14 0.675f
Ccap@1 gnd net@8 0.675f
Ccap@2 gnd net@11 0.675f
Rres@0 net@14 a 1.063
Rres@1 net@11 net@14 2.126
Rres@2 b net@8 1.063
Rres@3 net@8 net@11 2.126
.ENDS wire-C_0_011f-184-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-184-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-184-R_34_667m
.ENDS wire90-184-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-439_3-R_34_667m a b
Ccap@0 gnd net@14 1.611f
Ccap@1 gnd net@8 1.611f
Ccap@2 gnd net@11 1.611f
Rres@0 net@14 a 2.538
Rres@1 net@11 net@14 5.076
Rres@2 b net@8 2.538
Rres@3 net@8 net@11 5.076
.ENDS wire-C_0_011f-439_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-439_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-439_3-R_34_667m
.ENDS wire90-439_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-191-R_34_667m a b
Ccap@0 gnd net@14 0.7f
Ccap@1 gnd net@8 0.7f
Ccap@2 gnd net@11 0.7f
Rres@0 net@14 a 1.104
Rres@1 net@11 net@14 2.207
Rres@2 b net@8 1.104
Rres@3 net@8 net@11 2.207
.ENDS wire-C_0_011f-191-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-191-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-191-R_34_667m
.ENDS wire90-191-layer_1-width_3

*** CELL: skipL:skipTimer{sch}
.SUBCKT skipTimer do[L] do[M] doit fire[ODE] ilc[load][F] loadFlags[F] 
+olc[dec][1] olc[dec][2] olc[dec][F] olc[load][1] olc[load][2] olc[load][F] 
+selLO[Co] selLO[Dl] selLO[Dm] selLO[Lf] selLO[Li] selLO[Lo]
Xinv@1 fire[ODE] net@68 inv-X_20
Xinv@2 net@249 olc[dec][1] inv-X_10
Xinv@4 net@252 olc[dec][2] inv-X_10
Xinv@5 net@261 olc[load][1] inv-X_10
Xinv@6 olc[load][F] olc[load][2] inv-X_10
XinvLT@0 doit net@304 invLT-X_30
Xnor2n@5 selLO[Lf] fire[ODE] net@18 nor2n-X_10
Xnor2n@7 selLO[Co] fire[ODE] net@0 nor2n-X_10
Xnor2n@9 selLO[Li] fire[ODE] net@165 nor2n-X_10
Xnor2n@10 selLO[Co] fire[ODE] net@206 nor2n-X_10
Xnor2n@12 selLO[Lo] fire[ODE] net@256 nor2n-X_10
XsucDri20@0 selLO[Dl] net@334 do[L] sucDri20cond
XsucDri20@1 selLO[Dm] net@334 do[M] sucDri20cond
XtimeDriv@1 net@133 net@144 loadFlags[F] timeDrive20
XtimeDriv@3 net@133 net@255 olc[load][F] timeDrive20
XtimeDriv@4 net@133 net@164 ilc[load][F] timeDrive20
XtimeDriv@5 net@133 net@147 net@331 timeDrive40
XtimeDriv@8 net@133 net@207 net@248 timeDrive20
XtimeDriv@9 net@133 net@145 olc[dec][F] timeDrive20
XtimeDriv@10 net@133 net@207 net@247 timeDrive20
XtimeDriv@11 net@133 net@255 net@263 timeDrive20
Xwire90@0 net@18 net@144 wire90-287_2-layer_1-width_3
Xwire90@1 net@0 net@145 wire90-284_2-layer_1-width_3
Xwire90@3 net@68 net@147 wire90-391_7-layer_1-width_3
Xwire90@4 net@304 net@133 wire90-1092_8-layer_1-width_3
Xwire90@5 net@165 net@164 wire90-296_2-layer_1-width_3
Xwire90@6 net@206 net@207 wire90-463_3-layer_1-width_3
Xwire90@8 net@248 net@249 wire90-181-layer_1-width_3
Xwire90@9 net@247 net@252 wire90-184-layer_1-width_3
Xwire90@10 net@256 net@255 wire90-439_3-layer_1-width_3
Xwire90@11 net@263 net@261 wire90-191-layer_1-width_3
Xwire90@12 net@331 net@334 wire90-391_7-layer_1-width_3
.ENDS skipTimer

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-657_5-R_34_667m a b
Ccap@0 gnd net@14 2.411f
Ccap@1 gnd net@8 2.411f
Ccap@2 gnd net@11 2.411f
Rres@0 net@14 a 3.799
Rres@1 net@11 net@14 7.598
Rres@2 b net@8 3.799
Rres@3 net@8 net@11 7.598
.ENDS wire-C_0_011f-657_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-657_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-657_5-R_34_667m
.ENDS wire90-657_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-439_9-R_34_667m a b
Ccap@0 gnd net@14 1.613f
Ccap@1 gnd net@8 1.613f
Ccap@2 gnd net@11 1.613f
Rres@0 net@14 a 2.542
Rres@1 net@11 net@14 5.083
Rres@2 b net@8 2.542
Rres@3 net@8 net@11 5.083
.ENDS wire-C_0_011f-439_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-439_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-439_9-R_34_667m
.ENDS wire90-439_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1282_5-R_34_667m a b
Ccap@0 gnd net@14 4.703f
Ccap@1 gnd net@8 4.703f
Ccap@2 gnd net@11 4.703f
Rres@0 net@14 a 7.41
Rres@1 net@11 net@14 14.82
Rres@2 b net@8 7.41
Rres@3 net@8 net@11 14.82
.ENDS wire-C_0_011f-1282_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1282_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1282_5-R_34_667m
.ENDS wire90-1282_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3646_5-R_34_667m a b
Ccap@0 gnd net@14 13.371f
Ccap@1 gnd net@8 13.371f
Ccap@2 gnd net@11 13.371f
Rres@0 net@14 a 21.069
Rres@1 net@11 net@14 42.137
Rres@2 b net@8 21.069
Rres@3 net@8 net@11 42.137
.ENDS wire-C_0_011f-3646_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3646_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-3646_5-R_34_667m
.ENDS wire90-3646_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2967_8-R_34_667m a b
Ccap@0 gnd net@14 10.882f
Ccap@1 gnd net@8 10.882f
Ccap@2 gnd net@11 10.882f
Rres@0 net@14 a 17.147
Rres@1 net@11 net@14 34.295
Rres@2 b net@8 17.147
Rres@3 net@8 net@11 34.295
.ENDS wire-C_0_011f-2967_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2967_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2967_8-R_34_667m
.ENDS wire90-2967_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1704_4-R_34_667m a b
Ccap@0 gnd net@14 6.249f
Ccap@1 gnd net@8 6.249f
Ccap@2 gnd net@11 6.249f
Rres@0 net@14 a 9.848
Rres@1 net@11 net@14 19.695
Rres@2 b net@8 9.848
Rres@3 net@8 net@11 19.695
.ENDS wire-C_0_011f-1704_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1704_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1704_4-R_34_667m
.ENDS wire90-1704_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-649-R_34_667m a b
Ccap@0 gnd net@14 2.38f
Ccap@1 gnd net@8 2.38f
Ccap@2 gnd net@11 2.38f
Rres@0 net@14 a 3.75
Rres@1 net@11 net@14 7.5
Rres@2 b net@8 3.75
Rres@3 net@8 net@11 7.5
.ENDS wire-C_0_011f-649-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-649-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-649-R_34_667m
.ENDS wire90-649-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-306-R_34_667m a b
Ccap@0 gnd net@14 1.122f
Ccap@1 gnd net@8 1.122f
Ccap@2 gnd net@11 1.122f
Rres@0 net@14 a 1.768
Rres@1 net@11 net@14 3.536
Rres@2 b net@8 1.768
Rres@3 net@8 net@11 3.536
.ENDS wire-C_0_011f-306-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-306-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-306-R_34_667m
.ENDS wire90-306-layer_1-width_3

*** CELL: skipL:skipAll{sch}
.SUBCKT skipAll doLO[7] do[L] do[M] fire[ODE] fire[m1] fire[m2] flag[A] 
+flag[B] flag[C] ilc[load][F] inLO[7] in[10] in[11] in[12] in[13] in[14] 
+in[15] in[16] in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] 
+in[9] in[C] kill loadC[T] mc olcNZ olc[dec][1] olc[dec][2] olc[load][1] 
+olc[load][2] selLO[Co] selLO[Dl] selLO[Dm] selLO[Lf] selLO[Li] selLO[Lo]
Xarray@0 net@331 flag[A] flag[B] flag[C] flag[NZ] in[1][F] in[1][T] in[2][F] 
+in[2][T] in[3][F] in[3][T] in[4][F] in[4][T] in[5][F] in[5][T] in[6][F] 
+in[6][T] in[7][F] in[7][T] in[8][F] in[8][T] in[9][F] in[9][T] in[C] loadC[T] 
+loadFlags[F] m1[F] m1[T] mc array
Xinv@0 m1[F] net@179 inv-X_20
Xinv@1 fire[m2] net@302 inv-X_80
Xinv@2 m2[F] net@304 inv-X_40
Xinv@3 fire[m1] net@308 inv-X_30
XproposeZ@1 doLO[7] net@177 inLO[7] kill mc olcNZ olc[dec][F] olc[load][F] 
+proposeZero
XskipReg1@0 m2[F] m2[T] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
+in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] in[5][F] 
+in[6][T] in[6][F] in[7][T] in[7][F] in[8][T] in[8][F] in[9][T] in[9][F] 
+in[1][T] in[1][F] in[2][T] in[2][F] in[3][T] in[3][F] in[4][T] in[4][F] 
+in[5][T] skipReg18
XskipTime@4 do[L] do[M] doIt fire[ODE] ilc[load][F] loadFlags[F] olc[dec][1] 
+olc[dec][2] olc[dec][F] olc[load][1] olc[load][2] olc[load][F] selLO[Co] 
+selLO[Dl] selLO[Dm] selLO[Lf] selLO[Li] selLO[Lo] skipTimer
Xwire90@3 net@177 flag[NZ] wire90-657_5-layer_1-width_3
Xwire90@5 net@331 doIt wire90-439_9-layer_1-width_3
Xwire90@13 m1[T] net@179 wire90-1282_5-layer_1-width_3
Xwire90@14 m2[F] net@302 wire90-3646_5-layer_1-width_3
Xwire90@15 m2[T] net@304 wire90-2967_8-layer_1-width_3
Xwire90@16 m1[F] net@308 wire90-1704_4-layer_1-width_3
Xwire90@17 olc[load][F] wire90@17_b wire90-649-layer_1-width_3
Xwire90@18 olc[dec][F] wire90@18_b wire90-306-layer_1-width_3
.ENDS skipAll

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-654_3-R_34_667m a b
Ccap@0 gnd net@14 2.399f
Ccap@1 gnd net@8 2.399f
Ccap@2 gnd net@11 2.399f
Rres@0 net@14 a 3.78
Rres@1 net@11 net@14 7.561
Rres@2 b net@8 3.78
Rres@3 net@8 net@11 7.561
.ENDS wire-C_0_011f-654_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-654_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-654_3-R_34_667m
.ENDS wire90-654_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-338_3-R_34_667m a b
Ccap@0 gnd net@14 1.24f
Ccap@1 gnd net@8 1.24f
Ccap@2 gnd net@11 1.24f
Rres@0 net@14 a 1.955
Rres@1 net@11 net@14 3.909
Rres@2 b net@8 1.955
Rres@3 net@8 net@11 3.909
.ENDS wire-C_0_011f-338_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-338_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-338_3-R_34_667m
.ENDS wire90-338_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-467_4-R_34_667m a b
Ccap@0 gnd net@14 1.714f
Ccap@1 gnd net@8 1.714f
Ccap@2 gnd net@11 1.714f
Rres@0 net@14 a 2.701
Rres@1 net@11 net@14 5.401
Rres@2 b net@8 2.701
Rres@3 net@8 net@11 5.401
.ENDS wire-C_0_011f-467_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-467_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-467_4-R_34_667m
.ENDS wire90-467_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-466_9-R_34_667m a b
Ccap@0 gnd net@14 1.712f
Ccap@1 gnd net@8 1.712f
Ccap@2 gnd net@11 1.712f
Rres@0 net@14 a 2.698
Rres@1 net@11 net@14 5.395
Rres@2 b net@8 2.698
Rres@3 net@8 net@11 5.395
.ENDS wire-C_0_011f-466_9-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-466_9-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-466_9-R_34_667m
.ENDS wire90-466_9-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2321_3-R_34_667m a b
Ccap@0 gnd net@14 8.511f
Ccap@1 gnd net@8 8.511f
Ccap@2 gnd net@11 8.511f
Rres@0 net@14 a 13.412
Rres@1 net@11 net@14 26.824
Rres@2 b net@8 13.412
Rres@3 net@8 net@11 26.824
.ENDS wire-C_0_011f-2321_3-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2321_3-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2321_3-R_34_667m
.ENDS wire90-2321_3-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2286_4-R_34_667m a b
Ccap@0 gnd net@14 8.383f
Ccap@1 gnd net@8 8.383f
Ccap@2 gnd net@11 8.383f
Rres@0 net@14 a 13.21
Rres@1 net@11 net@14 26.421
Rres@2 b net@8 13.21
Rres@3 net@8 net@11 26.421
.ENDS wire-C_0_011f-2286_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2286_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2286_4-R_34_667m
.ENDS wire90-2286_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2339_2-R_34_667m a b
Ccap@0 gnd net@14 8.577f
Ccap@1 gnd net@8 8.577f
Ccap@2 gnd net@11 8.577f
Rres@0 net@14 a 13.515
Rres@1 net@11 net@14 27.031
Rres@2 b net@8 13.515
Rres@3 net@8 net@11 27.031
.ENDS wire-C_0_011f-2339_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2339_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2339_2-R_34_667m
.ENDS wire90-2339_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2336_8-R_34_667m a b
Ccap@0 gnd net@14 8.568f
Ccap@1 gnd net@8 8.568f
Ccap@2 gnd net@11 8.568f
Rres@0 net@14 a 13.502
Rres@1 net@11 net@14 27.003
Rres@2 b net@8 13.502
Rres@3 net@8 net@11 27.003
.ENDS wire-C_0_011f-2336_8-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2336_8-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2336_8-R_34_667m
.ENDS wire90-2336_8-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2277-R_34_667m a b
Ccap@0 gnd net@14 8.349f
Ccap@1 gnd net@8 8.349f
Ccap@2 gnd net@11 8.349f
Rres@0 net@14 a 13.156
Rres@1 net@11 net@14 26.312
Rres@2 b net@8 13.156
Rres@3 net@8 net@11 26.312
.ENDS wire-C_0_011f-2277-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2277-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2277-R_34_667m
.ENDS wire90-2277-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2338_5-R_34_667m a b
Ccap@0 gnd net@14 8.574f
Ccap@1 gnd net@8 8.574f
Ccap@2 gnd net@11 8.574f
Rres@0 net@14 a 13.511
Rres@1 net@11 net@14 27.023
Rres@2 b net@8 13.511
Rres@3 net@8 net@11 27.023
.ENDS wire-C_0_011f-2338_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2338_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2338_5-R_34_667m
.ENDS wire90-2338_5-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1105_2-R_34_667m a b
Ccap@0 gnd net@14 4.052f
Ccap@1 gnd net@8 4.052f
Ccap@2 gnd net@11 4.052f
Rres@0 net@14 a 6.386
Rres@1 net@11 net@14 12.771
Rres@2 b net@8 6.386
Rres@3 net@8 net@11 12.771
.ENDS wire-C_0_011f-1105_2-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1105_2-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1105_2-R_34_667m
.ENDS wire90-1105_2-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2165_4-R_34_667m a b
Ccap@0 gnd net@14 7.94f
Ccap@1 gnd net@8 7.94f
Ccap@2 gnd net@11 7.94f
Rres@0 net@14 a 12.511
Rres@1 net@11 net@14 25.022
Rres@2 b net@8 12.511
Rres@3 net@8 net@11 25.022
.ENDS wire-C_0_011f-2165_4-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2165_4-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-2165_4-R_34_667m
.ENDS wire90-2165_4-layer_1-width_3

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1272_5-R_34_667m a b
Ccap@0 gnd net@14 4.666f
Ccap@1 gnd net@8 4.666f
Ccap@2 gnd net@11 4.666f
Rres@0 net@14 a 7.352
Rres@1 net@11 net@14 14.704
Rres@2 b net@8 7.352
Rres@3 net@8 net@11 14.704
.ENDS wire-C_0_011f-1272_5-R_34_667m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1272_5-layer_1-width_3 a b
Xwire@0 a b wire-C_0_011f-1272_5-R_34_667m
.ENDS wire90-1272_5-layer_1-width_3

*** CELL: dockPartOD:skipCount{sch}
.SUBCKT skipCount clS[F] clS[T] cl[F] cl[T] do[L] do[M] fire[ODE] fire[m1] 
+fire[m2] ilc[cnt] ilc[done] inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inB[1] 
+inB[2] inB[3] inB[4] inB[5] inB[6] inB[8] in[10] in[11] in[12] in[13] in[14] 
+in[15] in[16] in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] 
+in[9] in[C] kill loadC[T] mc olcNZ rd[F] rd[T] selLO[Co] selLO[Dl] selLO[Dm] 
+selLO[Lf] selLO[Li] selLO[Lo] sel[A] sin sout
Xilc@0 net@129[6] net@129[5] net@129[4] net@129[3] net@129[2] net@129[1] 
+net@129[0] ilc[cnt] ilc[done] ilc[load] inLO[1] inLO[2] inLO[3] inLO[4] 
+inLO[5] inLO[6] inLO[7] inLO[8] kill mc ilc
XinMux@0 inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inB[1] inB[2] inB[3] 
+inB[4] inB[5] inB[6] inB[8] inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] 
+inLO[7] inLO[8] sel[A] inMux
Xolc@0 net@130[5] net@130[4] net@130[3] net@130[2] net@130[1] net@130[0] 
+net@10 inLO[1] inLO[2] inLO[3] inLO[4] inLO[5] inLO[6] olc[dec][1] 
+olc[dec][2] olc[load][1] olc[load][2] olc
XscanKx3@0 clS[F] clS[T] cl[F] cl[T] flag[C] flag[B] flag[A] mc rd[F] rd[T] 
+net@104 sout scanKx3
XscanKx6@0 clS[F] clS[T] cl[F] cl[T] net@130[5] net@130[4] net@130[3] 
+net@130[2] net@130[1] net@130[0] mc rd[F] rd[T] net@103 net@104 scanKx6
XscanKx7@0 clS[F] clS[T] cl[F] cl[T] net@129[6] net@129[5] net@129[4] 
+net@129[3] net@129[2] net@129[1] net@129[0] mc rd[F] rd[T] sin net@103 
+scanKx7
XskipAll@0 doLO[7] do[L] do[M] fire[ODE] fire[m1] fire[m2] flag[A] flag[B] 
+flag[C] net@99 inLO[7] in[10] in[11] in[12] in[13] in[14] in[15] in[16] 
+in[17] in[18] in[1] in[2] in[3] in[4] in[5] in[6] in[7] in[8] in[9] in[C] 
+kill loadC[T] mc olcNZ olc[dec][1] olc[dec][2] olc[load][1] olc[load][2] 
+selLO[Co] selLO[Dl] selLO[Dm] selLO[Lf] selLO[Li] selLO[Lo] skipAll
Xwire90@0 net@10 doLO[7] wire90-654_3-layer_1-width_3
Xwire90@1 wire90@1_a olc[dec][1] wire90-338_3-layer_1-width_3
Xwire90@2 wire90@2_a olc[load][1] wire90-467_4-layer_1-width_3
Xwire90@3 wire90@3_a olc[load][2] wire90-466_9-layer_1-width_3
Xwire90@4 wire90@4_a olc[dec][2] wire90-338_3-layer_1-width_3
Xwire90@5 wire90@5_a inLO[1] wire90-2321_3-layer_1-width_3
Xwire90@6 wire90@6_a inLO[2] wire90-2286_4-layer_1-width_3
Xwire90@7 wire90@7_a inLO[3] wire90-2339_2-layer_1-width_3
Xwire90@8 wire90@8_a inLO[4] wire90-2336_8-layer_1-width_3
Xwire90@9 wire90@9_a inLO[5] wire90-2277-layer_1-width_3
Xwire90@10 wire90@10_a inLO[6] wire90-2338_5-layer_1-width_3
Xwire90@11 wire90@11_a inLO[8] wire90-1105_2-layer_1-width_3
Xwire90@12 wire90@12_a inLO[7] wire90-2165_4-layer_1-width_3
Xwire90@13 ilc[load] net@99 wire90-1272_5-layer_1-width_3
.ENDS skipCount

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2416_4-R_26m a b
Ccap@0 gnd net@14 8.86f
Ccap@1 gnd net@8 8.86f
Ccap@2 gnd net@11 8.86f
Rres@0 net@14 a 10.471
Rres@1 net@11 net@14 20.942
Rres@2 b net@8 10.471
Rres@3 net@8 net@11 20.942
.ENDS wire-C_0_011f-2416_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2416_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2416_4-R_26m
.ENDS wire90-2416_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2384_4-R_26m a b
Ccap@0 gnd net@14 8.743f
Ccap@1 gnd net@8 8.743f
Ccap@2 gnd net@11 8.743f
Rres@0 net@14 a 10.332
Rres@1 net@11 net@14 20.665
Rres@2 b net@8 10.332
Rres@3 net@8 net@11 20.665
.ENDS wire-C_0_011f-2384_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2384_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2384_4-R_26m
.ENDS wire90-2384_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2330_4-R_26m a b
Ccap@0 gnd net@14 8.545f
Ccap@1 gnd net@8 8.545f
Ccap@2 gnd net@11 8.545f
Rres@0 net@14 a 10.098
Rres@1 net@11 net@14 20.197
Rres@2 b net@8 10.098
Rres@3 net@8 net@11 20.197
.ENDS wire-C_0_011f-2330_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2330_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2330_4-R_26m
.ENDS wire90-2330_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2135_9-R_26m a b
Ccap@0 gnd net@14 7.832f
Ccap@1 gnd net@8 7.832f
Ccap@2 gnd net@11 7.832f
Rres@0 net@14 a 9.256
Rres@1 net@11 net@14 18.511
Rres@2 b net@8 9.256
Rres@3 net@8 net@11 18.511
.ENDS wire-C_0_011f-2135_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2135_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2135_9-R_26m
.ENDS wire90-2135_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1987_4-R_26m a b
Ccap@0 gnd net@14 7.287f
Ccap@1 gnd net@8 7.287f
Ccap@2 gnd net@11 7.287f
Rres@0 net@14 a 8.612
Rres@1 net@11 net@14 17.224
Rres@2 b net@8 8.612
Rres@3 net@8 net@11 17.224
.ENDS wire-C_0_011f-1987_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1987_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1987_4-R_26m
.ENDS wire90-1987_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1996_4-R_26m a b
Ccap@0 gnd net@14 7.32f
Ccap@1 gnd net@8 7.32f
Ccap@2 gnd net@11 7.32f
Rres@0 net@14 a 8.651
Rres@1 net@11 net@14 17.302
Rres@2 b net@8 8.651
Rres@3 net@8 net@11 17.302
.ENDS wire-C_0_011f-1996_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1996_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1996_4-R_26m
.ENDS wire90-1996_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1636_3-R_26m a b
Ccap@0 gnd net@14 6f
Ccap@1 gnd net@8 6f
Ccap@2 gnd net@11 6f
Rres@0 net@14 a 7.091
Rres@1 net@11 net@14 14.181
Rres@2 b net@8 7.091
Rres@3 net@8 net@11 14.181
.ENDS wire-C_0_011f-1636_3-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1636_3-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1636_3-R_26m
.ENDS wire90-1636_3-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1776_4-R_26m a b
Ccap@0 gnd net@14 6.513f
Ccap@1 gnd net@8 6.513f
Ccap@2 gnd net@11 6.513f
Rres@0 net@14 a 7.698
Rres@1 net@11 net@14 15.395
Rres@2 b net@8 7.698
Rres@3 net@8 net@11 15.395
.ENDS wire-C_0_011f-1776_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1776_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1776_4-R_26m
.ENDS wire90-1776_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1870_9-R_26m a b
Ccap@0 gnd net@14 6.86f
Ccap@1 gnd net@8 6.86f
Ccap@2 gnd net@11 6.86f
Rres@0 net@14 a 8.107
Rres@1 net@11 net@14 16.214
Rres@2 b net@8 8.107
Rres@3 net@8 net@11 16.214
.ENDS wire-C_0_011f-1870_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1870_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1870_9-R_26m
.ENDS wire90-1870_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1565_5-R_26m a b
Ccap@0 gnd net@14 5.74f
Ccap@1 gnd net@8 5.74f
Ccap@2 gnd net@11 5.74f
Rres@0 net@14 a 6.784
Rres@1 net@11 net@14 13.568
Rres@2 b net@8 6.784
Rres@3 net@8 net@11 13.568
.ENDS wire-C_0_011f-1565_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1565_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1565_5-R_26m
.ENDS wire90-1565_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1506-R_26m a b
Ccap@0 gnd net@14 5.522f
Ccap@1 gnd net@8 5.522f
Ccap@2 gnd net@11 5.522f
Rres@0 net@14 a 6.526
Rres@1 net@11 net@14 13.052
Rres@2 b net@8 6.526
Rres@3 net@8 net@11 13.052
.ENDS wire-C_0_011f-1506-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1506-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1506-R_26m
.ENDS wire90-1506-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1605_5-R_26m a b
Ccap@0 gnd net@14 5.887f
Ccap@1 gnd net@8 5.887f
Ccap@2 gnd net@11 5.887f
Rres@0 net@14 a 6.957
Rres@1 net@11 net@14 13.914
Rres@2 b net@8 6.957
Rres@3 net@8 net@11 13.914
.ENDS wire-C_0_011f-1605_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1605_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1605_5-R_26m
.ENDS wire90-1605_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1227_3-R_26m a b
Ccap@0 gnd net@14 4.5f
Ccap@1 gnd net@8 4.5f
Ccap@2 gnd net@11 4.5f
Rres@0 net@14 a 5.318
Rres@1 net@11 net@14 10.637
Rres@2 b net@8 5.318
Rres@3 net@8 net@11 10.637
.ENDS wire-C_0_011f-1227_3-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1227_3-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1227_3-R_26m
.ENDS wire90-1227_3-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1254_9-R_26m a b
Ccap@0 gnd net@14 4.601f
Ccap@1 gnd net@8 4.601f
Ccap@2 gnd net@11 4.601f
Rres@0 net@14 a 5.438
Rres@1 net@11 net@14 10.876
Rres@2 b net@8 5.438
Rres@3 net@8 net@11 10.876
.ENDS wire-C_0_011f-1254_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1254_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1254_9-R_26m
.ENDS wire90-1254_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1280_2-R_26m a b
Ccap@0 gnd net@14 4.694f
Ccap@1 gnd net@8 4.694f
Ccap@2 gnd net@11 4.694f
Rres@0 net@14 a 5.548
Rres@1 net@11 net@14 11.095
Rres@2 b net@8 5.548
Rres@3 net@8 net@11 11.095
.ENDS wire-C_0_011f-1280_2-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1280_2-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1280_2-R_26m
.ENDS wire90-1280_2-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1012_7-R_26m a b
Ccap@0 gnd net@14 3.713f
Ccap@1 gnd net@8 3.713f
Ccap@2 gnd net@11 3.713f
Rres@0 net@14 a 4.388
Rres@1 net@11 net@14 8.777
Rres@2 b net@8 4.388
Rres@3 net@8 net@11 8.777
.ENDS wire-C_0_011f-1012_7-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1012_7-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1012_7-R_26m
.ENDS wire90-1012_7-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-960_9-R_26m a b
Ccap@0 gnd net@14 3.523f
Ccap@1 gnd net@8 3.523f
Ccap@2 gnd net@11 3.523f
Rres@0 net@14 a 4.164
Rres@1 net@11 net@14 8.328
Rres@2 b net@8 4.164
Rres@3 net@8 net@11 8.328
.ENDS wire-C_0_011f-960_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-960_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-960_9-R_26m
.ENDS wire90-960_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-904_3-R_26m a b
Ccap@0 gnd net@14 3.316f
Ccap@1 gnd net@8 3.316f
Ccap@2 gnd net@11 3.316f
Rres@0 net@14 a 3.919
Rres@1 net@11 net@14 7.837
Rres@2 b net@8 3.919
Rres@3 net@8 net@11 7.837
.ENDS wire-C_0_011f-904_3-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-904_3-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-904_3-R_26m
.ENDS wire90-904_3-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4579_4-R_26m a b
Ccap@0 gnd net@14 16.791f
Ccap@1 gnd net@8 16.791f
Ccap@2 gnd net@11 16.791f
Rres@0 net@14 a 19.844
Rres@1 net@11 net@14 39.688
Rres@2 b net@8 19.844
Rres@3 net@8 net@11 39.688
.ENDS wire-C_0_011f-4579_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4579_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4579_4-R_26m
.ENDS wire90-4579_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4580_9-R_26m a b
Ccap@0 gnd net@14 16.797f
Ccap@1 gnd net@8 16.797f
Ccap@2 gnd net@11 16.797f
Rres@0 net@14 a 19.851
Rres@1 net@11 net@14 39.701
Rres@2 b net@8 19.851
Rres@3 net@8 net@11 39.701
.ENDS wire-C_0_011f-4580_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4580_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4580_9-R_26m
.ENDS wire90-4580_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4864_4-R_26m a b
Ccap@0 gnd net@14 17.836f
Ccap@1 gnd net@8 17.836f
Ccap@2 gnd net@11 17.836f
Rres@0 net@14 a 21.079
Rres@1 net@11 net@14 42.158
Rres@2 b net@8 21.079
Rres@3 net@8 net@11 42.158
.ENDS wire-C_0_011f-4864_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4864_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4864_4-R_26m
.ENDS wire90-4864_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4970_4-R_26m a b
Ccap@0 gnd net@14 18.225f
Ccap@1 gnd net@8 18.225f
Ccap@2 gnd net@11 18.225f
Rres@0 net@14 a 21.538
Rres@1 net@11 net@14 43.077
Rres@2 b net@8 21.538
Rres@3 net@8 net@11 43.077
.ENDS wire-C_0_011f-4970_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4970_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4970_4-R_26m
.ENDS wire90-4970_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-5067_4-R_26m a b
Ccap@0 gnd net@14 18.58f
Ccap@1 gnd net@8 18.58f
Ccap@2 gnd net@11 18.58f
Rres@0 net@14 a 21.959
Rres@1 net@11 net@14 43.917
Rres@2 b net@8 21.959
Rres@3 net@8 net@11 43.917
.ENDS wire-C_0_011f-5067_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-5067_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-5067_4-R_26m
.ENDS wire90-5067_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-5238_9-R_26m a b
Ccap@0 gnd net@14 19.209f
Ccap@1 gnd net@8 19.209f
Ccap@2 gnd net@11 19.209f
Rres@0 net@14 a 22.702
Rres@1 net@11 net@14 45.404
Rres@2 b net@8 22.702
Rres@3 net@8 net@11 45.404
.ENDS wire-C_0_011f-5238_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-5238_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-5238_9-R_26m
.ENDS wire90-5238_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-5485_4-R_26m a b
Ccap@0 gnd net@14 20.113f
Ccap@1 gnd net@8 20.113f
Ccap@2 gnd net@11 20.113f
Rres@0 net@14 a 23.77
Rres@1 net@11 net@14 47.54
Rres@2 b net@8 23.77
Rres@3 net@8 net@11 47.54
.ENDS wire-C_0_011f-5485_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-5485_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-5485_4-R_26m
.ENDS wire90-5485_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3582_8-R_26m a b
Ccap@0 gnd net@14 13.137f
Ccap@1 gnd net@8 13.137f
Ccap@2 gnd net@11 13.137f
Rres@0 net@14 a 15.525
Rres@1 net@11 net@14 31.051
Rres@2 b net@8 15.525
Rres@3 net@8 net@11 31.051
.ENDS wire-C_0_011f-3582_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3582_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-3582_8-R_26m
.ENDS wire90-3582_8-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4216_8-R_26m a b
Ccap@0 gnd net@14 15.462f
Ccap@1 gnd net@8 15.462f
Ccap@2 gnd net@11 15.462f
Rres@0 net@14 a 18.273
Rres@1 net@11 net@14 36.546
Rres@2 b net@8 18.273
Rres@3 net@8 net@11 36.546
.ENDS wire-C_0_011f-4216_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4216_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4216_8-R_26m
.ENDS wire90-4216_8-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4217_8-R_26m a b
Ccap@0 gnd net@14 15.465f
Ccap@1 gnd net@8 15.465f
Ccap@2 gnd net@11 15.465f
Rres@0 net@14 a 18.277
Rres@1 net@11 net@14 36.554
Rres@2 b net@8 18.277
Rres@3 net@8 net@11 36.554
.ENDS wire-C_0_011f-4217_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4217_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4217_8-R_26m
.ENDS wire90-4217_8-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4580_7-R_26m a b
Ccap@0 gnd net@14 16.796f
Ccap@1 gnd net@8 16.796f
Ccap@2 gnd net@11 16.796f
Rres@0 net@14 a 19.85
Rres@1 net@11 net@14 39.699
Rres@2 b net@8 19.85
Rres@3 net@8 net@11 39.699
.ENDS wire-C_0_011f-4580_7-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4580_7-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4580_7-R_26m
.ENDS wire90-4580_7-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4914_8-R_26m a b
Ccap@0 gnd net@14 18.021f
Ccap@1 gnd net@8 18.021f
Ccap@2 gnd net@11 18.021f
Rres@0 net@14 a 21.297
Rres@1 net@11 net@14 42.595
Rres@2 b net@8 21.297
Rres@3 net@8 net@11 42.595
.ENDS wire-C_0_011f-4914_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4914_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4914_8-R_26m
.ENDS wire90-4914_8-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-5109_1-R_26m a b
Ccap@0 gnd net@14 18.733f
Ccap@1 gnd net@8 18.733f
Ccap@2 gnd net@11 18.733f
Rres@0 net@14 a 22.139
Rres@1 net@11 net@14 44.279
Rres@2 b net@8 22.139
Rres@3 net@8 net@11 44.279
.ENDS wire-C_0_011f-5109_1-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-5109_1-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-5109_1-R_26m
.ENDS wire90-5109_1-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4659_8-R_26m a b
Ccap@0 gnd net@14 17.086f
Ccap@1 gnd net@8 17.086f
Ccap@2 gnd net@11 17.086f
Rres@0 net@14 a 20.192
Rres@1 net@11 net@14 40.385
Rres@2 b net@8 20.192
Rres@3 net@8 net@11 40.385
.ENDS wire-C_0_011f-4659_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4659_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4659_8-R_26m
.ENDS wire90-4659_8-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-3105_9-R_26m a b
Ccap@0 gnd net@14 11.388f
Ccap@1 gnd net@8 11.388f
Ccap@2 gnd net@11 11.388f
Rres@0 net@14 a 13.459
Rres@1 net@11 net@14 26.918
Rres@2 b net@8 13.459
Rres@3 net@8 net@11 26.918
.ENDS wire-C_0_011f-3105_9-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-3105_9-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-3105_9-R_26m
.ENDS wire90-3105_9-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2229_2-R_26m a b
Ccap@0 gnd net@14 8.174f
Ccap@1 gnd net@8 8.174f
Ccap@2 gnd net@11 8.174f
Rres@0 net@14 a 9.66
Rres@1 net@11 net@14 19.32
Rres@2 b net@8 9.66
Rres@3 net@8 net@11 19.32
.ENDS wire-C_0_011f-2229_2-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2229_2-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2229_2-R_26m
.ENDS wire90-2229_2-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4552_2-R_26m a b
Ccap@0 gnd net@14 16.691f
Ccap@1 gnd net@8 16.691f
Ccap@2 gnd net@11 16.691f
Rres@0 net@14 a 19.726
Rres@1 net@11 net@14 39.452
Rres@2 b net@8 19.726
Rres@3 net@8 net@11 39.452
.ENDS wire-C_0_011f-4552_2-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4552_2-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4552_2-R_26m
.ENDS wire90-4552_2-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4224_4-R_26m a b
Ccap@0 gnd net@14 15.489f
Ccap@1 gnd net@8 15.489f
Ccap@2 gnd net@11 15.489f
Rres@0 net@14 a 18.306
Rres@1 net@11 net@14 36.611
Rres@2 b net@8 18.306
Rres@3 net@8 net@11 36.611
.ENDS wire-C_0_011f-4224_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4224_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4224_4-R_26m
.ENDS wire90-4224_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-4964_8-R_26m a b
Ccap@0 gnd net@14 18.204f
Ccap@1 gnd net@8 18.204f
Ccap@2 gnd net@11 18.204f
Rres@0 net@14 a 21.514
Rres@1 net@11 net@14 43.028
Rres@2 b net@8 21.514
Rres@3 net@8 net@11 43.028
.ENDS wire-C_0_011f-4964_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-4964_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-4964_8-R_26m
.ENDS wire90-4964_8-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2102_8-R_26m a b
Ccap@0 gnd net@14 7.71f
Ccap@1 gnd net@8 7.71f
Ccap@2 gnd net@11 7.71f
Rres@0 net@14 a 9.112
Rres@1 net@11 net@14 18.224
Rres@2 b net@8 9.112
Rres@3 net@8 net@11 18.224
.ENDS wire-C_0_011f-2102_8-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2102_8-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2102_8-R_26m
.ENDS wire90-2102_8-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2117_2-R_26m a b
Ccap@0 gnd net@14 7.763f
Ccap@1 gnd net@8 7.763f
Ccap@2 gnd net@11 7.763f
Rres@0 net@14 a 9.175
Rres@1 net@11 net@14 18.349
Rres@2 b net@8 9.175
Rres@3 net@8 net@11 18.349
.ENDS wire-C_0_011f-2117_2-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2117_2-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2117_2-R_26m
.ENDS wire90-2117_2-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-840_4-R_26m a b
Ccap@0 gnd net@14 3.081f
Ccap@1 gnd net@8 3.081f
Ccap@2 gnd net@11 3.081f
Rres@0 net@14 a 3.642
Rres@1 net@11 net@14 7.283
Rres@2 b net@8 3.642
Rres@3 net@8 net@11 7.283
.ENDS wire-C_0_011f-840_4-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-840_4-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-840_4-R_26m
.ENDS wire90-840_4-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2017_6-R_26m a b
Ccap@0 gnd net@14 7.398f
Ccap@1 gnd net@8 7.398f
Ccap@2 gnd net@11 7.398f
Rres@0 net@14 a 8.743
Rres@1 net@11 net@14 17.486
Rres@2 b net@8 8.743
Rres@3 net@8 net@11 17.486
.ENDS wire-C_0_011f-2017_6-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2017_6-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2017_6-R_26m
.ENDS wire90-2017_6-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2584_1-R_26m a b
Ccap@0 gnd net@14 9.475f
Ccap@1 gnd net@8 9.475f
Ccap@2 gnd net@11 9.475f
Rres@0 net@14 a 11.198
Rres@1 net@11 net@14 22.396
Rres@2 b net@8 11.198
Rres@3 net@8 net@11 22.396
.ENDS wire-C_0_011f-2584_1-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2584_1-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2584_1-R_26m
.ENDS wire90-2584_1-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2385_3-R_26m a b
Ccap@0 gnd net@14 8.746f
Ccap@1 gnd net@8 8.746f
Ccap@2 gnd net@11 8.746f
Rres@0 net@14 a 10.336
Rres@1 net@11 net@14 20.673
Rres@2 b net@8 10.336
Rres@3 net@8 net@11 20.673
.ENDS wire-C_0_011f-2385_3-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2385_3-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2385_3-R_26m
.ENDS wire90-2385_3-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-1928_3-R_26m a b
Ccap@0 gnd net@14 7.07f
Ccap@1 gnd net@8 7.07f
Ccap@2 gnd net@11 7.07f
Rres@0 net@14 a 8.356
Rres@1 net@11 net@14 16.712
Rres@2 b net@8 8.356
Rres@3 net@8 net@11 16.712
.ENDS wire-C_0_011f-1928_3-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-1928_3-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-1928_3-R_26m
.ENDS wire90-1928_3-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2790_5-R_26m a b
Ccap@0 gnd net@14 10.232f
Ccap@1 gnd net@8 10.232f
Ccap@2 gnd net@11 10.232f
Rres@0 net@14 a 12.092
Rres@1 net@11 net@14 24.184
Rres@2 b net@8 12.092
Rres@3 net@8 net@11 24.184
.ENDS wire-C_0_011f-2790_5-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2790_5-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2790_5-R_26m
.ENDS wire90-2790_5-layer_1-width_4

*** CELL: orangeTSMC090nm:wire{sch}
.SUBCKT wire-C_0_011f-2752_3-R_26m a b
Ccap@0 gnd net@14 10.092f
Ccap@1 gnd net@8 10.092f
Ccap@2 gnd net@11 10.092f
Rres@0 net@14 a 11.927
Rres@1 net@11 net@14 23.853
Rres@2 b net@8 11.927
Rres@3 net@8 net@11 23.853
.ENDS wire-C_0_011f-2752_3-R_26m

*** CELL: orangeTSMC090nm:wire90{sch}
.SUBCKT wire90-2752_3-layer_1-width_4 a b
Xwire@0 a b wire-C_0_011f-2752_3-R_26m
.ENDS wire90-2752_3-layer_1-width_4

*** CELL: dockPartOD:ringSkipMoveLit{sch}
.SUBCKT ringSkipMoveLit clS[F] clS[T] cl[F] cl[T] do[epi] fire[L] fire[M] 
+inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] inE[10] inE[11] inE[12] inE[13] 
+inE[14] inE[15] inE[16] inE[17] inE[18] inE[19] inE[1] inE[20] inE[21] 
+inE[22] inE[23] inE[24] inE[25] inE[26] inE[27] inE[28] inE[29] inE[2] 
+inE[30] inE[31] inE[32] inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] 
+inE[6] inE[7] inE[8] inE[9] in[C] loadC[T] mc pred[D] pred[T] rd[F] rd[T] sin 
+sout succ[D] succ[T] torp
XbitAssig@0 bitAssignments
XmoveLit@0 clS[F] clS[T] cl[F] cl[T] do[L] do[M] fire[L] fire[M] fire[T] 
+net@332 mc odx[15] odx[16] odx[18] odx[19] odx[20] pred[D] pred[T] rd[F] 
+rd[T] net@372 sout succ[D] succ[T] torp moveLit
XringFIFO@0 clS[F] clS[T] cl[F] cl[T] net@304 net@295 do[epi] fire[ODE] 
+fire[m1] fire[m2] inE[10] inE[11] inE[12] inE[13] inE[14] inE[15] inE[16] 
+inE[17] inE[18] inE[19] inE[1] inE[20] inE[21] inE[22] inE[23] inE[24] 
+inE[25] inE[26] inE[27] inE[28] inE[29] inE[2] inE[30] inE[31] inE[32] 
+inE[33] inE[34] inE[35] inE[36] inE[3] inE[4] inE[5] inE[6] inE[7] inE[8] 
+inE[9] mc od[15] od[16] od[17] od[18] od[19] od[20] net@393 m1s[1] m1s[20] 
+m1s[22] m1s[23] m1s[24] m1s[25] m1s[26] m1s[27] m1s[2] m1s[3] m1s[4] m1s[5] 
+m1s[6] m1s[8] pout[10] pout[11] pout[12] pout[13] pout[14] pout[15] pout[16] 
+pout[17] pout[18] pout[1] pout[2] pout[3] pout[4] pout[5] pout[6] pout[7] 
+pout[8] pout[9] rd[F] rd[T] sin net@377 ringFIFO
XskipCoun@0 clS[F] clS[T] cl[F] cl[T] net@304 net@295 fire[ODE] fire[m1] 
+fire[m2] fire[M] ilc[done] inA[1] inA[2] inA[3] inA[4] inA[5] inA[6] m1d[1] 
+m1d[2] m1d[3] m1d[4] m1d[5] m1d[6] m1d[8] pout[10] pout[11] pout[12] pout[13] 
+pout[14] pout[15] pout[16] pout[17] pout[18] pout[1] pout[2] pout[3] pout[4] 
+pout[5] pout[6] pout[7] pout[8] pout[9] in[C] kill loadC[T] mc net@393 rd[F] 
+rd[T] m1d[24] m1d[26] m1d[25] m1d[22] m1d[27] m1d[23] m1d[20] net@378 net@376 
+skipCount
Xwire90@0 wire90@0_a pout[1] wire90-2416_4-layer_1-width_4
Xwire90@1 wire90@1_a pout[2] wire90-2384_4-layer_1-width_4
Xwire90@2 wire90@2_a pout[3] wire90-2330_4-layer_1-width_4
Xwire90@3 wire90@3_a pout[4] wire90-2135_9-layer_1-width_4
Xwire90@4 wire90@4_a pout[5] wire90-1987_4-layer_1-width_4
Xwire90@5 wire90@5_a pout[6] wire90-1996_4-layer_1-width_4
Xwire90@6 wire90@6_a pout[7] wire90-1636_3-layer_1-width_4
Xwire90@7 wire90@7_a pout[8] wire90-1776_4-layer_1-width_4
Xwire90@8 wire90@8_a pout[9] wire90-1870_9-layer_1-width_4
Xwire90@9 wire90@9_a pout[10] wire90-1565_5-layer_1-width_4
Xwire90@10 wire90@10_a pout[11] wire90-1506-layer_1-width_4
Xwire90@11 wire90@11_a pout[12] wire90-1605_5-layer_1-width_4
Xwire90@12 wire90@12_a pout[13] wire90-1227_3-layer_1-width_4
Xwire90@13 wire90@13_a pout[14] wire90-1254_9-layer_1-width_4
Xwire90@14 wire90@14_a pout[15] wire90-1280_2-layer_1-width_4
Xwire90@15 wire90@15_a pout[16] wire90-1012_7-layer_1-width_4
Xwire90@16 wire90@16_a pout[17] wire90-960_9-layer_1-width_4
Xwire90@17 wire90@17_a pout[18] wire90-904_3-layer_1-width_4
Xwire90@18 m1s[1] m1d[1] wire90-4579_4-layer_1-width_4
Xwire90@19 m1s[2] m1d[2] wire90-4580_9-layer_1-width_4
Xwire90@20 m1s[3] m1d[3] wire90-4864_4-layer_1-width_4
Xwire90@21 m1s[4] m1d[4] wire90-4970_4-layer_1-width_4
Xwire90@22 m1s[5] m1d[5] wire90-5067_4-layer_1-width_4
Xwire90@23 m1s[6] m1d[6] wire90-5238_9-layer_1-width_4
Xwire90@25 m1s[8] m1d[8] wire90-5485_4-layer_1-width_4
Xwire90@37 m1s[20] m1d[20] wire90-3582_8-layer_1-width_4
Xwire90@39 m1s[22] m1d[22] wire90-4216_8-layer_1-width_4
Xwire90@40 m1s[23] m1d[23] wire90-4217_8-layer_1-width_4
Xwire90@41 m1s[24] m1d[24] wire90-4580_7-layer_1-width_4
Xwire90@42 m1s[25] m1d[25] wire90-4914_8-layer_1-width_4
Xwire90@43 m1s[26] m1d[26] wire90-5109_1-layer_1-width_4
Xwire90@44 m1s[27] m1d[27] wire90-4659_8-layer_1-width_4
Xwire90@56 wire90@56_a fire[m2] wire90-3105_9-layer_1-width_4
Xwire90@57 wire90@57_a fire[m1] wire90-2229_2-layer_1-width_4
Xwire90@58 wire90@58_a fire[ODE] wire90-4552_2-layer_1-width_4
Xwire90@59 net@304 do[L] wire90-4224_4-layer_1-width_4
Xwire90@60 net@295 do[M] wire90-4964_8-layer_1-width_4
Xwire90@61 od[15] odx[15] wire90-2102_8-layer_1-width_4
Xwire90@62 od[16] odx[16] wire90-2117_2-layer_1-width_4
Xwire90@63 od[17] odx[17] wire90-840_4-layer_1-width_4
Xwire90@64 od[18] odx[18] wire90-2017_6-layer_1-width_4
Xwire90@65 od[19] odx[19] wire90-2584_1-layer_1-width_4
Xwire90@66 od[20] odx[20] wire90-2385_3-layer_1-width_4
Xwire90@67 ilc[done] net@332 wire90-1928_3-layer_1-width_4
Xwire90@68 net@377 net@378 wire90-2790_5-layer_1-width_4
Xwire90@69 net@376 net@372 wire90-2752_3-layer_1-width_4
Xwire90@70 kill fire[T] wire90-2416_4-layer_1-width_4
.ENDS ringSkipMoveLit

*** CELL: scanConverter{sch}
.SUBCKT scanConverter clS[F] clS[T] cl[F] cl[T] mc oldScan[2] oldScan[3] 
+oldScan[4] oldScan[5] oldScan[6] oldScan[7] oldScan[8] oldScan[9] rd[F] rd[T]
Xinv@0 oldScan[2] cl[F] inv-X_5
Xinv@1 cl[F] cl[T] inv-X_5
Xinv@2 oldScan[3] clS[F] inv-X_5
Xinv@3 clS[F] clS[T] inv-X_5
Xinv@4 oldScan[5] rd[F] inv-X_5
Xinv@5 rd[F] rd[T] inv-X_5
Xinv@6 oldScan[9] net@3 inv-X_5
Xinv@7 net@3 mc inv-X_5
.ENDS scanConverter

*** CELL: gaspJ:gaspBranch{sch}
.SUBCKT gaspBranch fire pred sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] 
+sir[8] sir[9] sor[1] succ[B] torpedo torpedoLO
Xcenter2i@0 succ[B] gnd net@163 fire ctrAND3in100
Xinv@0 pred net@240 inv-X_10
Xinv@1 torpedoLO net@288 inv-X_20
XpredDri6@0 fire net@104 pred predDri60wMC
XscanEx1v@0 pred sir[9] sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] 
+sir[8] sor[1] scanEx1vertA
XsucANDdr@0 fire net@288 torpedo sucANDdri60
XsucANDdr@1 fire torpedoLO succ[B] sucANDdri60
Xwire90@0 net@240 net@163 wire90-602_3-layer_1-width_3
Xwire90@4 net@104 sir[9] wire90-602_3-layer_1-width_3
.ENDS gaspBranch

*** CELL: torpedoStage{sch}
.SUBCKT torpedoStage ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] 
+ain[3] ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] 
+aout[12] aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] 
+aout[7] aout[8] aout[9] aout[T] in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] pred sir[1] sir[2] 
+sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] sor[1] succ[B] torpedo
Xall1in52@0 ain[10] ain[11] ain[12] ain[13] ain[14] ain[1] ain[2] ain[3] 
+ain[4] ain[5] ain[6] ain[7] ain[8] ain[9] ain[T] aout[10] aout[11] aout[12] 
+aout[13] aout[14] aout[1] aout[2] aout[3] aout[4] aout[5] aout[6] aout[7] 
+aout[8] aout[9] aout[T] net@2 in[10] in[11] in[12] in[13] in[14] in[15] 
+in[16] in[17] in[18] in[19] in[1] in[20] in[21] in[22] in[23] in[24] in[25] 
+in[26] in[27] in[28] in[29] in[2] in[30] in[31] in[32] in[33] in[34] in[35] 
+in[36] in[37] in[3] in[4] in[5] in[6] in[7] in[8] in[9] out[10] out[11] 
+out[12] out[13] out[14] out[15] out[16] out[17] out[18] out[19] out[1] 
+out[20] out[21] out[22] out[23] out[24] out[25] out[26] out[27] out[28] 
+out[29] out[2] out[30] out[31] out[32] out[33] out[34] out[35] out[36] 
+out[37] out[3] out[4] out[5] out[6] out[7] out[8] out[9] all1in52
XgaspPlai@0 net@0 pred sir[1] sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] 
+sir[8] sir[9] sor[1] succ[B] torpedo ain[T] gaspBranch
Xwire90@0 net@0 net@2 wire90-1847-layer_1-width_3
.ENDS torpedoStage

*** CELL: inputDock{sch}
.SUBCKT inputDock datIn[10] datIn[11] datIn[12] datIn[13] datIn[14] datIn[15] 
+datIn[16] datIn[17] datIn[18] datIn[19] datIn[1] datIn[20] datIn[21] 
+datIn[22] datIn[23] datIn[24] datIn[25] datIn[26] datIn[27] datIn[28] 
+datIn[29] datIn[2] datIn[30] datIn[31] datIn[32] datIn[33] datIn[34] 
+datIn[35] datIn[36] datIn[37] datIn[38] datIn[39] datIn[3] datIn[40] 
+datIn[41] datIn[42] datIn[43] datIn[44] datIn[45] datIn[46] datIn[47] 
+datIn[48] datIn[49] datIn[4] datIn[50] datIn[51] datIn[5] datIn[6] datIn[7] 
+datIn[8] datIn[9] datIn[S] datIn[T] instr[10] instr[11] instr[12] instr[13] 
+instr[14] instr[15] instr[16] instr[17] instr[18] instr[19] instr[1] 
+instr[20] instr[21] instr[22] instr[23] instr[24] instr[25] instr[26] 
+instr[27] instr[28] instr[29] instr[2] instr[30] instr[31] instr[32] 
+instr[33] instr[34] instr[35] instr[36] instr[37] instr[38] instr[39] 
+instr[3] instr[40] instr[41] instr[42] instr[43] instr[44] instr[45] 
+instr[46] instr[47] instr[48] instr[49] instr[4] instr[50] instr[51] instr[5] 
+instr[6] instr[7] instr[8] instr[9] instr[S] instr[T] ship[10] ship[11] 
+ship[12] ship[13] ship[14] ship[15] ship[16] ship[17] ship[18] ship[19] 
+ship[1] ship[20] ship[21] ship[22] ship[23] ship[24] ship[25] ship[26] 
+ship[27] ship[28] ship[29] ship[2] ship[30] ship[31] ship[32] ship[33] 
+ship[34] ship[35] ship[36] ship[37] ship[38] ship[39] ship[3] ship[40] 
+ship[41] ship[42] ship[43] ship[44] ship[45] ship[46] ship[47] ship[48] 
+ship[49] ship[4] ship[50] ship[51] ship[5] ship[6] ship[7] ship[8] ship[9] 
+ship[S] ship[T] sin sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] 
+sout tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] 
+tokOut[16] tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] 
+tokOut[22] tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] 
+tokOut[29] tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] 
+tokOut[35] tokOut[36] tokOut[37] tokOut[38] tokOut[39] tokOut[3] tokOut[40] 
+tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] tokOut[46] tokOut[47] 
+tokOut[48] tokOut[49] tokOut[4] tokOut[50] tokOut[51] tokOut[5] tokOut[6] 
+tokOut[7] tokOut[8] tokOut[9] tokOut[S] tokOut[T]
XplainSta@0 vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd 
+tokOut[46] tokOut[47] tokOut[48] tokOut[49] tokOut[50] tokOut[T] tokOut[38] 
+tokOut[39] tokOut[40] tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] 
+tokOut[51] vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd 
+vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd vdd 
+vdd vdd tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] 
+tokOut[16] tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] 
+tokOut[22] tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] 
+tokOut[29] tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] 
+tokOut[35] tokOut[36] tokOut[37] tokOut[3] tokOut[4] tokOut[5] tokOut[6] 
+tokOut[7] tokOut[8] tokOut[9] succ[T] scan2 sir[2] sir[3] sir[4] sir[5] 
+sir[6] sir[7] sir[8] sir[9] scan3 tokOut[S] plainStageFour
XplainSta@1 datIn[46] datIn[47] datIn[48] datIn[49] datIn[50] datIn[T] 
+datIn[38] datIn[39] datIn[40] datIn[41] datIn[42] datIn[43] datIn[44] 
+datIn[45] datIn[51] ship[46] ship[47] ship[48] ship[49] ship[50] ship[T] 
+ship[38] ship[39] ship[40] ship[41] ship[42] ship[43] ship[44] ship[45] 
+ship[51] datIn[10] datIn[11] datIn[12] datIn[13] datIn[14] datIn[15] 
+datIn[16] datIn[17] datIn[18] datIn[19] datIn[1] datIn[20] datIn[21] 
+datIn[22] datIn[23] datIn[24] datIn[25] datIn[26] datIn[27] datIn[28] 
+datIn[29] datIn[2] datIn[30] datIn[31] datIn[32] datIn[33] datIn[34] 
+datIn[35] datIn[36] datIn[37] datIn[3] datIn[4] datIn[5] datIn[6] datIn[7] 
+datIn[8] datIn[9] ship[10] ship[11] ship[12] ship[13] ship[14] ship[15] 
+ship[16] ship[17] ship[18] ship[19] ship[1] ship[20] ship[21] ship[22] 
+ship[23] ship[24] ship[25] ship[26] ship[27] ship[28] ship[29] ship[2] 
+ship[30] ship[31] ship[32] ship[33] ship[34] ship[35] ship[36] ship[37] 
+ship[3] ship[4] ship[5] ship[6] ship[7] ship[8] ship[9] dataIn[S] scan3 
+sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] sout pred[D] 
+plainStageEight
XringSkip@1 net@43[3] net@43[4] net@43[5] net@43[6] net@77 fireL fireM 
+net@49[5] net@49[4] net@49[3] net@49[2] net@49[1] net@49[0] instr2[10] 
+instr2[11] instr2[12] instr2[13] instr2[14] instr2[15] instr2[16] instr2[17] 
+instr2[18] instr2[19] instr2[1] instr2[20] instr2[21] instr2[22] instr2[23] 
+instr2[24] instr2[25] instr2[26] instr2[27] instr2[28] instr2[29] instr2[2] 
+instr2[30] instr2[31] instr2[32] instr2[33] instr2[34] instr2[35] instr2[36] 
+instr2[3] instr2[4] instr2[5] instr2[6] instr2[7] instr2[8] instr2[9] 
+ship[38] vdd net@43[0] pred[D] pred[T] net@43[1] net@43[2] sin scan1 ship[S] 
+succ[T] net@55 ringSkipMoveLit
XscanConv@0 net@43[3] net@43[4] net@43[5] net@43[6] net@43[0] sir[2] sir[3] 
+sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] net@43[1] net@43[2] scanConverter
XtorpedoS@0 instr[47] instr[48] instr[49] instr[50] instr[51] instr[38] 
+instr[39] instr[40] instr[41] instr[42] instr[43] instr[44] instr[45] 
+instr[46] instr[T] instr2[47] instr2[48] instr2[49] instr2[50] instr2[51] 
+instr2[38] instr2[39] instr2[40] instr2[41] instr2[42] instr2[43] instr2[44] 
+instr2[45] instr2[46] instr2[T] instr[10] instr[11] instr[12] instr[13] 
+instr[14] instr[15] instr[16] instr[17] instr[18] instr[19] instr[1] 
+instr[20] instr[21] instr[22] instr[23] instr[24] instr[25] instr[26] 
+instr[27] instr[28] instr[29] instr[2] instr[30] instr[31] instr[32] 
+instr[33] instr[34] instr[35] instr[36] instr[37] instr[3] instr[4] instr[5] 
+instr[6] instr[7] instr[8] instr[9] instr2[10] instr2[11] instr2[12] 
+instr2[13] instr2[14] instr2[15] instr2[16] instr2[17] instr2[18] instr2[19] 
+instr2[1] instr2[20] instr2[21] instr2[22] instr2[23] instr2[24] instr2[25] 
+instr2[26] instr2[27] instr2[28] instr2[29] instr2[2] instr2[30] instr2[31] 
+instr2[32] instr2[33] instr2[34] instr2[35] instr2[36] instr2[37] instr2[3] 
+instr2[4] instr2[5] instr2[6] instr2[7] instr2[8] instr2[9] instr[S] scan1 
+sir[2] sir[3] sir[4] sir[5] sir[6] sir[7] sir[8] sir[9] scan2 net@77 net@55 
+torpedoStage
.ENDS inputDock

*** CELL: scanJ:scanCap{sch}
.SUBCKT scanCap si[1] si[2] si[3] si[4] si[5] si[9]
.ENDS scanCap

.global gnd vdd

*** TOP LEVEL CELL: isolatedInDock{sch}
XdatIn ship[47] ship[48] ship[49] ship[50] ship[51] ship[38] ship[39] 
+ship[40] ship[41] ship[42] ship[43] ship[44] ship[45] ship[46] ship[T] 
+datIn[47] datIn[48] datIn[49] datIn[50] datIn[51] datIn[38] datIn[39] 
+datIn[40] datIn[41] datIn[42] datIn[43] datIn[44] datIn[45] datIn[46] 
+datIn[T] ship[10] ship[11] ship[12] ship[13] ship[14] ship[15] ship[16] 
+ship[17] ship[18] ship[19] ship[1] ship[20] ship[21] ship[22] ship[23] 
+ship[24] ship[25] ship[26] ship[27] ship[28] ship[29] ship[2] ship[30] 
+ship[31] ship[32] ship[33] ship[34] ship[35] ship[36] ship[37] ship[3] 
+ship[4] ship[5] ship[6] ship[7] ship[8] ship[9] datIn[10] datIn[11] datIn[12] 
+datIn[13] datIn[14] datIn[15] datIn[16] datIn[17] datIn[18] datIn[19] 
+datIn[1] datIn[20] datIn[21] datIn[22] datIn[23] datIn[24] datIn[25] 
+datIn[26] datIn[27] datIn[28] datIn[29] datIn[2] datIn[30] datIn[31] 
+datIn[32] datIn[33] datIn[34] datIn[35] datIn[36] datIn[37] datIn[3] datIn[4] 
+datIn[5] datIn[6] datIn[7] datIn[8] datIn[9] ship[S] scanInC[1] scanInC[2] 
+scanInC[3] scanInC[4] scanInC[5] scanInC[3] scanInC[2] scanInC[8] scanInC[9] 
+scanInD[1] scanInD[2] scanInD[3] scanInD[4] scanInD[5] scanInD[6] scanInD[7] 
+scanInD[8] scanInD[9] scanInR[1] scanInR[2] scanInR[3] scanInR[4] scanInR[5] 
+scanInR[3] scanInR[2] scanInR[8] scanInR[9] net@68[8] net@67[8] net@67[7] 
+net@67[6] net@67[5] net@67[4] dockScanR[I] datIn[S] properStopper
XinDock datIn[10] datIn[11] datIn[12] datIn[13] datIn[14] datIn[15] datIn[16] 
+datIn[17] datIn[18] datIn[19] datIn[1] datIn[20] datIn[21] datIn[22] 
+datIn[23] datIn[24] datIn[25] datIn[26] datIn[27] datIn[28] datIn[29] 
+datIn[2] datIn[30] datIn[31] datIn[32] datIn[33] datIn[34] datIn[35] 
+datIn[36] datIn[37] datIn[38] datIn[39] datIn[3] datIn[40] datIn[41] 
+datIn[42] datIn[43] datIn[44] datIn[45] datIn[46] datIn[47] datIn[48] 
+datIn[49] datIn[4] datIn[50] datIn[51] datIn[5] datIn[6] datIn[7] datIn[8] 
+datIn[9] datIn[S] datIn[T] instr[10] instr[11] instr[12] instr[13] instr[14] 
+instr[15] instr[16] instr[17] instr[18] instr[19] instr[1] instr[20] 
+instr[21] instr[22] instr[23] instr[24] instr[25] instr[26] instr[27] 
+instr[28] instr[29] instr[2] instr[30] instr[31] instr[32] instr[33] 
+instr[34] instr[35] instr[36] instr[37] instr[38] instr[39] instr[3] 
+instr[40] instr[41] instr[42] instr[43] instr[44] instr[45] instr[46] 
+instr[47] instr[48] instr[49] instr[4] instr[50] instr[51] instr[5] instr[6] 
+instr[7] instr[8] instr[9] instr[S] instr[T] ship[10] ship[11] ship[12] 
+ship[13] ship[14] ship[15] ship[16] ship[17] ship[18] ship[19] ship[1] 
+ship[20] ship[21] ship[22] ship[23] ship[24] ship[25] ship[26] ship[27] 
+ship[28] ship[29] ship[2] ship[30] ship[31] ship[32] ship[33] ship[34] 
+ship[35] ship[36] ship[37] ship[38] ship[39] ship[3] ship[40] ship[41] 
+ship[42] ship[43] ship[44] ship[45] ship[46] ship[47] ship[48] ship[49] 
+ship[4] ship[50] ship[51] ship[5] ship[6] ship[7] ship[8] ship[9] ship[S] 
+ship[T] dockScanR[I] scanInR[2] scanInR[3] scanInR[4] scanInR[5] scanInR[3] 
+scanInR[2] scanInR[8] scanInR[9] dockScanR[O] tokOut[10] tokOut[11] 
+tokOut[12] tokOut[13] tokOut[14] tokOut[15] tokOut[16] tokOut[17] tokOut[18] 
+tokOut[19] tokOut[1] tokOut[20] tokOut[21] tokOut[22] tokOut[23] tokOut[24] 
+tokOut[25] tokOut[26] tokOut[27] tokOut[28] tokOut[29] tokOut[2] tokOut[30] 
+tokOut[31] tokOut[32] tokOut[33] tokOut[34] tokOut[35] tokOut[36] tokOut[37] 
+tokOut[38] tokOut[39] tokOut[3] tokOut[40] tokOut[41] tokOut[42] tokOut[43] 
+tokOut[44] tokOut[45] tokOut[46] tokOut[47] tokOut[48] tokOut[49] tokOut[4] 
+tokOut[50] tokOut[51] tokOut[5] tokOut[6] tokOut[7] tokOut[8] tokOut[9] 
+tokOut[S] tokOut[T] inputDock
XinstrIn net@54[4] net@54[3] net@54[2] net@54[1] net@54[0] net@54[13] 
+net@54[12] net@54[11] net@54[10] net@54[9] net@54[8] net@54[7] net@54[6] 
+net@54[5] net@54[14] instr[47] instr[48] instr[49] instr[50] instr[51] 
+instr[38] instr[39] instr[40] instr[41] instr[42] instr[43] instr[44] 
+instr[45] instr[46] instr[T] net@54[42] net@54[41] net@54[40] net@54[39] 
+net@54[38] net@54[37] net@54[36] net@54[35] net@54[34] net@54[33] net@54[51] 
+net@54[32] net@54[31] net@54[30] net@54[29] net@54[28] net@54[27] net@54[26] 
+net@54[25] net@54[24] net@54[23] net@54[50] net@54[22] net@54[21] net@54[20] 
+net@54[19] net@54[18] net@54[17] net@54[16] net@54[15] net@54[49] net@54[48] 
+net@54[47] net@54[46] net@54[45] net@54[44] net@54[43] instr[10] instr[11] 
+instr[12] instr[13] instr[14] instr[15] instr[16] instr[17] instr[18] 
+instr[19] instr[1] instr[20] instr[21] instr[22] instr[23] instr[24] 
+instr[25] instr[26] instr[27] instr[28] instr[29] instr[2] instr[30] 
+instr[31] instr[32] instr[33] instr[34] instr[35] instr[36] instr[37] 
+instr[3] instr[4] instr[5] instr[6] instr[7] instr[8] instr[9] net@55 
+net@50[8] scanInC[2] scanInC[3] scanInC[4] scanInC[5] scanInC[3] scanInC[2] 
+scanInC[8] scanInC[9] net@47[8] net@47[7] net@47[6] net@47[5] net@47[4] 
+scanInD[6] scanInD[7] scanInD[8] scanInD[9] net@53[8] scanInR[2] scanInR[3] 
+scanInR[4] scanInR[5] scanInR[3] scanInR[2] scanInR[8] scanInR[9] scanInC[8] 
+scanInD[8] scanInD[7] scanInD[6] net@57[5] net@57[4] scanInR[8] instr[S] 
+properStopper
XscanCap@0 scanInD[8] scanInD[7] scanInD[6] net@57[5] net@57[4] scanInD[9] 
+scanCap
XscanCap@1 scanInC[8] scanInC[2] scanInC[3] scanInC[4] scanInC[5] scanInC[9] 
+scanCap
XscanCap@2 scanInR[8] scanInR[2] scanInR[3] scanInR[4] scanInR[5] scanInR[9] 
+scanCap
XtokOut tokOut[47] tokOut[48] tokOut[49] tokOut[50] tokOut[51] tokOut[38] 
+tokOut[39] tokOut[40] tokOut[41] tokOut[42] tokOut[43] tokOut[44] tokOut[45] 
+tokOut[46] tokOut[T] net@7[4] net@7[3] net@7[2] net@7[1] net@7[0] net@7[13] 
+net@7[12] net@7[11] net@7[10] net@7[9] net@7[8] net@7[7] net@7[6] net@7[5] 
+net@7[14] tokOut[10] tokOut[11] tokOut[12] tokOut[13] tokOut[14] tokOut[15] 
+tokOut[16] tokOut[17] tokOut[18] tokOut[19] tokOut[1] tokOut[20] tokOut[21] 
+tokOut[22] tokOut[23] tokOut[24] tokOut[25] tokOut[26] tokOut[27] tokOut[28] 
+tokOut[29] tokOut[2] tokOut[30] tokOut[31] tokOut[32] tokOut[33] tokOut[34] 
+tokOut[35] tokOut[36] tokOut[37] tokOut[3] tokOut[4] tokOut[5] tokOut[6] 
+tokOut[7] tokOut[8] tokOut[9] net@7[42] net@7[41] net@7[40] net@7[39] 
+net@7[38] net@7[37] net@7[36] net@7[35] net@7[34] net@7[33] net@7[51] 
+net@7[32] net@7[31] net@7[30] net@7[29] net@7[28] net@7[27] net@7[26] 
+net@7[25] net@7[24] net@7[23] net@7[50] net@7[22] net@7[21] net@7[20] 
+net@7[19] net@7[18] net@7[17] net@7[16] net@7[15] net@7[49] net@7[48] 
+net@7[47] net@7[46] net@7[45] net@7[44] net@7[43] tokOut[S] net@68[8] 
+scanInC[2] scanInC[3] scanInC[4] scanInC[5] scanInC[3] scanInC[2] scanInC[8] 
+scanInC[9] net@67[8] net@67[7] net@67[6] net@67[5] net@67[4] scanInD[6] 
+scanInD[7] scanInD[8] scanInD[9] dockScanR[O] scanInR[2] scanInR[3] 
+scanInR[4] scanInR[5] scanInR[3] scanInR[2] scanInR[8] scanInR[9] net@50[8] 
+net@47[8] net@47[7] net@47[6] net@47[5] net@47[4] net@53[8] net@25 
+properStopper
.END