tests/memory/count.and.stride.fleet

   1 // output ///////////////////////////////////////////////////////////////////
   2 #skip
   3 #expect 14
   4 #expect 13
   5 #expect 12
   6 #expect 11
   7
   8 // program //////////////////////////////////////////////////////////////////
   9 #ship debug        : Debug
  10 #ship memory       : Memory
  11 #ship fifo         : Fifo
  12
  13 // dumb configurations
  14 debug.in:        [*] take, deliver;
  15 memory.inAddrRead:   [*] take, deliver;
  16 memory.inAddrWrite:   [*] take, deliver;
  17 memory.inDataWrite:   [*] take, deliver;
  18 memory.inCount:  [*] take, deliver;
  19 memory.inStride: [*] take, deliver;
  20 fifo.in:         [*] take, deliver;
  21
  22 // addresses and values to initialize the memory with
  23 //1:  sendto memory.inAddrWrite;
  24 //4:  sendto memory.inCount;
  25 //1:  sendto memory.inStride;
  26 //11: sendto memory.inDataWrite;
  27 //12: sendto memory.inDataWrite;
  28 //13: sendto memory.inDataWrite;
  29 //14: sendto memory.inDataWrite;
  30
  31 // send write-completion tokens to the fifo output
  32 memory.out:
  33   load repeat counter with 4; take, notify fifo.out;
  34   [*] take, sendto debug.in;
  35
  36 // when the write-completion tokens accumulate, unleash
  37 // the read addresses
  38 fifo.out:
  39   load repeat counter with 4; wait;
  40   take, sendto memory.inAddrRead;
  41
  42 // read addresses
  43 //4: sendto fifo.in;
  44 //4: sendto memory.inCount;
  45 //-1: sendto memory.inStride;
  46