update fpga to properly reset repeat_counter after massacre
[fleet.git] / tests / multiply.test
1 #skip
2 #ship alu3    : Alu3
3 #ship lut3    : Lut3
4 #ship bitfifo : BitFifo
5 #ship debug   : Debug
6 #ship fifo    : Fifo
7 #ship rotator : Rotator
8
9 #expect -66848683
10 #expect 18682
11
12 // 0:  100100100111110000000
13 // sel 011110100001001000000
14 // 1:  111000101000011000011
15 // r:  111000100110111000000
16
17 bitfifo.in:
18   deliver;      // deliver a junk word
19   literal 10000;
20   load repeat counter with 37; deliver; // deliver it 37 times (once per bit)
21   literal 0;
22   load repeat counter with 38; deliver; // deliver it 37 times
23
24 // insert bits in lsb order
25 bitfifo.inOp:
26   literal BitFifo.inOp[lsbFirst,take=37];
27   [*] deliver;
28
29 // toss out 37 bits, take one, repeat.  sign extend the result
30 bitfifo.outOp:
31   literal BitFifo.outOp[drop=37,take=1,signExtend];
32   [*] deliver;
33
34 bitfifo.out:        [*] wait, take, sendto lut3.in2;
35 lut3.in2:           load repeat counter with 4; notify bitfifo.out;
36                     load repeat counter with 63;
37                     take, deliver, notify bitfifo.out;
38                     load repeat counter with 11;
39                     take, deliver, notify bitfifo.out;
40
41 // mux on second input
42 lut3.inLut:         literal 226;
43                     [*] deliver;
44
45 lut3.in1:           literal 18683;
46                     load repeat counter with 37; deliver;
47                     literal 0;
48                     load repeat counter with 37; deliver;
49
50 lut3.in3:           literal 12000;
51                     load repeat counter with 37; deliver;
52                     literal 0;
53                     load repeat counter with 37; deliver;
54
55 lut3.out:           [*] wait, take, sendto alu3.in2;
56
57 alu3.in1:      literal 0; deliver; [*] take, deliver;
58 alu3.in2:      notify lut3.out; [*] take, deliver, notify lut3.out;
59 alu3.in3:      literal 0; deliver; [*] take, deliver;
60 alu3.outBits:  [*] take, sendto debug.in;
61
62 alu3.out1:     [*] take, sendto alu3.in1;
63 alu3.out2:     [*] take, sendto alu3.in3;
64
65 debug.in:      [*] take, deliver;
66